1 From 8bcac4011ebe0dbdd46fd55b036ee855c95702d3 Mon Sep 17 00:00:00 2001
2 From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
3 Date: Mon, 14 Dec 2020 19:07:43 +0100
4 Subject: [PATCH] soc: bcm: add PM driver for Broadcom's PMB
6 Content-Type: text/plain; charset=UTF-8
7 Content-Transfer-Encoding: 8bit
9 PMB originally comes from BCM63138 but can be also found on many other
10 chipsets (e.g. BCM4908). It's needed to power on and off SoC blocks like
13 Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
14 Acked-by: Ulf Hansson <ulf.hansson@linaro.org>
15 Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
18 drivers/soc/bcm/Makefile | 2 +-
19 drivers/soc/bcm/bcm63xx/Kconfig | 9 +
20 drivers/soc/bcm/bcm63xx/Makefile | 1 +
21 drivers/soc/bcm/bcm63xx/bcm-pmb.c | 333 ++++++++++++++++++++++++++++++
22 5 files changed, 354 insertions(+), 1 deletion(-)
23 create mode 100644 drivers/soc/bcm/bcm63xx/bcm-pmb.c
27 @@ -3674,6 +3674,16 @@ L: linux-mips@vger.kernel.org
29 F: drivers/firmware/broadcom/*
31 +BROADCOM PMB (POWER MANAGEMENT BUS) DRIVER
32 +M: Rafał Miłecki <rafal@milecki.pl>
33 +M: Florian Fainelli <f.fainelli@gmail.com>
34 +M: bcm-kernel-feedback-list@broadcom.com
35 +L: linux-pm@vger.kernel.org
37 +T: git git://github.com/broadcom/stblinux.git
38 +F: drivers/soc/bcm/bcm-pmb.c
39 +F: include/dt-bindings/soc/bcm-pmb.h
41 BROADCOM SPECIFIC AMBA DRIVER (BCMA)
42 M: Rafał Miłecki <zajec5@gmail.com>
43 L: linux-wireless@vger.kernel.org
44 --- a/drivers/soc/bcm/Makefile
45 +++ b/drivers/soc/bcm/Makefile
47 # SPDX-License-Identifier: GPL-2.0-only
48 obj-$(CONFIG_BCM2835_POWER) += bcm2835-power.o
49 obj-$(CONFIG_RASPBERRYPI_POWER) += raspberrypi-power.o
50 -obj-$(CONFIG_SOC_BCM63XX) += bcm63xx/
52 obj-$(CONFIG_SOC_BRCMSTB) += brcmstb/
53 --- a/drivers/soc/bcm/bcm63xx/Kconfig
54 +++ b/drivers/soc/bcm/bcm63xx/Kconfig
55 @@ -10,3 +10,12 @@ config BCM63XX_POWER
56 BCM6318, BCM6328, BCM6362 and BCM63268 SoCs.
61 + bool "Broadcom PMB (Power Management Bus) driver"
62 + depends on ARCH_BCM4908 || (COMPILE_TEST && OF)
63 + default ARCH_BCM4908
64 + select PM_GENERIC_DOMAINS if PM
66 + This enables support for the Broadcom's PMB (Power Management Bus) that
67 + is used for disabling and enabling SoC devices.
68 --- a/drivers/soc/bcm/bcm63xx/Makefile
69 +++ b/drivers/soc/bcm/bcm63xx/Makefile
71 # SPDX-License-Identifier: GPL-2.0-only
72 obj-$(CONFIG_BCM63XX_POWER) += bcm63xx-power.o
73 +obj-$(CONFIG_BCM_PMB) += bcm-pmb.o
75 +++ b/drivers/soc/bcm/bcm63xx/bcm-pmb.c
77 +// SPDX-License-Identifier: GPL-2.0-or-later
79 + * Copyright (c) 2013 Broadcom
80 + * Copyright (C) 2020 Rafał Miłecki <rafal@milecki.pl>
83 +#include <dt-bindings/soc/bcm-pmb.h>
84 +#include <linux/io.h>
85 +#include <linux/module.h>
86 +#include <linux/of.h>
87 +#include <linux/of_device.h>
88 +#include <linux/platform_device.h>
89 +#include <linux/pm_domain.h>
90 +#include <linux/reset/bcm63xx_pmb.h>
92 +#define BPCM_ID_REG 0x00
93 +#define BPCM_CAPABILITIES 0x04
94 +#define BPCM_CAP_NUM_ZONES 0x000000ff
95 +#define BPCM_CAP_SR_REG_BITS 0x0000ff00
96 +#define BPCM_CAP_PLLTYPE 0x00030000
97 +#define BPCM_CAP_UBUS 0x00080000
98 +#define BPCM_CONTROL 0x08
99 +#define BPCM_STATUS 0x0c
100 +#define BPCM_ROSC_CONTROL 0x10
101 +#define BPCM_ROSC_THRESH_H 0x14
102 +#define BPCM_ROSC_THRESHOLD_BCM6838 0x14
103 +#define BPCM_ROSC_THRESH_S 0x18
104 +#define BPCM_ROSC_COUNT_BCM6838 0x18
105 +#define BPCM_ROSC_COUNT 0x1c
106 +#define BPCM_PWD_CONTROL_BCM6838 0x1c
107 +#define BPCM_PWD_CONTROL 0x20
108 +#define BPCM_SR_CONTROL_BCM6838 0x20
109 +#define BPCM_PWD_ACCUM_CONTROL 0x24
110 +#define BPCM_SR_CONTROL 0x28
111 +#define BPCM_GLOBAL_CONTROL 0x2c
112 +#define BPCM_MISC_CONTROL 0x30
113 +#define BPCM_MISC_CONTROL2 0x34
114 +#define BPCM_SGPHY_CNTL 0x38
115 +#define BPCM_SGPHY_STATUS 0x3c
116 +#define BPCM_ZONE0 0x40
117 +#define BPCM_ZONE_CONTROL 0x00
118 +#define BPCM_ZONE_CONTROL_MANUAL_CLK_EN 0x00000001
119 +#define BPCM_ZONE_CONTROL_MANUAL_RESET_CTL 0x00000002
120 +#define BPCM_ZONE_CONTROL_FREQ_SCALE_USED 0x00000004 /* R/O */
121 +#define BPCM_ZONE_CONTROL_DPG_CAPABLE 0x00000008 /* R/O */
122 +#define BPCM_ZONE_CONTROL_MANUAL_MEM_PWR 0x00000030
123 +#define BPCM_ZONE_CONTROL_MANUAL_ISO_CTL 0x00000040
124 +#define BPCM_ZONE_CONTROL_MANUAL_CTL 0x00000080
125 +#define BPCM_ZONE_CONTROL_DPG_CTL_EN 0x00000100
126 +#define BPCM_ZONE_CONTROL_PWR_DN_REQ 0x00000200
127 +#define BPCM_ZONE_CONTROL_PWR_UP_REQ 0x00000400
128 +#define BPCM_ZONE_CONTROL_MEM_PWR_CTL_EN 0x00000800
129 +#define BPCM_ZONE_CONTROL_BLK_RESET_ASSERT 0x00001000
130 +#define BPCM_ZONE_CONTROL_MEM_STBY 0x00002000
131 +#define BPCM_ZONE_CONTROL_RESERVED 0x0007c000
132 +#define BPCM_ZONE_CONTROL_PWR_CNTL_STATE 0x00f80000
133 +#define BPCM_ZONE_CONTROL_FREQ_SCALAR_DYN_SEL 0x01000000 /* R/O */
134 +#define BPCM_ZONE_CONTROL_PWR_OFF_STATE 0x02000000 /* R/O */
135 +#define BPCM_ZONE_CONTROL_PWR_ON_STATE 0x04000000 /* R/O */
136 +#define BPCM_ZONE_CONTROL_PWR_GOOD 0x08000000 /* R/O */
137 +#define BPCM_ZONE_CONTROL_DPG_PWR_STATE 0x10000000 /* R/O */
138 +#define BPCM_ZONE_CONTROL_MEM_PWR_STATE 0x20000000 /* R/O */
139 +#define BPCM_ZONE_CONTROL_ISO_STATE 0x40000000 /* R/O */
140 +#define BPCM_ZONE_CONTROL_RESET_STATE 0x80000000 /* R/O */
141 +#define BPCM_ZONE_CONFIG1 0x04
142 +#define BPCM_ZONE_CONFIG2 0x08
143 +#define BPCM_ZONE_FREQ_SCALAR_CONTROL 0x0c
144 +#define BPCM_ZONE_SIZE 0x10
147 + struct device *dev;
148 + void __iomem *base;
150 + bool little_endian;
151 + struct genpd_onecell_data genpd_onecell_data;
154 +struct bcm_pmb_pd_data {
155 + const char * const name;
161 +struct bcm_pmb_pm_domain {
162 + struct bcm_pmb *pmb;
163 + const struct bcm_pmb_pd_data *data;
164 + struct generic_pm_domain genpd;
167 +static int bcm_pmb_bpcm_read(struct bcm_pmb *pmb, int bus, u8 device,
168 + int offset, u32 *val)
170 + void __iomem *base = pmb->base + bus * 0x20;
171 + unsigned long flags;
174 + spin_lock_irqsave(&pmb->lock, flags);
175 + err = bpcm_rd(base, device, offset, val);
176 + spin_unlock_irqrestore(&pmb->lock, flags);
179 + *val = pmb->little_endian ? le32_to_cpu(*val) : be32_to_cpu(*val);
184 +static int bcm_pmb_bpcm_write(struct bcm_pmb *pmb, int bus, u8 device,
185 + int offset, u32 val)
187 + void __iomem *base = pmb->base + bus * 0x20;
188 + unsigned long flags;
191 + val = pmb->little_endian ? cpu_to_le32(val) : cpu_to_be32(val);
193 + spin_lock_irqsave(&pmb->lock, flags);
194 + err = bpcm_wr(base, device, offset, val);
195 + spin_unlock_irqrestore(&pmb->lock, flags);
200 +static int bcm_pmb_power_off_zone(struct bcm_pmb *pmb, int bus, u8 device,
207 + offset = BPCM_ZONE0 + zone * BPCM_ZONE_SIZE + BPCM_ZONE_CONTROL;
209 + err = bcm_pmb_bpcm_read(pmb, bus, device, offset, &val);
213 + val |= BPCM_ZONE_CONTROL_PWR_DN_REQ;
214 + val &= ~BPCM_ZONE_CONTROL_PWR_UP_REQ;
216 + err = bcm_pmb_bpcm_write(pmb, bus, device, offset, val);
221 +static int bcm_pmb_power_on_zone(struct bcm_pmb *pmb, int bus, u8 device,
228 + offset = BPCM_ZONE0 + zone * BPCM_ZONE_SIZE + BPCM_ZONE_CONTROL;
230 + err = bcm_pmb_bpcm_read(pmb, bus, device, offset, &val);
234 + if (!(val & BPCM_ZONE_CONTROL_PWR_ON_STATE)) {
235 + val &= ~BPCM_ZONE_CONTROL_PWR_DN_REQ;
236 + val |= BPCM_ZONE_CONTROL_DPG_CTL_EN;
237 + val |= BPCM_ZONE_CONTROL_PWR_UP_REQ;
238 + val |= BPCM_ZONE_CONTROL_MEM_PWR_CTL_EN;
239 + val |= BPCM_ZONE_CONTROL_BLK_RESET_ASSERT;
241 + err = bcm_pmb_bpcm_write(pmb, bus, device, offset, val);
247 +static int bcm_pmb_power_off_device(struct bcm_pmb *pmb, int bus, u8 device)
253 + /* Entire device can be powered off by powering off the 0th zone */
254 + offset = BPCM_ZONE0 + BPCM_ZONE_CONTROL;
256 + err = bcm_pmb_bpcm_read(pmb, bus, device, offset, &val);
260 + if (!(val & BPCM_ZONE_CONTROL_PWR_OFF_STATE)) {
261 + val = BPCM_ZONE_CONTROL_PWR_DN_REQ;
263 + err = bcm_pmb_bpcm_write(pmb, bus, device, offset, val);
269 +static int bcm_pmb_power_on_device(struct bcm_pmb *pmb, int bus, u8 device)
275 + err = bcm_pmb_bpcm_read(pmb, bus, device, BPCM_CAPABILITIES, &val);
279 + for (i = 0; i < (val & BPCM_CAP_NUM_ZONES); i++) {
280 + err = bcm_pmb_power_on_zone(pmb, bus, device, i);
288 +static int bcm_pmb_power_on(struct generic_pm_domain *genpd)
290 + struct bcm_pmb_pm_domain *pd = container_of(genpd, struct bcm_pmb_pm_domain, genpd);
291 + const struct bcm_pmb_pd_data *data = pd->data;
292 + struct bcm_pmb *pmb = pd->pmb;
294 + switch (data->id) {
295 + case BCM_PMB_PCIE0:
296 + case BCM_PMB_PCIE1:
297 + case BCM_PMB_PCIE2:
298 + return bcm_pmb_power_on_zone(pmb, data->bus, data->device, 0);
299 + case BCM_PMB_HOST_USB:
300 + return bcm_pmb_power_on_device(pmb, data->bus, data->device);
302 + dev_err(pmb->dev, "unsupported device id: %d\n", data->id);
307 +static int bcm_pmb_power_off(struct generic_pm_domain *genpd)
309 + struct bcm_pmb_pm_domain *pd = container_of(genpd, struct bcm_pmb_pm_domain, genpd);
310 + const struct bcm_pmb_pd_data *data = pd->data;
311 + struct bcm_pmb *pmb = pd->pmb;
313 + switch (data->id) {
314 + case BCM_PMB_PCIE0:
315 + case BCM_PMB_PCIE1:
316 + case BCM_PMB_PCIE2:
317 + return bcm_pmb_power_off_zone(pmb, data->bus, data->device, 0);
318 + case BCM_PMB_HOST_USB:
319 + return bcm_pmb_power_off_device(pmb, data->bus, data->device);
321 + dev_err(pmb->dev, "unsupported device id: %d\n", data->id);
326 +static int bcm_pmb_probe(struct platform_device *pdev)
328 + struct device *dev = &pdev->dev;
329 + const struct bcm_pmb_pd_data *table;
330 + const struct bcm_pmb_pd_data *e;
331 + struct resource *res;
332 + struct bcm_pmb *pmb;
336 + pmb = devm_kzalloc(dev, sizeof(*pmb), GFP_KERNEL);
342 + res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
343 + pmb->base = devm_ioremap_resource(&pdev->dev, res);
344 + if (IS_ERR(pmb->base))
345 + return PTR_ERR(pmb->base);
347 + spin_lock_init(&pmb->lock);
349 + pmb->little_endian = !of_device_is_big_endian(dev->of_node);
351 + table = of_device_get_match_data(dev);
356 + for (e = table; e->name; e++)
357 + max_id = max(max_id, e->id);
359 + pmb->genpd_onecell_data.num_domains = max_id + 1;
360 + pmb->genpd_onecell_data.domains =
361 + devm_kcalloc(dev, pmb->genpd_onecell_data.num_domains,
362 + sizeof(struct generic_pm_domain *), GFP_KERNEL);
363 + if (!pmb->genpd_onecell_data.domains)
366 + for (e = table; e->name; e++) {
367 + struct bcm_pmb_pm_domain *pd = devm_kzalloc(dev, sizeof(*pd), GFP_KERNEL);
371 + pd->genpd.name = e->name;
372 + pd->genpd.power_on = bcm_pmb_power_on;
373 + pd->genpd.power_off = bcm_pmb_power_off;
375 + pm_genpd_init(&pd->genpd, NULL, true);
376 + pmb->genpd_onecell_data.domains[e->id] = &pd->genpd;
379 + err = of_genpd_add_provider_onecell(dev->of_node, &pmb->genpd_onecell_data);
381 + dev_err(dev, "failed to add genpd provider: %d\n", err);
388 +static const struct bcm_pmb_pd_data bcm_pmb_bcm4908_data[] = {
389 + { .name = "pcie2", .id = BCM_PMB_PCIE2, .bus = 0, .device = 2, },
390 + { .name = "pcie0", .id = BCM_PMB_PCIE0, .bus = 1, .device = 14, },
391 + { .name = "pcie1", .id = BCM_PMB_PCIE1, .bus = 1, .device = 15, },
392 + { .name = "usb", .id = BCM_PMB_HOST_USB, .bus = 1, .device = 17, },
396 +static const struct of_device_id bcm_pmb_of_match[] = {
397 + { .compatible = "brcm,bcm4908-pmb", .data = &bcm_pmb_bcm4908_data, },
401 +static struct platform_driver bcm_pmb_driver = {
404 + .of_match_table = bcm_pmb_of_match,
406 + .probe = bcm_pmb_probe,
409 +builtin_platform_driver(bcm_pmb_driver);