target/linux/bmips/dts/bcm63268.dtsi

   1 // SPDX-License-Identifier: GPL-2.0-or-later
   2
   3 /dts-v1/;
   4
   5 #include <dt-bindings/clock/bcm63268-clock.h>
   6 #include <dt-bindings/gpio/gpio.h>
   7 #include <dt-bindings/input/input.h>
   8 #include <dt-bindings/interrupt-controller/bcm63268-interrupt-controller.h>
   9 #include <dt-bindings/reset/bcm63268-reset.h>
  10 #include <dt-bindings/soc/bcm63268-pm.h>
  11
  12 / {
  13         #address-cells = <1>;
  14         #size-cells = <1>;
  15         compatible = "brcm,bcm63268";
  16
  17         aliases {
  18                 nflash = &nflash;
  19                 pinctrl = &pinctrl;
  20                 serial0 = &uart0;
  21                 serial1 = &uart1;
  22                 spi0 = &lsspi;
  23                 spi1 = &hsspi;
  24         };
  25
  26         chosen {
  27                 bootargs = "console=ttyS0,115200n8 earlycon";
  28                 stdout-path = "serial0:115200n8";
  29         };
  30
  31         clocks {
  32                 periph_osc: periph-osc {
  33                         compatible = "fixed-clock";
  34
  35                         #clock-cells = <0>;
  36
  37                         clock-frequency = <50000000>;
  38                         clock-output-names = "periph";
  39                 };
  40
  41                 hsspi_osc: hsspi-osc {
  42                         compatible = "fixed-clock";
  43
  44                         #clock-cells = <0>;
  45
  46                         clock-frequency = <400000000>;
  47                         clock-output-names = "hsspi_osc";
  48                 };
  49         };
  50
  51         cpus {
  52                 #address-cells = <1>;
  53                 #size-cells = <0>;
  54                 mips-hpt-frequency = <200000000>;
  55
  56                 cpu@0 {
  57                         compatible = "brcm,bmips4350", "mips,mips4Kc";
  58                         device_type = "cpu";
  59                         reg = <0>;
  60                 };
  61
  62                 cpu@1 {
  63                         compatible = "brcm,bmips4350", "mips,mips4Kc";
  64                         device_type = "cpu";
  65                         reg = <1>;
  66                 };
  67         };
  68
  69         cpu_intc: interrupt-controller {
  70                 #address-cells = <0>;
  71                 compatible = "mti,cpu-interrupt-controller";
  72
  73                 interrupt-controller;
  74                 #interrupt-cells = <1>;
  75         };
  76
  77         memory@0 {
  78                 device_type = "memory";
  79                 reg = <0 0>;
  80         };
  81
  82         ubus {
  83                 #address-cells = <1>;
  84                 #size-cells = <1>;
  85
  86                 compatible = "simple-bus";
  87                 ranges;
  88
  89                 periph_clk: clock-controller@10000004 {
  90                         compatible = "brcm,bcm63268-clocks";
  91                         reg = <0x10000004 0x4>;
  92                         #clock-cells = <1>;
  93                 };
  94
  95                 pll_cntl: syscon@10000008 {
  96                         compatible = "syscon";
  97                         reg = <0x10000008 0x4>;
  98                         native-endian;
  99                 };
 100
 101                 syscon-reboot {
 102                         compatible = "syscon-reboot";
 103                         regmap = <&pll_cntl>;
 104                         offset = <0x0>;
 105                         mask = <0x1>;
 106                 };
 107
 108                 periph_rst: reset-controller@10000010 {
 109                         compatible = "brcm,bcm6345-reset";
 110                         reg = <0x10000010 0x4>;
 111                         #reset-cells = <1>;
 112                 };
 113
 114                 ext_intc: interrupt-controller@10000018 {
 115                         #address-cells = <1>;
 116                         compatible = "brcm,bcm6345-ext-intc";
 117                         reg = <0x10000018 0x4>;
 118
 119                         interrupt-controller;
 120                         #interrupt-cells = <2>;
 121
 122                         interrupts = <BCM63268_IRQ_EXT0>,
 123                                      <BCM63268_IRQ_EXT1>,
 124                                      <BCM63268_IRQ_EXT2>,
 125                                      <BCM63268_IRQ_EXT3>;
 126                 };
 127
 128                 periph_intc: interrupt-controller@10000020 {
 129                         #address-cells = <1>;
 130                         compatible = "brcm,bcm6345-l1-intc";
 131                         reg = <0x10000020 0x20>,
 132                               <0x10000040 0x20>;
 133
 134                         interrupt-controller;
 135                         #interrupt-cells = <1>;
 136
 137                         interrupt-parent = <&cpu_intc>;
 138                         interrupts = <2>, <3>;
 139                 };
 140
 141                 wdt: watchdog@1000009c {
 142                         compatible = "brcm,bcm7038-wdt";
 143                         reg = <0x1000009c 0xc>;
 144
 145                         clocks = <&periph_osc>;
 146
 147                         timeout-sec = <30>;
 148                 };
 149
 150                 pinctrl: pin-controller@100000c0 {
 151                         compatible = "brcm,bcm63268-pinctrl";
 152                         reg = <0x100000c0 0x8>,
 153                               <0x100000c8 0x8>,
 154                               <0x100000d0 0x4>,
 155                               <0x100000d8 0x4>,
 156                               <0x100000dc 0x4>,
 157                               <0x100000f8 0x4>;
 158                         reg-names = "dirout", "dat", "led", "mode",
 159                                     "ctrl", "basemode";
 160
 161                         gpio-controller;
 162                         #gpio-cells = <2>;
 163
 164                         interrupt-parent = <&ext_intc>;
 165                         interrupts = <0 0>, <1 0>, <2 0>, <3 0>;
 166                         interrupt-names = "gpio32", "gpio33", "gpio34", "gpio35";
 167
 168                         pinctrl_serial_led: serial_led {
 169                                 pinctrl_serial_led_clk: serial_led_clk {
 170                                         function = "serial_led_clk";
 171                                         pins = "gpio0";
 172                                 };
 173
 174                                 pinctrl_serial_led_data: serial_led_data {
 175                                         function = "serial_led_data";
 176                                         pins = "gpio1";
 177                                 };
 178                         };
 179
 180                         pinctrl_hsspi_cs4: hsspi_cs4 {
 181                                 function = "hsspi_cs4";
 182                                 pins = "gpio16";
 183                         };
 184
 185                         pinctrl_hsspi_cs5: hsspi_cs5 {
 186                                 function = "hsspi_cs5";
 187                                 pins = "gpio17";
 188                         };
 189
 190                         pinctrl_hsspi_cs6: hsspi_cs6 {
 191                                 function = "hsspi_cs6";
 192                                 pins = "gpio8";
 193                         };
 194
 195                         pinctrl_hsspi_cs7: hsspi_cs7 {
 196                                 function = "hsspi_cs7";
 197                                 pins = "gpio9";
 198                         };
 199
 200                         pinctrl_adsl_spi: adsl_spi {
 201                                 pinctrl_adsl_spi_miso: adsl_spi_miso {
 202                                         function = "adsl_spi_miso";
 203                                         pins = "gpio18";
 204                                 };
 205
 206                                 pinctrl_adsl_spi_mosi: adsl_spi_mosi {
 207                                         function = "adsl_spi_mosi";
 208                                         pins = "gpio19";
 209                                 };
 210                         };
 211
 212                         pinctrl_vreq_clk: vreq_clk {
 213                                 function = "vreq_clk";
 214                                 pins = "gpio22";
 215                         };
 216
 217                         pinctrl_pcie_clkreq_b: pcie_clkreq_b {
 218                                 function = "pcie_clkreq_b";
 219                                 pins = "gpio23";
 220                         };
 221
 222                         pinctrl_robosw_led_clk: robosw_led_clk {
 223                                 function = "robosw_led_clk";
 224                                 pins = "gpio30";
 225                         };
 226
 227                         pinctrl_robosw_led_data: robosw_led_data {
 228                                 function = "robosw_led_data";
 229                                 pins = "gpio31";
 230                         };
 231
 232                         pinctrl_nand: nand {
 233                                 function = "nand";
 234                                 group = "nand_grp";
 235                         };
 236
 237                         pinctrl_gpio35_alt: gpio35_alt {
 238                                 function = "gpio35_alt";
 239                                 pin = "gpio35";
 240                         };
 241
 242                         pinctrl_dectpd: dectpd {
 243                                 function = "dectpd";
 244                                 group = "dectpd_grp";
 245                         };
 246
 247                         pinctrl_vdsl_phy_override_0: vdsl_phy_override_0 {
 248                                 function = "vdsl_phy_override_0";
 249                                 group = "vdsl_phy_override_0_grp";
 250                         };
 251
 252                         pinctrl_vdsl_phy_override_1: vdsl_phy_override_1 {
 253                                 function = "vdsl_phy_override_1";
 254                                 group = "vdsl_phy_override_1_grp";
 255                         };
 256
 257                         pinctrl_vdsl_phy_override_2: vdsl_phy_override_2 {
 258                                 function = "vdsl_phy_override_2";
 259                                 group = "vdsl_phy_override_2_grp";
 260                         };
 261
 262                         pinctrl_vdsl_phy_override_3: vdsl_phy_override_3 {
 263                                 function = "vdsl_phy_override_3";
 264                                 group = "vdsl_phy_override_3_grp";
 265                         };
 266
 267                         pinctrl_dsl_gpio8: dsl_gpio8 {
 268                                 function = "dsl_gpio8";
 269                                 group = "dsl_gpio8";
 270                         };
 271
 272                         pinctrl_dsl_gpio9: dsl_gpio9 {
 273                                 function = "dsl_gpio9";
 274                                 group = "dsl_gpio9";
 275                         };
 276                 };
 277
 278                 uart0: serial@10000180 {
 279                         compatible = "brcm,bcm6345-uart";
 280                         reg = <0x10000180 0x18>;
 281
 282                         interrupt-parent = <&periph_intc>;
 283                         interrupts = <BCM63268_IRQ_UART0>;
 284
 285                         clocks = <&periph_osc>;
 286                         clock-names = "periph";
 287
 288                         status = "disabled";
 289                 };
 290
 291                 uart1: serial@100001a0 {
 292                         compatible = "brcm,bcm6345-uart";
 293                         reg = <0x100001a0 0x18>;
 294
 295                         interrupt-parent = <&periph_intc>;
 296                         interrupts = <BCM63268_IRQ_UART1>;
 297
 298                         clocks = <&periph_osc>;
 299                         clock-names = "periph";
 300
 301                         status = "disabled";
 302                 };
 303
 304                 nflash: nand@10000200 {
 305                         compatible = "brcm,nand-bcm6368",
 306                                      "brcm,brcmnand-v4.0",
 307                                      "brcm,brcmnand";
 308                         #address-cells = <1>;
 309                         #size-cells = <0>;
 310                         reg = <0x10000200 0x180>,
 311                               <0x10000600 0x200>,
 312                               <0x100000b0 0x10>;
 313                         reg-names = "nand",
 314                                     "nand-cache",
 315                                     "nand-int-base";
 316
 317                         interrupt-parent = <&periph_intc>;
 318                         interrupts = <BCM63268_IRQ_NAND>;
 319
 320                         clocks = <&periph_clk BCM63268_CLK_NAND>;
 321                         clock-names = "nand";
 322
 323                         pinctrl-names = "default";
 324                         pinctrl-0 = <&pinctrl_nand>;
 325
 326                         status = "disabled";
 327                 };
 328
 329                 lsspi: spi@10000800 {
 330                         compatible = "brcm,bcm6358-spi";
 331                         reg = <0x10000800 0x70c>;
 332                         #address-cells = <1>;
 333                         #size-cells = <0>;
 334
 335                         interrupt-parent = <&periph_intc>;
 336                         interrupts = <BCM63268_IRQ_LSSPI>;
 337
 338                         clocks = <&periph_clk BCM63268_CLK_SPI>;
 339                         clock-names = "spi";
 340
 341                         resets = <&periph_rst BCM63268_RST_SPI>;
 342
 343                         status = "disabled";
 344                 };
 345
 346                 hsspi: spi@10001000 {
 347                         compatible = "brcm,bcm6328-hsspi";
 348                         reg = <0x10001000 0x600>;
 349                         #address-cells = <1>;
 350                         #size-cells = <0>;
 351
 352                         interrupt-parent = <&periph_intc>;
 353                         interrupts = <BCM63268_IRQ_HSSPI>;
 354
 355                         clocks = <&periph_clk BCM63268_CLK_HSSPI>,
 356                                  <&hsspi_osc>;
 357                         clock-names = "hsspi",
 358                                       "pll";
 359
 360                         resets = <&periph_rst BCM63268_RST_SPI>;
 361
 362                         status = "disabled";
 363                 };
 364
 365                 periph_pwr: power-controller@1000184c {
 366                         compatible = "brcm,bcm63268-power-controller";
 367                         reg = <0x1000184c 0x4>;
 368                         #power-domain-cells = <1>;
 369                 };
 370
 371                 leds: led-controller@10001900 {
 372                         #address-cells = <1>;
 373                         #size-cells = <0>;
 374                         compatible = "brcm,bcm6328-leds";
 375                         reg = <0x10001900 0x24>;
 376
 377                         status = "disabled";
 378                 };
 379
 380                 ehci: usb@10002500 {
 381                         compatible = "brcm,bcm63268-ehci", "generic-ehci";
 382                         reg = <0x10002500 0x100>;
 383                         big-endian;
 384                         ignore-oc;
 385
 386                         interrupt-parent = <&periph_intc>;
 387                         interrupts = <BCM63268_IRQ_EHCI>;
 388
 389                         phys = <&usbh 0>;
 390                         phy-names = "usb";
 391
 392                         status = "disabled";
 393                 };
 394
 395                 ohci: usb@10002600 {
 396                         compatible = "brcm,bcm63268-ohci", "generic-ohci";
 397                         reg = <0x10002600 0x100>;
 398                         big-endian;
 399                         no-big-frame-no;
 400
 401                         interrupt-parent = <&periph_intc>;
 402                         interrupts = <BCM63268_IRQ_OHCI>;
 403
 404                         phys = <&usbh 0>;
 405                         phy-names = "usb";
 406
 407                         status = "disabled";
 408                 };
 409
 410                 usbh: usb-phy@10002700 {
 411                         compatible = "brcm,bcm63268-usbh-phy";
 412                         reg = <0x10002700 0x38>;
 413
 414                         #phy-cells = <1>;
 415
 416                         clocks = <&periph_clk BCM63268_CLK_USBH>;
 417                         /* FIXME! <&timer_clk BCM63268_TCLK_USB_REF> */
 418                         clock-names = "usbh";
 419                         /* FIXME! usb_ref */
 420
 421                         power-domains = <&periph_pwr BCM63268_POWER_DOMAIN_USBH>;
 422                         resets = <&periph_rst BCM63268_RST_USBH>;
 423
 424                         status = "disabled";
 425                 };
 426         };
 427 };