ath25: switch default kernel to 5.15
[openwrt/staging/ldir.git] / target / linux / ipq806x / files-5.10 / arch / arm / boot / dts / qcom-ipq8064-wxr-2533dhp.dts
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2 #include "qcom-ipq8064-v2.0.dtsi"
3
4 #include <dt-bindings/input/input.h>
5
6 / {
7 model = "Buffalo WXR-2533DHP";
8 compatible = "buffalo,wxr-2533dhp", "qcom,ipq8064";
9
10 memory@42000000 {
11 reg = <0x42000000 0x1e000000>;
12 device_type = "memory";
13 };
14
15 aliases {
16 led-boot = &power;
17 led-failsafe = &diag;
18 led-running = &power;
19 led-upgrade = &power;
20 };
21
22 chosen {
23 /* use "ubi_rootfs" volume in "ubi" partition as rootfs */
24 bootargs = "ubi.block=0,1 root=/dev/ubiblock0_1 rootfstype=squashfs";
25 };
26
27 leds {
28 compatible = "gpio-leds";
29 pinctrl-0 = <&led_pins>;
30 pinctrl-names = "default";
31
32 usb {
33 label = "green:usb";
34 gpios = <&qcom_pinmux 7 GPIO_ACTIVE_HIGH>;
35 linux,default-trigger = "usbport";
36 trigger-sources = <&hub_port0 &hub_port1>;
37 };
38
39 guestport {
40 label = "green:guestport";
41 gpios = <&qcom_pinmux 8 GPIO_ACTIVE_HIGH>;
42 };
43
44 diag: diag {
45 label = "orange:diag";
46 gpios = <&qcom_pinmux 9 GPIO_ACTIVE_HIGH>;
47 };
48
49 internet_orange {
50 label = "orange:internet";
51 gpios = <&qcom_pinmux 16 GPIO_ACTIVE_HIGH>;
52 };
53
54 internet_white {
55 label = "white:internet";
56 gpios = <&qcom_pinmux 22 GPIO_ACTIVE_HIGH>;
57 };
58
59 wireless_orange {
60 label = "orange:wireless";
61 gpios = <&qcom_pinmux 23 GPIO_ACTIVE_HIGH>;
62 };
63
64 wireless_white {
65 label = "white:wireless";
66 gpios = <&qcom_pinmux 24 GPIO_ACTIVE_HIGH>;
67 };
68
69 router_orange {
70 label = "orange:router";
71 gpios = <&qcom_pinmux 25 GPIO_ACTIVE_HIGH>;
72 };
73
74 router_white {
75 label = "white:router";
76 gpios = <&qcom_pinmux 26 GPIO_ACTIVE_LOW>;
77 };
78
79 power: power {
80 label = "white:power";
81 gpios = <&qcom_pinmux 53 GPIO_ACTIVE_HIGH>;
82 };
83 };
84
85 keys {
86 compatible = "gpio-keys";
87 pinctrl-0 = <&button_pins>;
88 pinctrl-names = "default";
89
90 power {
91 label = "power";
92 gpios = <&qcom_pinmux 58 GPIO_ACTIVE_LOW>;
93 linux,code = <KEY_POWER>;
94 debounce-interval = <60>;
95 wakeup-source;
96 };
97
98 reset {
99 label = "reset";
100 gpios = <&qcom_pinmux 54 GPIO_ACTIVE_LOW>;
101 linux,code = <KEY_RESTART>;
102 debounce-interval = <60>;
103 wakeup-source;
104 };
105
106 wps {
107 label = "wps";
108 gpios = <&qcom_pinmux 65 GPIO_ACTIVE_LOW>;
109 linux,code = <KEY_WPS_BUTTON>;
110 debounce-interval = <60>;
111 wakeup-source;
112 };
113
114 eject {
115 label = "eject";
116 gpios = <&qcom_pinmux 6 GPIO_ACTIVE_LOW>;
117 linux,code = <KEY_EJECTCD>;
118 debounce-interval = <60>;
119 wakeup-source;
120 };
121
122 guest {
123 label = "guest";
124 gpios = <&qcom_pinmux 64 GPIO_ACTIVE_LOW>;
125 linux,code = <BTN_0>;
126 debounce-interval = <60>;
127 wakeup-source;
128 };
129
130 ap {
131 label = "ap";
132 gpios = <&qcom_pinmux 55 GPIO_ACTIVE_LOW>;
133 linux,code = <BTN_1>;
134 linux,input-type = <EV_SW>;
135 debounce-interval = <60>;
136 wakeup-source;
137 };
138
139 router {
140 label = "router";
141 gpios = <&qcom_pinmux 56 GPIO_ACTIVE_LOW>;
142 linux,code = <BTN_1>;
143 linux,input-type = <EV_SW>;
144 debounce-interval = <60>;
145 wakeup-source;
146 };
147
148 auto {
149 label = "auto";
150 gpios = <&qcom_pinmux 57 GPIO_ACTIVE_LOW>;
151 linux,code = <BTN_1>;
152 linux,input-type = <EV_SW>;
153 debounce-interval = <60>;
154 wakeup-source;
155 };
156 };
157 };
158
159 &nand {
160 status = "okay";
161
162 pinctrl-0 = <&nand_pins>;
163 pinctrl-names = "default";
164
165 cs@0 {
166 reg = <0>;
167 compatible = "qcom,nandcs";
168
169 nand-ecc-strength = <4>;
170 nand-bus-width = <8>;
171 nand-ecc-step-size = <512>;
172
173 partitions {
174 compatible = "fixed-partitions";
175 #address-cells = <1>;
176 #size-cells = <1>;
177
178 ubi@0 {
179 label = "ubi";
180 reg = <0x0000000 0x4000000>;
181 };
182
183 rootfs_1@4000000 {
184 label = "rootfs_1";
185 reg = <0x4000000 0x4000000>;
186 };
187 };
188 };
189 };
190
191 &adm_dma {
192 status = "okay";
193 };
194
195 &mdio0 {
196 status = "okay";
197
198 pinctrl-0 = <&mdio0_pins>;
199 pinctrl-names = "default";
200
201 ethernet-phy@0 {
202 reg = <0>;
203 qca,ar8327-initvals = <
204 0x00004 0x07600000 /* PAD0_MODE */
205 0x00008 0x01000000 /* PAD5_MODE */
206 0x0000c 0x00000080 /* PAD6_MODE */
207 0x00050 0xcc35cc35 /* LED_CTRL0 */
208 0x00054 0xca35ca35 /* LED_CTRL1 */
209 0x00058 0xc935c935 /* LED_CTRL2 */
210 0x0005c 0x03ffff00 /* LED_CTRL3 */
211 0x000e4 0x0006a545 /* MAC_POWER_SEL */
212 0x000e0 0xc74164de /* SGMII_CTRL */
213 0x0007c 0x0000007e /* PORT0_STATUS */
214 0x00094 0x0000007e /* PORT6_STATUS */
215 >;
216 };
217
218 ethernet-phy@4 {
219 reg = <4>;
220 };
221 };
222
223 &gmac1 {
224 status = "okay";
225
226 phy-mode = "rgmii";
227 qcom,id = <1>;
228
229 pinctrl-0 = <&rgmii2_pins>;
230 pinctrl-names = "default";
231
232 nvmem-cells = <&macaddr_ART_6>;
233 nvmem-cell-names = "mac-address";
234
235 fixed-link {
236 speed = <1000>;
237 full-duplex;
238 };
239 };
240
241 &gmac2 {
242 status = "okay";
243
244 phy-mode = "sgmii";
245 qcom,id = <2>;
246
247 nvmem-cells = <&macaddr_ART_0>;
248 nvmem-cell-names = "mac-address";
249
250 fixed-link {
251 speed = <1000>;
252 full-duplex;
253 };
254 };
255
256 &gsbi4_serial {
257 pinctrl-0 = <&uart0_pins>;
258 pinctrl-names = "default";
259 };
260
261 &gsbi5 {
262 status = "okay";
263 qcom,mode = <GSBI_PROT_SPI>;
264
265 spi@1a280000 {
266 status = "okay";
267
268 pinctrl-0 = <&spi_pins>;
269 pinctrl-names = "default";
270
271 cs-gpios = <&qcom_pinmux 20 GPIO_ACTIVE_HIGH>;
272
273 flash@0 {
274 compatible = "jedec,spi-nor";
275 spi-max-frequency = <50000000>;
276 reg = <0>;
277
278 partitions {
279 compatible = "fixed-partitions";
280 #address-cells = <1>;
281 #size-cells = <1>;
282
283 SBL1@0 {
284 label = "SBL1";
285 reg = <0x0 0x10000>;
286 read-only;
287 };
288
289 MIBIB@10000 {
290 label = "MIBIB";
291 reg = <0x10000 0x20000>;
292 read-only;
293 };
294
295 SBL2@30000 {
296 label = "SBL2";
297 reg = <0x30000 0x30000>;
298 read-only;
299 };
300
301 SBL3@60000 {
302 label = "SBL3";
303 reg = <0x60000 0x30000>;
304 read-only;
305 };
306
307 DDRCONFIG@90000 {
308 label = "DDRCONFIG";
309 reg = <0x90000 0x10000>;
310 read-only;
311 };
312
313 SSD@a0000 {
314 label = "SSD";
315 reg = <0xa0000 0x10000>;
316 read-only;
317 };
318
319 TZ@b0000 {
320 label = "TZ";
321 reg = <0xb0000 0x30000>;
322 read-only;
323 };
324
325 RPM@e0000 {
326 label = "RPM";
327 reg = <0xe0000 0x20000>;
328 read-only;
329 };
330
331 APPSBL@100000 {
332 label = "APPSBL";
333 reg = <0x100000 0x70000>;
334 read-only;
335 };
336
337 APPSBLENV@170000 {
338 label = "APPSBLENV";
339 reg = <0x170000 0x10000>;
340 read-only;
341 };
342
343 ART@180000 {
344 label = "ART";
345 reg = <0x180000 0x40000>;
346 read-only;
347
348 compatible = "nvmem-cells";
349 #address-cells = <1>;
350 #size-cells = <1>;
351
352 macaddr_ART_0: macaddr@0 {
353 reg = <0x0 0x6>;
354 };
355
356 macaddr_ART_6: macaddr@6 {
357 reg = <0x6 0x6>;
358 };
359
360 macaddr_ART_18: macaddr@18 {
361 reg = <0x18 0x6>;
362 };
363
364 macaddr_ART_1e: macaddr@1e {
365 reg = <0x1e 0x6>;
366 };
367
368 precal_ART_1000: precal@1000 {
369 reg = <0x1000 0x2f20>;
370 };
371
372 precal_ART_5000: precal@5000 {
373 reg = <0x5000 0x2f20>;
374 };
375 };
376
377 BOOTCONFIG@1c0000 {
378 label = "BOOTCONFIG";
379 reg = <0x1c0000 0x10000>;
380 read-only;
381 };
382
383 APPSBL_1@1d0000 {
384 label = "APPSBL_1";
385 reg = <0x1d0000 0x70000>;
386 read-only;
387 };
388 };
389 };
390 };
391 };
392
393 &usb3_0 {
394 status = "okay";
395
396 pinctrl-0 = <&usb_pwr_en_pins>;
397 pinctrl-names = "default";
398 };
399
400 &usb3_1 {
401 status = "okay";
402 };
403
404 &dwc3_0 {
405 #address-cells = <1>;
406 #size-cells = <0>;
407
408 hub_port0: port@1 {
409 reg = <1>;
410 #trigger-source-cells = <0>;
411 };
412 };
413
414 &dwc3_1 {
415 #address-cells = <1>;
416 #size-cells = <0>;
417
418 hub_port1: port@1 {
419 reg = <1>;
420 #trigger-source-cells = <0>;
421 };
422 };
423
424 &pcie0 {
425 status = "okay";
426
427 bridge@0,0 {
428 reg = <0x00000000 0 0 0 0>;
429 #address-cells = <3>;
430 #size-cells = <2>;
431 ranges;
432
433 wifi@1,0 {
434 compatible = "pci168c,0040";
435 reg = <0x00010000 0 0 0 0>;
436
437 nvmem-cells = <&macaddr_ART_1e>, <&precal_ART_1000>;
438 nvmem-cell-names = "mac-address", "pre-calibration";
439 };
440 };
441 };
442
443 &pcie1 {
444 status = "okay";
445 max-link-speed = <1>;
446
447 bridge@0,0 {
448 reg = <0x00000000 0 0 0 0>;
449 #address-cells = <3>;
450 #size-cells = <2>;
451 ranges;
452
453 wifi@1,0 {
454 compatible = "pci168c,0040";
455 reg = <0x00010000 0 0 0 0>;
456
457 nvmem-cells = <&macaddr_ART_18>, <&precal_ART_5000>;
458 nvmem-cell-names = "mac-address", "pre-calibration";
459 };
460 };
461 };
462
463 &qcom_pinmux {
464 button_pins: button_pins {
465 mux {
466 pins = "gpio6", "gpio54", "gpio55", "gpio56", "gpio57",
467 "gpio58", "gpio64", "gpio65";
468 function = "gpio";
469 drive-strength = <2>;
470 bias-pull-up;
471 };
472 };
473
474 led_pins: led_pins {
475 mux {
476 pins = "gpio7", "gpio8", "gpio9", "gpio16", "gpio22",
477 "gpio23", "gpio24", "gpio25", "gpio26", "gpio53";
478 function = "gpio";
479 drive-strength = <2>;
480 bias-pull-up;
481 };
482 };
483
484 uart0_pins: uart0_pins {
485 mux {
486 pins = "gpio10", "gpio11";
487 function = "gsbi4";
488 drive-strength = <12>;
489 bias-disable;
490 };
491 };
492
493 spi_pins: spi_pins {
494 mux {
495 pins = "gpio18", "gpio19", "gpio21";
496 function = "gsbi5";
497 bias-pull-down;
498 };
499
500 data {
501 pins = "gpio18", "gpio19";
502 drive-strength = <10>;
503 };
504
505 cs{
506 pins = "gpio20";
507 drive-strength = <10>;
508 bias-pull-up;
509 };
510
511 clk {
512 pins = "gpio21";
513 drive-strength = <12>;
514 };
515 };
516
517 usb_pwr_en_pins: usb_pwr_en_pins {
518 mux{
519 pins = "gpio68";
520 function = "gpio";
521 drive-strength = <2>;
522 bias-pull-up;
523 output-high;
524 };
525 };
526 };