1 From ac369071920d427dd484cf74cddba2774bba45f5 Mon Sep 17 00:00:00 2001
2 From: Ansuel Smith <ansuelsmth@gmail.com>
3 Date: Thu, 9 Jul 2020 22:35:54 +0200
4 Subject: [PATCH 09/10] dt-bindings: thermal: tsens: Document ipq8064 bindings
6 Document the use of bindings used for msm8960 tsens based devices.
7 msm8960 use the same gcc regs and is set as a child of the qcom gcc.
9 Signed-off-by: Ansuel Smith <ansuelsmth@gmail.com>
10 Reviewed-by: Rob Herring <robh@kernel.org>
12 .../bindings/thermal/qcom-tsens.yaml | 56 ++++++++++++++++---
13 1 file changed, 48 insertions(+), 8 deletions(-)
15 --- a/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml
16 +++ b/Documentation/devicetree/bindings/thermal/qcom-tsens.yaml
17 @@ -19,6 +19,11 @@ description: |
21 + - description: msm9860 TSENS based
24 + - qcom,ipq8064-tsens
26 - description: v0.1 of TSENS
29 @@ -73,7 +78,9 @@ properties:
40 @@ -88,12 +95,20 @@ properties:
41 Number of cells required to uniquely identify the thermal sensors. Since
42 we have multiple sensors this is set to 1
48 + - "#thermal-sensor-cells"
57 + - qcom,ipq8064-tsens
61 @@ -114,19 +129,44 @@ allOf:
71 - - "#thermal-sensor-cells"
85 additionalProperties: false
89 #include <dt-bindings/interrupt-controller/arm-gic.h>
90 + // Example msm9860 based SoC (ipq8064):
91 + gcc: clock-controller {
95 + tsens: thermal-sensor {
96 + compatible = "qcom,ipq8064-tsens";
98 + nvmem-cells = <&tsens_calib>, <&tsens_calib_backup>;
99 + nvmem-cell-names = "calib", "calib_backup";
100 + interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
101 + interrupt-names = "uplow";
103 + #qcom,sensors = <11>;
104 + #thermal-sensor-cells = <1>;
109 + #include <dt-bindings/interrupt-controller/arm-gic.h>
110 // Example 1 (legacy: for pre v1 IP):
111 tsens1: thermal-sensor@900000 {
112 compatible = "qcom,msm8916-tsens", "qcom,tsens-v0_1";