af1882e28739622341d42797be93b5c9020358f6
[openwrt/staging/ldir.git] / target / linux / pistachio / patches-5.10 / 902-MIPS-DTS-img-marduk-Add-Cascoda-CA8210-6LoWPAN.patch
1 From b7700154d75e8d7c9a2022f09c2d5430137606fa Mon Sep 17 00:00:00 2001
2 From: Hauke Mehrtens <hauke@hauke-m.de>
3 Date: Sat, 15 Aug 2020 16:05:25 +0200
4 Subject: [PATCH 902/904] MIPS: DTS: img: marduk: Add Cascoda CA8210 6LoWPAN
5
6 Add Cascoda CA8210 6LoWPAN controller to device tree.
7
8 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
9 ---
10 arch/mips/boot/dts/img/pistachio_marduk.dts | 22 +++++++++++++++++++++
11 1 file changed, 22 insertions(+)
12
13 --- a/arch/mips/boot/dts/img/pistachio_marduk.dts
14 +++ b/arch/mips/boot/dts/img/pistachio_marduk.dts
15 @@ -75,6 +75,28 @@
16 VDD-supply = <&internal_dac_supply>;
17 };
18
19 +&spfi0 {
20 + status = "okay";
21 + pinctrl-0 = <&spim0_pins>, <&spim0_cs0_alt_pin>, <&spim0_cs2_alt_pin>, <&spim0_cs3_alt_pin>, <&spim0_cs4_alt_pin>;
22 + pinctrl-names = "default";
23 +
24 + cs-gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>, <&gpio0 2 GPIO_ACTIVE_HIGH>,
25 + <&gpio1 12 GPIO_ACTIVE_HIGH>, <&gpio1 13 GPIO_ACTIVE_HIGH>;
26 +
27 + ca8210: ca8210@0 {
28 + status = "okay";
29 + compatible = "cascoda,ca8210";
30 + reg = <0>;
31 + spi-max-frequency = <4000000>;
32 + spi-cpol;
33 + reset-gpio = <&gpio0 12 GPIO_ACTIVE_HIGH>;
34 + irq-gpio = <&gpio2 12 GPIO_ACTIVE_HIGH>;
35 + extclock-enable;
36 + extclock-freq = <16000000>;
37 + extclock-gpio = <2>;
38 + };
39 +};
40 +
41 &spfi1 {
42 status = "okay";
43