320cb08ac7de7097c0583888f1e6fe244537c58b
[openwrt/staging/ldir.git] / target / linux / realtek / dts-5.10 / rtl8382_allnet_all-sg8208m.dts
1 // SPDX-License-Identifier: GPL-2.0-or-later
2
3 #include "rtl838x.dtsi"
4
5 #include <dt-bindings/input/input.h>
6 #include <dt-bindings/gpio/gpio.h>
7
8 / {
9 compatible = "allnet,all-sg8208m", "realtek,rtl838x-soc";
10 model = "ALLNET ALL-SG8208M";
11
12 aliases {
13 led-boot = &led_sys;
14 led-failsafe = &led_sys;
15 led-running = &led_sys;
16 led-upgrade = &led_sys;
17 };
18
19 memory@0 {
20 device_type = "memory";
21 reg = <0x0 0x8000000>;
22 };
23
24 keys {
25 compatible = "gpio-keys-polled";
26 poll-interval = <20>;
27
28 /* is this pin 3 on the external RTL8231 (&gpio1)? */
29 /*reset {
30 label = "reset";
31 gpios = <&gpio0 67 GPIO_ACTIVE_LOW>;
32 linux,code = <KEY_RESTART>;
33 };*/
34 };
35
36 leds {
37 pinctrl-names = "default";
38 pinctrl-0 = <&pinmux_disable_sys_led>;
39 compatible = "gpio-leds";
40
41 led_sys: sys {
42 label = "green:sys";
43 gpios = <&gpio0 0 GPIO_ACTIVE_HIGH>;
44 };
45 // GPIO 25: power on/off all port leds
46 };
47 };
48
49 &spi0 {
50 status = "okay";
51
52 flash@0 {
53 compatible = "jedec,spi-nor";
54 reg = <0>;
55 spi-max-frequency = <10000000>;
56
57 partitions {
58 compatible = "fixed-partitions";
59 #address-cells = <1>;
60 #size-cells = <1>;
61
62 partition@0 {
63 label = "u-boot";
64 reg = <0x0 0x80000>;
65 read-only;
66 };
67
68 partition@80000 {
69 label = "u-boot-env";
70 reg = <0x80000 0x10000>;
71 read-only;
72 };
73
74 partition@90000 {
75 label = "u-boot-env2";
76 reg = <0x90000 0x10000>;
77 };
78
79 partition@a0000 {
80 label = "jffs";
81 reg = <0xa0000 0x100000>;
82 };
83
84 partition@1a0000 {
85 label = "jffs2";
86 reg = <0x1a0000 0x100000>;
87 };
88
89 partition@2a0000 {
90 label = "firmware";
91 reg = <0x2a0000 0xd60000>;
92 compatible = "openwrt,uimage", "denx,uimage";
93 openwrt,ih-magic = <0x00000006>;
94 };
95 };
96 };
97 };
98
99 &ethernet0 {
100 mdio: mdio-bus {
101 compatible = "realtek,rtl838x-mdio";
102 regmap = <&ethernet0>;
103 #address-cells = <1>;
104 #size-cells = <0>;
105
106 INTERNAL_PHY(8)
107 INTERNAL_PHY(9)
108 INTERNAL_PHY(10)
109 INTERNAL_PHY(11)
110 INTERNAL_PHY(12)
111 INTERNAL_PHY(13)
112 INTERNAL_PHY(14)
113 INTERNAL_PHY(15)
114 };
115 };
116
117 &switch0 {
118 ports {
119 #address-cells = <1>;
120 #size-cells = <0>;
121
122 SWITCH_PORT(8, 1, internal)
123 SWITCH_PORT(9, 2, internal)
124 SWITCH_PORT(10, 3, internal)
125 SWITCH_PORT(11, 4, internal)
126 SWITCH_PORT(12, 5, internal)
127 SWITCH_PORT(13, 6, internal)
128 SWITCH_PORT(14, 7, internal)
129 SWITCH_PORT(15, 8, internal)
130
131 port@28 {
132 ethernet = <&ethernet0>;
133 reg = <28>;
134 phy-mode = "internal";
135 fixed-link {
136 speed = <1000>;
137 full-duplex;
138 };
139 };
140 };
141 };