target/linux/realtek/files-5.10/drivers/i2c/busses/i2c-rtl9300.c

   1 // SPDX-License-Identifier: GPL-2.0-only
   2
   3 #include <linux/module.h>
   4 #include <linux/of_platform.h>
   5 #include "i2c-rtl9300.h"
   6
   7 #define REG(i, x)       (i->base + x + (i->scl_num ? i->mst2_offset : 0))
   8 #define REG_MASK(i, clear, set, reg)    \
   9                         writel((readl(REG(i, reg)) & ~(clear)) | (set), REG(i, reg))
  10
  11 struct i2c_drv_data {
  12         int scl0_pin;
  13         int scl1_pin;
  14         int sda0_pin;
  15         struct i2c_algorithm *algo;
  16         int (*read)(struct rtl9300_i2c *i2c, u8 *buf, int len);
  17         int (*write)(struct rtl9300_i2c *i2c, u8 *buf, int len);
  18         void (*reg_addr_set)(struct rtl9300_i2c *i2c, u32 reg, u16 len);
  19         int (*config_xfer)(struct rtl9300_i2c *i2c, u16 addr, u16 len);
  20         int (*execute_xfer)(struct rtl9300_i2c *i2c, char read_write, int size,
  21                             union i2c_smbus_data * data, int len);
  22         void (*writel)(struct rtl9300_i2c *i2c, u32 data);
  23         void (*config_io)(struct rtl9300_i2c *i2c, int scl_num, int sda_num);
  24         u32 mst2_offset;
  25 };
  26
  27 DEFINE_MUTEX(i2c_lock);
  28
  29 static void rtl9300_i2c_reg_addr_set(struct rtl9300_i2c *i2c, u32 reg, u16 len)
  30 {
  31         // Set register address width
  32         REG_MASK(i2c, 0x3 << RTL9300_I2C_CTRL2_MADDR_WIDTH, len << RTL9300_I2C_CTRL2_MADDR_WIDTH,
  33                  RTL9300_I2C_CTRL2);
  34
  35         // Set register address
  36         REG_MASK(i2c, 0xffffff << RTL9300_I2C_CTRL1_MEM_ADDR, reg << RTL9300_I2C_CTRL1_MEM_ADDR,
  37                  RTL9300_I2C_CTRL1);
  38 }
  39
  40 static void rtl9310_i2c_reg_addr_set(struct rtl9300_i2c *i2c, u32 reg, u16 len)
  41 {
  42         // Set register address width
  43         REG_MASK(i2c, 0x3 << RTL9310_I2C_CTRL_MADDR_WIDTH, len << RTL9310_I2C_CTRL_MADDR_WIDTH,
  44                  RTL9310_I2C_CTRL);
  45
  46         // Set register address
  47         writel(reg, REG(i2c, RTL9310_I2C_MEMADDR));
  48 }
  49
  50 static void rtl9300_i2c_config_io(struct rtl9300_i2c *i2c, int scl_num, int sda_num)
  51 {
  52         u32 v;
  53
  54         // Set SCL pin
  55         REG_MASK(i2c, 0, BIT(RTL9300_I2C_CTRL1_GPIO8_SCL_SEL), RTL9300_I2C_CTRL1);
  56
  57         // Set SDA pin
  58         REG_MASK(i2c, 0x7 << RTL9300_I2C_CTRL1_SDA_OUT_SEL,
  59                  i2c->sda_num << RTL9300_I2C_CTRL1_SDA_OUT_SEL, RTL9300_I2C_CTRL1);
  60
  61         // Set SDA pin to I2C functionality
  62         v = readl(i2c->base + RTL9300_I2C_MST_GLB_CTRL);
  63         v |= BIT(i2c->sda_num);
  64         writel(v, i2c->base + RTL9300_I2C_MST_GLB_CTRL);
  65 }
  66
  67 static void rtl9310_i2c_config_io(struct rtl9300_i2c *i2c, int scl_num, int sda_num)
  68 {
  69         u32 v;
  70
  71         // Set SCL pin
  72         REG_MASK(i2c, 0, BIT(RTL9310_I2C_MST_IF_SEL_GPIO_SCL_SEL + scl_num), RTL9310_I2C_MST_IF_SEL);
  73
  74         // Set SDA pin
  75         REG_MASK(i2c, 0x7 << RTL9310_I2C_CTRL_SDA_OUT_SEL,
  76                  i2c->sda_num << RTL9310_I2C_CTRL_SDA_OUT_SEL, RTL9310_I2C_CTRL);
  77
  78         // Set SDA pin to I2C functionality
  79         v = readl(i2c->base + RTL9310_I2C_MST_IF_SEL);
  80         v |= BIT(i2c->sda_num);
  81         writel(v, i2c->base + RTL9310_I2C_MST_IF_SEL);
  82 }
  83
  84 static int rtl9300_i2c_config_xfer(struct rtl9300_i2c *i2c, u16 addr, u16 len)
  85 {
  86         // Set bus frequency
  87         REG_MASK(i2c, 0x3 << RTL9300_I2C_CTRL2_SCL_FREQ,
  88                  i2c->bus_freq << RTL9300_I2C_CTRL2_SCL_FREQ, RTL9300_I2C_CTRL2);
  89
  90         // Set slave device address
  91         REG_MASK(i2c, 0x7f << RTL9300_I2C_CTRL2_DEV_ADDR,
  92                  addr << RTL9300_I2C_CTRL2_DEV_ADDR, RTL9300_I2C_CTRL2);
  93
  94         // Set data length
  95         REG_MASK(i2c, 0xf << RTL9300_I2C_CTRL2_DATA_WIDTH,
  96                  ((len - 1) & 0xf) << RTL9300_I2C_CTRL2_DATA_WIDTH, RTL9300_I2C_CTRL2);
  97
  98         // Set read mode to random
  99         REG_MASK(i2c, 0x1 << RTL9300_I2C_CTRL2_READ_MODE, 0, RTL9300_I2C_CTRL2);
 100
 101         return 0;
 102 }
 103
 104 static int rtl9310_i2c_config_xfer(struct rtl9300_i2c *i2c, u16 addr, u16 len)
 105 {
 106         // Set bus frequency
 107         REG_MASK(i2c, 0x3 << RTL9310_I2C_CTRL_SCL_FREQ,
 108                  i2c->bus_freq << RTL9310_I2C_CTRL_SCL_FREQ, RTL9310_I2C_CTRL);
 109
 110         // Set slave device address
 111         REG_MASK(i2c, 0x7f << RTL9310_I2C_CTRL_DEV_ADDR,
 112                  addr << RTL9310_I2C_CTRL_DEV_ADDR, RTL9310_I2C_CTRL);
 113
 114         // Set data length
 115         REG_MASK(i2c, 0xf << RTL9310_I2C_CTRL_DATA_WIDTH,
 116                  ((len - 1) & 0xf) << RTL9310_I2C_CTRL_DATA_WIDTH, RTL9310_I2C_CTRL);
 117
 118         // Set read mode to random
 119         REG_MASK(i2c, 0x1 << RTL9310_I2C_CTRL_READ_MODE, 0, RTL9310_I2C_CTRL);
 120
 121         return 0;
 122 }
 123
 124 static int i2c_read(void __iomem *r0, u8 *buf, int len)
 125 {
 126         int i;
 127         u32 v;
 128
 129         if (len > 16)
 130                 return -EIO;
 131
 132         for (i = 0; i < len; i++) {
 133                 if (i % 4 == 0)
 134                         v = readl(r0 + i);
 135                 buf[i] = v;
 136                 v >>= 8;
 137         }
 138
 139         return len;
 140 }
 141
 142 static int i2c_write(void __iomem *r0, u8 *buf, int len)
 143 {
 144         u32 v;
 145         int i;
 146
 147         if (len > 16)
 148                 return -EIO;
 149
 150         for (i = 0; i < len; i++) {
 151                 if (! (i % 4))
 152                         v = 0;
 153                 v <<= 8;
 154                 v |= buf[i];
 155                 if (i % 4 == 3 || i == len - 1)
 156                         writel(v, r0 + (i / 4) * 4);
 157         }
 158
 159         return len;
 160 }
 161
 162 static int rtl9300_i2c_read(struct rtl9300_i2c *i2c, u8 *buf, int len)
 163 {
 164         return i2c_read(REG(i2c, RTL9300_I2C_DATA_WORD0), buf, len);
 165 }
 166
 167 static int rtl9300_i2c_write(struct rtl9300_i2c *i2c, u8 *buf, int len)
 168 {
 169         return i2c_write(REG(i2c, RTL9300_I2C_DATA_WORD0), buf, len);
 170 }
 171
 172 static int rtl9310_i2c_read(struct rtl9300_i2c *i2c, u8 *buf, int len)
 173 {
 174         return i2c_read(REG(i2c, RTL9310_I2C_DATA), buf, len);
 175 }
 176
 177 static int rtl9310_i2c_write(struct rtl9300_i2c *i2c, u8 *buf, int len)
 178 {
 179         return i2c_write(REG(i2c, RTL9310_I2C_DATA), buf, len);
 180 }
 181
 182 static void rtl9300_writel(struct rtl9300_i2c *i2c, u32 data)
 183 {
 184         writel(data, REG(i2c, RTL9300_I2C_DATA_WORD0));
 185 }
 186
 187 static void rtl9310_writel(struct rtl9300_i2c *i2c, u32 data)
 188 {
 189         writel(data, REG(i2c, RTL9310_I2C_DATA));
 190 }
 191
 192
 193 static int rtl9300_execute_xfer(struct rtl9300_i2c *i2c, char read_write,
 194                                 int size, union i2c_smbus_data * data, int len)
 195 {
 196         u32 v;
 197
 198         if (read_write == I2C_SMBUS_READ)
 199                 REG_MASK(i2c, BIT(RTL9300_I2C_CTRL1_RWOP), 0, RTL9300_I2C_CTRL1);
 200         else
 201                 REG_MASK(i2c, 0, BIT(RTL9300_I2C_CTRL1_RWOP), RTL9300_I2C_CTRL1);
 202
 203         REG_MASK(i2c, 0, BIT(RTL9300_I2C_CTRL1_I2C_TRIG), RTL9300_I2C_CTRL1);
 204         do {
 205                 v = readl(REG(i2c, RTL9300_I2C_CTRL1));
 206         } while (v & BIT(RTL9300_I2C_CTRL1_I2C_TRIG));
 207
 208         if (v & BIT(RTL9300_I2C_CTRL1_I2C_FAIL))
 209                 return -EIO;
 210
 211         if (read_write == I2C_SMBUS_READ) {
 212                 if (size == I2C_SMBUS_BYTE || size == I2C_SMBUS_BYTE_DATA){
 213                         data->byte = readl(REG(i2c, RTL9300_I2C_DATA_WORD0));
 214                 } else if (size == I2C_SMBUS_WORD_DATA) {
 215                         data->word = readl(REG(i2c, RTL9300_I2C_DATA_WORD0));
 216                 } else if (len > 0) {
 217                         rtl9300_i2c_read(i2c, &data->block[0], len);
 218                 }
 219         }
 220
 221         return 0;
 222 }
 223
 224 static int rtl9310_execute_xfer(struct rtl9300_i2c *i2c, char read_write,
 225                                 int size, union i2c_smbus_data * data, int len)
 226 {
 227         u32 v;
 228
 229         if (read_write == I2C_SMBUS_READ)
 230                 REG_MASK(i2c, BIT(RTL9310_I2C_CTRL_RWOP), 0, RTL9310_I2C_CTRL);
 231         else
 232                 REG_MASK(i2c, 0, BIT(RTL9310_I2C_CTRL_RWOP), RTL9310_I2C_CTRL);
 233
 234         REG_MASK(i2c, 0, BIT(RTL9310_I2C_CTRL_I2C_TRIG), RTL9310_I2C_CTRL);
 235         do {
 236                 v = readl(REG(i2c, RTL9310_I2C_CTRL));
 237         } while (v & BIT(RTL9310_I2C_CTRL_I2C_TRIG));
 238
 239         if (v & BIT(RTL9310_I2C_CTRL_I2C_FAIL))
 240                 return -EIO;
 241
 242         if (read_write == I2C_SMBUS_READ) {
 243                 if (size == I2C_SMBUS_BYTE || size == I2C_SMBUS_BYTE_DATA){
 244                         data->byte = readl(REG(i2c, RTL9310_I2C_DATA));
 245                 } else if (size == I2C_SMBUS_WORD_DATA) {
 246                         data->word = readl(REG(i2c, RTL9310_I2C_DATA));
 247                 } else if (len > 0) {
 248                         rtl9310_i2c_read(i2c, &data->block[0], len);
 249                 }
 250         }
 251
 252         return 0;
 253 }
 254
 255 static int rtl9300_i2c_smbus_xfer(struct i2c_adapter * adap, u16 addr,
 256                   unsigned short flags, char read_write,
 257                   u8 command, int size, union i2c_smbus_data * data)
 258 {
 259         struct rtl9300_i2c *i2c = i2c_get_adapdata(adap);
 260         struct i2c_drv_data *drv_data = (struct i2c_drv_data *)device_get_match_data(i2c->dev);
 261         int len = 0, ret;
 262
 263         mutex_lock(&i2c_lock);
 264         switch (size) {
 265         case I2C_SMBUS_QUICK:
 266                 drv_data->config_xfer(i2c, addr, 0);
 267                 drv_data->reg_addr_set(i2c, 0, 0);
 268                 break;
 269
 270         case I2C_SMBUS_BYTE:
 271                 if (read_write == I2C_SMBUS_WRITE) {
 272                         drv_data->config_xfer(i2c, addr, 0);
 273                         drv_data->reg_addr_set(i2c, command, 1);
 274                 } else {
 275                         drv_data->config_xfer(i2c, addr, 1);
 276                         drv_data->reg_addr_set(i2c, 0, 0);
 277                 }
 278                 break;
 279
 280         case I2C_SMBUS_BYTE_DATA:
 281                 pr_debug("I2C_SMBUS_BYTE_DATA %02x, read %d cmd %02x\n", addr, read_write, command);
 282                 drv_data->reg_addr_set(i2c, command, 1);
 283                 drv_data->config_xfer(i2c, addr, 1);
 284
 285                 if (read_write == I2C_SMBUS_WRITE) {
 286                         pr_debug("--> data %02x\n", data->byte);
 287                         drv_data->writel(i2c, data->byte);
 288                 }
 289                 break;
 290
 291         case I2C_SMBUS_WORD_DATA:
 292                 pr_debug("I2C_SMBUS_WORD %02x, read %d\n", addr, read_write);
 293                 drv_data->reg_addr_set(i2c, command, 1);
 294                 drv_data->config_xfer(i2c, addr, 2);
 295                 if (read_write == I2C_SMBUS_WRITE)
 296                         drv_data->writel(i2c, data->word);
 297                 break;
 298
 299         case I2C_SMBUS_BLOCK_DATA:
 300                 pr_debug("I2C_SMBUS_BLOCK_DATA %02x, read %d, len %d\n",
 301                         addr, read_write, data->block[0]);
 302                 drv_data->reg_addr_set(i2c, command, 1);
 303                 drv_data->config_xfer(i2c, addr, data->block[0]);
 304                 if (read_write == I2C_SMBUS_WRITE)
 305                         drv_data->write(i2c, &data->block[1], data->block[0]);
 306                 len = data->block[0];
 307                 break;
 308
 309         default:
 310                 dev_warn(&adap->dev, "Unsupported transaction %d\n", size);
 311                 return -EOPNOTSUPP;
 312         }
 313
 314         ret = drv_data->execute_xfer(i2c, read_write, size, data, len);
 315
 316         mutex_unlock(&i2c_lock);
 317
 318         return ret;
 319 }
 320
 321 static u32 rtl9300_i2c_func(struct i2c_adapter *a)
 322 {
 323         return I2C_FUNC_SMBUS_QUICK | I2C_FUNC_SMBUS_BYTE |
 324                I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_WORD_DATA |
 325                I2C_FUNC_SMBUS_BLOCK_DATA;
 326 }
 327
 328 static const struct i2c_algorithm rtl9300_i2c_algo = {
 329         .smbus_xfer     = rtl9300_i2c_smbus_xfer,
 330         .functionality  = rtl9300_i2c_func,
 331 };
 332
 333 struct i2c_adapter_quirks rtl9300_i2c_quirks = {
 334         .flags          = I2C_AQ_NO_CLK_STRETCH,
 335         .max_read_len   = 16,
 336         .max_write_len  = 16,
 337 };
 338
 339 static int rtl9300_i2c_probe(struct platform_device *pdev)
 340 {
 341         struct resource *res;
 342         struct rtl9300_i2c *i2c;
 343         struct i2c_adapter *adap;
 344         struct i2c_drv_data *drv_data;
 345         struct device_node *node = pdev->dev.of_node;
 346         u32 clock_freq, pin;
 347         int ret = 0;
 348
 349         pr_info("%s probing I2C adapter\n", __func__);
 350
 351         if (!node) {
 352                 dev_err(i2c->dev, "No DT found\n");
 353                 return -EINVAL;
 354         }
 355
 356         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 357
 358         drv_data = (struct i2c_drv_data *) device_get_match_data(&pdev->dev);
 359
 360         i2c = devm_kzalloc(&pdev->dev, sizeof(struct rtl9300_i2c), GFP_KERNEL);
 361         if (!i2c)
 362                 return -ENOMEM;
 363
 364         i2c->base = devm_ioremap_resource(&pdev->dev, res);
 365         i2c->mst2_offset = drv_data->mst2_offset;
 366         if (IS_ERR(i2c->base))
 367                 return PTR_ERR(i2c->base);
 368
 369         pr_debug("%s base memory %08x\n", __func__, (u32)i2c->base);
 370         i2c->dev = &pdev->dev;
 371
 372         if (of_property_read_u32(node, "clock-frequency", &clock_freq)) {
 373                 clock_freq = I2C_MAX_STANDARD_MODE_FREQ;
 374         }
 375         switch(clock_freq) {
 376         case I2C_MAX_STANDARD_MODE_FREQ:
 377                 i2c->bus_freq = RTL9300_I2C_STD_FREQ;
 378                 break;
 379
 380         case I2C_MAX_FAST_MODE_FREQ:
 381                 i2c->bus_freq = RTL9300_I2C_FAST_FREQ;
 382                 break;
 383         default:
 384                 dev_warn(i2c->dev, "clock-frequency %d not supported\n", clock_freq);
 385                 return -EINVAL;
 386         }
 387
 388         dev_info(&pdev->dev, "SCL speed %d, mode is %d\n", clock_freq, i2c->bus_freq);
 389
 390         if (of_property_read_u32(node, "scl-pin", &pin)) {
 391                 dev_warn(i2c->dev, "SCL pin not found in DT, using default\n");
 392                 pin = drv_data->scl0_pin;
 393         }
 394         if (!(pin == drv_data->scl0_pin || pin == drv_data->scl1_pin)) {
 395                 dev_warn(i2c->dev, "SCL pin %d not supported\n", pin);
 396                 return -EINVAL;
 397         }
 398         i2c->scl_num = pin == drv_data->scl0_pin ? 0 : 1;
 399         pr_info("%s scl_num %d\n", __func__, i2c->scl_num);
 400
 401         if (of_property_read_u32(node, "sda-pin", &pin)) {
 402                 dev_warn(i2c->dev, "SDA pin not found in DT, using default \n");
 403                 pin = drv_data->sda0_pin;
 404         }
 405         i2c->sda_num = pin - drv_data->sda0_pin;
 406         if (i2c->sda_num < 0 || i2c->sda_num > 7) {
 407                 dev_warn(i2c->dev, "SDA pin %d not supported\n", pin);
 408                 return -EINVAL;
 409         }
 410         pr_info("%s sda_num %d\n", __func__, i2c->sda_num);
 411
 412         adap = &i2c->adap;
 413         adap->owner = THIS_MODULE;
 414         adap->algo = &rtl9300_i2c_algo;
 415         adap->retries = 3;
 416         adap->dev.parent = &pdev->dev;
 417         i2c_set_adapdata(adap, i2c);
 418         adap->dev.of_node = node;
 419         strlcpy(adap->name, dev_name(&pdev->dev), sizeof(adap->name));
 420
 421         platform_set_drvdata(pdev, i2c);
 422
 423         drv_data->config_io(i2c, i2c->scl_num, i2c->sda_num);
 424
 425         ret = i2c_add_adapter(adap);
 426
 427         return ret;
 428 }
 429
 430 static int rtl9300_i2c_remove(struct platform_device *pdev)
 431 {
 432         struct rtl9300_i2c *i2c = platform_get_drvdata(pdev);
 433
 434         i2c_del_adapter(&i2c->adap);
 435
 436         return 0;
 437 }
 438
 439 struct i2c_drv_data rtl9300_i2c_drv_data = {
 440         .scl0_pin = 8,
 441         .scl1_pin = 17,
 442         .sda0_pin = 9,
 443         .read = rtl9300_i2c_read,
 444         .read = rtl9300_i2c_write,
 445         .reg_addr_set = rtl9300_i2c_reg_addr_set,
 446         .config_xfer = rtl9300_i2c_config_xfer,
 447         .execute_xfer = rtl9300_execute_xfer,
 448         .writel = rtl9300_writel,
 449         .config_io = rtl9300_i2c_config_io,
 450         .mst2_offset = 0x1c,
 451 };
 452
 453 struct i2c_drv_data rtl9310_i2c_drv_data = {
 454         .scl0_pin = 13,
 455         .scl1_pin = 14,
 456         .sda0_pin = 0,
 457         .read = rtl9310_i2c_read,
 458         .read = rtl9310_i2c_write,
 459         .reg_addr_set = rtl9310_i2c_reg_addr_set,
 460         .config_xfer = rtl9310_i2c_config_xfer,
 461         .execute_xfer = rtl9310_execute_xfer,
 462         .writel = rtl9310_writel,
 463         .config_io = rtl9310_i2c_config_io,
 464         .mst2_offset = 0x18,
 465 };
 466
 467 static const struct of_device_id i2c_rtl9300_dt_ids[] = {
 468         { .compatible = "realtek,rtl9300-i2c", .data = (void *) &rtl9300_i2c_drv_data },
 469         { .compatible = "realtek,rtl9310-i2c", .data = (void *) &rtl9310_i2c_drv_data },
 470         { /* sentinel */ }
 471 };
 472 MODULE_DEVICE_TABLE(of, rtl838x_eth_of_ids);
 473
 474 static struct platform_driver rtl9300_i2c_driver = {
 475         .probe          = rtl9300_i2c_probe,
 476         .remove         = rtl9300_i2c_remove,
 477         .driver         = {
 478                 .name   = "i2c-rtl9300",
 479                 .pm     = NULL,
 480                 .of_match_table = i2c_rtl9300_dt_ids,
 481         },
 482 };
 483
 484 module_platform_driver(rtl9300_i2c_driver);
 485
 486 MODULE_AUTHOR("Birger Koblitz");
 487 MODULE_DESCRIPTION("RTL9300 I2C host driver");
 488 MODULE_LICENSE("GPL v2");