target/linux/realtek/files-5.10/drivers/i2c/busses/i2c-rtl9300.h

   1 #ifndef I2C_RTL9300_H
   2 #define I2C_RTL9300_H
   3
   4 #include <linux/i2c.h>
   5
   6 #define RTL9300_I2C_CTRL1                       0x00
   7 #define RTL9300_I2C_CTRL1_MEM_ADDR              8
   8 #define RTL9300_I2C_CTRL1_SDA_OUT_SEL           4
   9 #define RTL9300_I2C_CTRL1_GPIO8_SCL_SEL         3
  10 #define RTL9300_I2C_CTRL1_RWOP                  2
  11 #define RTL9300_I2C_CTRL1_I2C_FAIL              1
  12 #define RTL9300_I2C_CTRL1_I2C_TRIG              0
  13
  14 #define RTL9300_I2C_CTRL2                       0x04
  15 #define RTL9300_I2C_CTRL2_DRIVE_ACK_DELAY       20
  16 #define RTL9300_I2C_CTRL2_CHECK_ACK_DELAY       16
  17 #define RTL9300_I2C_CTRL2_READ_MODE             15
  18 #define RTL9300_I2C_CTRL2_DEV_ADDR              8
  19 #define RTL9300_I2C_CTRL2_DATA_WIDTH            4
  20 #define RTL9300_I2C_CTRL2_MADDR_WIDTH           2
  21 #define RTL9300_I2C_CTRL2_SCL_FREQ              0
  22
  23 #define RTL9300_I2C_DATA_WORD0                  0x08
  24
  25 #define RTL9300_I2C_MST_GLB_CTRL                0x18
  26
  27 #define RTL9310_I2C_MST_IF_CTRL                 0x00
  28
  29 #define RTL9310_I2C_MST_IF_SEL                  0x04
  30 #define RTL9310_I2C_MST_IF_SEL_GPIO_SCL_SEL     12
  31
  32 #define RTL9310_I2C_CTRL                        0x08
  33 #define RTL9310_I2C_CTRL_SCL_FREQ               30
  34 #define RTL9310_I2C_CTRL_CHECK_ACK_DELAY        26
  35 #define RTL9310_I2C_CTRL_DRIVE_ACK_DELAY        22
  36 #define RTL9310_I2C_CTRL_SDA_OUT_SEL            18
  37 #define RTL9310_I2C_CTRL_DEV_ADDR               11
  38 #define RTL9310_I2C_CTRL_MADDR_WIDTH            9
  39 #define RTL9310_I2C_CTRL_DATA_WIDTH             5
  40 #define RTL9310_I2C_CTRL_READ_MODE              4
  41 #define RTL9310_I2C_CTRL_RWOP                   2
  42 #define RTL9310_I2C_CTRL_I2C_FAIL               1
  43 #define RTL9310_I2C_CTRL_I2C_TRIG               0
  44
  45 #define RTL9310_I2C_MEMADDR                     0x0c
  46
  47 #define RTL9310_I2C_DATA                        0x10
  48
  49 #define RTL9300_I2C_STD_FREQ            0
  50 #define RTL9300_I2C_FAST_FREQ           1
  51
  52 struct rtl9300_i2c {
  53         void __iomem *base;
  54         u32 mst2_offset;
  55         struct device *dev;
  56         struct i2c_adapter adap;
  57         u8 bus_freq;
  58         u8 sda_num;                     // SDA channel number
  59         u8 scl_num;                     // SCL channel, mapping to master 1 or 2
  60 };
  61
  62 #endif