Rename and reorganize backported patches.
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
--- /dev/null
+From faf3c25e51a7e91b69ea26da72c74a8786af7968 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= <noltari@gmail.com>
+Date: Mon, 22 Feb 2021 21:33:50 +0100
+Subject: [PATCH] mips: bmips: init clocks earlier
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+device_initcall() is too late for bcm63xx.
+We need to call of_clk_init() earlier in order to properly boot.
+
+Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
+Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
+---
+ arch/mips/bmips/setup.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/arch/mips/bmips/setup.c
++++ b/arch/mips/bmips/setup.c
+@@ -201,4 +201,4 @@ static int __init plat_dev_init(void)
+ return 0;
+ }
+
+-device_initcall(plat_dev_init);
++arch_initcall(plat_dev_init);
--- /dev/null
+From 73ae625da5c36300fccd809738e7c68f49ebce35 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= <noltari@gmail.com>
+Date: Tue, 23 Feb 2021 16:18:50 +0100
+Subject: [PATCH 1/2] spi: bcm63xx-spi: fix pm_runtime
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+The driver sets auto_runtime_pm to true, but it doesn't call
+pm_runtime_enable(), which results in "Failed to power device" when PM support
+is enabled.
+
+Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
+Link: https://lore.kernel.org/r/20210223151851.4110-2-noltari@gmail.com
+Signed-off-by: Mark Brown <broonie@kernel.org>
+---
+ drivers/spi/spi-bcm63xx.c | 6 +++++-
+ 1 file changed, 5 insertions(+), 1 deletion(-)
+
+--- a/drivers/spi/spi-bcm63xx.c
++++ b/drivers/spi/spi-bcm63xx.c
+@@ -593,11 +593,13 @@ static int bcm63xx_spi_probe(struct plat
+
+ bcm_spi_writeb(bs, SPI_INTR_CLEAR_ALL, SPI_INT_STATUS);
+
++ pm_runtime_enable(&pdev->dev);
++
+ /* register and we are done */
+ ret = devm_spi_register_master(dev, master);
+ if (ret) {
+ dev_err(dev, "spi register failed\n");
+- goto out_clk_disable;
++ goto out_pm_disable;
+ }
+
+ dev_info(dev, "at %pr (irq %d, FIFOs size %d)\n",
+@@ -605,6 +607,8 @@ static int bcm63xx_spi_probe(struct plat
+
+ return 0;
+
++out_pm_disable:
++ pm_runtime_disable(&pdev->dev);
+ out_clk_disable:
+ clk_disable_unprepare(clk);
+ out_err:
--- /dev/null
+From 216e8e80057a9f0b6366327881acf88eaf9f1fd4 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= <noltari@gmail.com>
+Date: Tue, 23 Feb 2021 16:18:51 +0100
+Subject: [PATCH 2/2] spi: bcm63xx-hsspi: fix pm_runtime
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+The driver sets auto_runtime_pm to true, but it doesn't call
+pm_runtime_enable(), which results in "Failed to power device" when PM support
+is enabled.
+
+Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
+Link: https://lore.kernel.org/r/20210223151851.4110-3-noltari@gmail.com
+Signed-off-by: Mark Brown <broonie@kernel.org>
+---
+ drivers/spi/spi-bcm63xx-hsspi.c | 7 ++++++-
+ 1 file changed, 6 insertions(+), 1 deletion(-)
+
+--- a/drivers/spi/spi-bcm63xx-hsspi.c
++++ b/drivers/spi/spi-bcm63xx-hsspi.c
+@@ -21,6 +21,7 @@
+ #include <linux/mutex.h>
+ #include <linux/of.h>
+ #include <linux/reset.h>
++#include <linux/pm_runtime.h>
+
+ #define HSSPI_GLOBAL_CTRL_REG 0x0
+ #define GLOBAL_CTRL_CS_POLARITY_SHIFT 0
+@@ -439,13 +440,17 @@ static int bcm63xx_hsspi_probe(struct pl
+ if (ret)
+ goto out_put_master;
+
++ pm_runtime_enable(&pdev->dev);
++
+ /* register and we are done */
+ ret = devm_spi_register_master(dev, master);
+ if (ret)
+- goto out_put_master;
++ goto out_pm_disable;
+
+ return 0;
+
++out_pm_disable:
++ pm_runtime_disable(&pdev->dev);
+ out_put_master:
+ spi_master_put(master);
+ out_disable_pll_clk:
+++ /dev/null
-From faf3c25e51a7e91b69ea26da72c74a8786af7968 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= <noltari@gmail.com>
-Date: Mon, 22 Feb 2021 21:33:50 +0100
-Subject: [PATCH] mips: bmips: init clocks earlier
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-device_initcall() is too late for bcm63xx.
-We need to call of_clk_init() earlier in order to properly boot.
-
-Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
-Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
----
- arch/mips/bmips/setup.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/arch/mips/bmips/setup.c
-+++ b/arch/mips/bmips/setup.c
-@@ -201,4 +201,4 @@ static int __init plat_dev_init(void)
- return 0;
- }
-
--device_initcall(plat_dev_init);
-+arch_initcall(plat_dev_init);
--- /dev/null
+From c0f41a0dac1f3db6c40aabc0f3ac8868709ba6a6 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= <noltari@gmail.com>
+Date: Wed, 24 Feb 2021 08:33:36 +0100
+Subject: [PATCH] mips: smp-bmips: fix CPU mappings
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+When booting bmips with SMP enabled on a BCM6358 running on CPU #1 instead of
+CPU #0, the current CPU mapping code produces the following:
+- smp_processor_id(): 0
+- cpu_logical_map(0): 1
+- cpu_number_map(0): 1
+
+This is because SMP isn't supported on BCM6358 since it has a shared TLB, so
+it is disabled and max_cpus is decreased from 2 to 1.
+
+Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
+Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
+Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
+---
+ arch/mips/kernel/smp-bmips.c | 27 +++++++++++++++++----------
+ 1 file changed, 17 insertions(+), 10 deletions(-)
+
+--- a/arch/mips/kernel/smp-bmips.c
++++ b/arch/mips/kernel/smp-bmips.c
+@@ -134,17 +134,24 @@ static void __init bmips_smp_setup(void)
+ if (!board_ebase_setup)
+ board_ebase_setup = &bmips_ebase_setup;
+
+- __cpu_number_map[boot_cpu] = 0;
+- __cpu_logical_map[0] = boot_cpu;
++ if (max_cpus > 1) {
++ __cpu_number_map[boot_cpu] = 0;
++ __cpu_logical_map[0] = boot_cpu;
+
+- for (i = 0; i < max_cpus; i++) {
+- if (i != boot_cpu) {
+- __cpu_number_map[i] = cpu;
+- __cpu_logical_map[cpu] = i;
+- cpu++;
++ for (i = 0; i < max_cpus; i++) {
++ if (i != boot_cpu) {
++ __cpu_number_map[i] = cpu;
++ __cpu_logical_map[cpu] = i;
++ cpu++;
++ }
++ set_cpu_possible(i, 1);
++ set_cpu_present(i, 1);
+ }
+- set_cpu_possible(i, 1);
+- set_cpu_present(i, 1);
++ } else {
++ __cpu_number_map[0] = boot_cpu;
++ __cpu_logical_map[0] = 0;
++ set_cpu_possible(0, 1);
++ set_cpu_present(0, 1);
+ }
+ }
+
+++ /dev/null
-From 73ae625da5c36300fccd809738e7c68f49ebce35 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= <noltari@gmail.com>
-Date: Tue, 23 Feb 2021 16:18:50 +0100
-Subject: [PATCH 1/2] spi: bcm63xx-spi: fix pm_runtime
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-The driver sets auto_runtime_pm to true, but it doesn't call
-pm_runtime_enable(), which results in "Failed to power device" when PM support
-is enabled.
-
-Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
-Link: https://lore.kernel.org/r/20210223151851.4110-2-noltari@gmail.com
-Signed-off-by: Mark Brown <broonie@kernel.org>
----
- drivers/spi/spi-bcm63xx.c | 6 +++++-
- 1 file changed, 5 insertions(+), 1 deletion(-)
-
---- a/drivers/spi/spi-bcm63xx.c
-+++ b/drivers/spi/spi-bcm63xx.c
-@@ -593,11 +593,13 @@ static int bcm63xx_spi_probe(struct plat
-
- bcm_spi_writeb(bs, SPI_INTR_CLEAR_ALL, SPI_INT_STATUS);
-
-+ pm_runtime_enable(&pdev->dev);
-+
- /* register and we are done */
- ret = devm_spi_register_master(dev, master);
- if (ret) {
- dev_err(dev, "spi register failed\n");
-- goto out_clk_disable;
-+ goto out_pm_disable;
- }
-
- dev_info(dev, "at %pr (irq %d, FIFOs size %d)\n",
-@@ -605,6 +607,8 @@ static int bcm63xx_spi_probe(struct plat
-
- return 0;
-
-+out_pm_disable:
-+ pm_runtime_disable(&pdev->dev);
- out_clk_disable:
- clk_disable_unprepare(clk);
- out_err:
--- /dev/null
+From 095b4dabff2a929cefd330110c5c578956213188 Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= <noltari@gmail.com>
+Date: Wed, 24 Feb 2021 09:02:10 +0100
+Subject: [PATCH] mtd: rawnand: brcmnand: fix OOB R/W with Hamming ECC
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+Hamming ECC doesn't cover the OOB data, so reading or writing OOB shall
+always be done without ECC enabled.
+This is a problem when adding JFFS2 cleanmarkers to erased blocks. If JFFS2
+clenmarkers are added to the OOB with ECC enabled, OOB bytes will be changed
+from ff ff ff to 00 00 00, reporting incorrect ECC errors.
+
+Fixes: 27c5b17cd1b1 ("mtd: nand: add NAND driver "library" for Broadcom STB NAND controller")
+Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
+Acked-by: Brian Norris <computersforpeace@gmail.com>
+Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
+Link: https://lore.kernel.org/linux-mtd/20210224080210.23686-1-noltari@gmail.com
+---
+ drivers/mtd/nand/raw/brcmnand/brcmnand.c | 6 ++++++
+ 1 file changed, 6 insertions(+)
+
+--- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c
++++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c
+@@ -2688,6 +2688,12 @@ static int brcmnand_attach_chip(struct n
+
+ ret = brcmstb_choose_ecc_layout(host);
+
++ /* If OOB is written with ECC enabled it will cause ECC errors */
++ if (is_hamming_ecc(host->ctrl, &host->hwcfg)) {
++ chip->ecc.write_oob = brcmnand_write_oob_raw;
++ chip->ecc.read_oob = brcmnand_read_oob_raw;
++ }
++
+ return ret;
+ }
+
+++ /dev/null
-From 216e8e80057a9f0b6366327881acf88eaf9f1fd4 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= <noltari@gmail.com>
-Date: Tue, 23 Feb 2021 16:18:51 +0100
-Subject: [PATCH 2/2] spi: bcm63xx-hsspi: fix pm_runtime
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-The driver sets auto_runtime_pm to true, but it doesn't call
-pm_runtime_enable(), which results in "Failed to power device" when PM support
-is enabled.
-
-Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
-Link: https://lore.kernel.org/r/20210223151851.4110-3-noltari@gmail.com
-Signed-off-by: Mark Brown <broonie@kernel.org>
----
- drivers/spi/spi-bcm63xx-hsspi.c | 7 ++++++-
- 1 file changed, 6 insertions(+), 1 deletion(-)
-
---- a/drivers/spi/spi-bcm63xx-hsspi.c
-+++ b/drivers/spi/spi-bcm63xx-hsspi.c
-@@ -21,6 +21,7 @@
- #include <linux/mutex.h>
- #include <linux/of.h>
- #include <linux/reset.h>
-+#include <linux/pm_runtime.h>
-
- #define HSSPI_GLOBAL_CTRL_REG 0x0
- #define GLOBAL_CTRL_CS_POLARITY_SHIFT 0
-@@ -439,13 +440,17 @@ static int bcm63xx_hsspi_probe(struct pl
- if (ret)
- goto out_put_master;
-
-+ pm_runtime_enable(&pdev->dev);
-+
- /* register and we are done */
- ret = devm_spi_register_master(dev, master);
- if (ret)
-- goto out_put_master;
-+ goto out_pm_disable;
-
- return 0;
-
-+out_pm_disable:
-+ pm_runtime_disable(&pdev->dev);
- out_put_master:
- spi_master_put(master);
- out_disable_pll_clk:
--- /dev/null
+From 0618e07ea3e0981d7765b43d3f7db39e739842eb Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= <noltari@gmail.com>
+Date: Fri, 5 Mar 2021 08:01:30 +0100
+Subject: [PATCH 1/3] dt-bindings: rng: bcm2835: add clock constraints
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+brcm,bcm6368-rng controllers require enabling the IPSEC clock in order to get
+a functional RNG.
+
+Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
+Reviewed-by: Rob Herring <robh@kernel.org>
+Acked-by: Florian Fainelli <f.fainelli@gmail.com>
+Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+---
+ .../devicetree/bindings/rng/brcm,bcm2835.yaml | 10 ++++++++++
+ 1 file changed, 10 insertions(+)
+
+--- a/Documentation/devicetree/bindings/rng/brcm,bcm2835.yaml
++++ b/Documentation/devicetree/bindings/rng/brcm,bcm2835.yaml
+@@ -35,6 +35,16 @@ required:
+ - compatible
+ - reg
+
++if:
++ properties:
++ compatible:
++ enum:
++ - brcm,bcm6368-rng
++then:
++ required:
++ - clocks
++ - clock-names
++
+ additionalProperties: false
+
+ examples:
--- /dev/null
+From 381345820db55bf8e7289de047c24c00a2e3690d Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= <noltari@gmail.com>
+Date: Fri, 5 Mar 2021 08:01:31 +0100
+Subject: [PATCH 2/3] dt-bindings: rng: bcm2835: document reset support
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+brcm,bcm6368-rng controllers require resetting the IPSEC clock in order to get
+a functional RNG.
+
+Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
+Reviewed-by: Rob Herring <robh@kernel.org>
+Acked-by: Florian Fainelli <f.fainelli@gmail.com>
+Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+---
+ .../devicetree/bindings/rng/brcm,bcm2835.yaml | 11 +++++++++++
+ 1 file changed, 11 insertions(+)
+
+--- a/Documentation/devicetree/bindings/rng/brcm,bcm2835.yaml
++++ b/Documentation/devicetree/bindings/rng/brcm,bcm2835.yaml
+@@ -28,6 +28,12 @@ properties:
+ clock-names:
+ const: ipsec
+
++ resets:
++ maxItems: 1
++
++ reset-names:
++ const: ipsec
++
+ interrupts:
+ maxItems: 1
+
+@@ -44,6 +50,8 @@ then:
+ required:
+ - clocks
+ - clock-names
++ - resets
++ - reset-names
+
+ additionalProperties: false
+
+@@ -68,4 +76,7 @@ examples:
+
+ clocks = <&periph_clk 18>;
+ clock-names = "ipsec";
++
++ resets = <&periph_rst 4>;
++ reset-names = "ipsec";
+ };
--- /dev/null
+From e5f9f41d5e62004c913bfd4ddf06abe032f5ce1c Mon Sep 17 00:00:00 2001
+From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= <noltari@gmail.com>
+Date: Fri, 5 Mar 2021 08:01:32 +0100
+Subject: [PATCH 3/3] hwrng: bcm2835 - add reset support
+MIME-Version: 1.0
+Content-Type: text/plain; charset=UTF-8
+Content-Transfer-Encoding: 8bit
+
+BCM6368 devices need to reset the IPSEC controller in order to generate true
+random numbers.
+
+This is what BCM6368 produces without a reset:
+root@OpenWrt:/# cat /dev/hwrng | rngtest -c 1000
+rngtest 6.10
+Copyright (c) 2004 by Henrique de Moraes Holschuh
+This is free software; see the source for copying conditions. There is NO warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
+
+rngtest: starting FIPS tests...
+rngtest: bits received from input: 20000032
+rngtest: FIPS 140-2 successes: 0
+rngtest: FIPS 140-2 failures: 1000
+rngtest: FIPS 140-2(2001-10-10) Monobit: 2
+rngtest: FIPS 140-2(2001-10-10) Poker: 1000
+rngtest: FIPS 140-2(2001-10-10) Runs: 1000
+rngtest: FIPS 140-2(2001-10-10) Long run: 30
+rngtest: FIPS 140-2(2001-10-10) Continuous run: 0
+rngtest: input channel speed: (min=37.253; avg=320.827; max=635.783)Mibits/s
+rngtest: FIPS tests speed: (min=12.141; avg=15.034; max=16.428)Mibits/s
+rngtest: Program run time: 1336176 microseconds
+
+Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
+Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
+Acked-by: Florian Fainelli <f.fainelli@gmail.com>
+Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
+---
+ drivers/char/hw_random/bcm2835-rng.c | 10 ++++++++++
+ 1 file changed, 10 insertions(+)
+
+--- a/drivers/char/hw_random/bcm2835-rng.c
++++ b/drivers/char/hw_random/bcm2835-rng.c
+@@ -13,6 +13,7 @@
+ #include <linux/platform_device.h>
+ #include <linux/printk.h>
+ #include <linux/clk.h>
++#include <linux/reset.h>
+
+ #define RNG_CTRL 0x0
+ #define RNG_STATUS 0x4
+@@ -32,6 +33,7 @@ struct bcm2835_rng_priv {
+ void __iomem *base;
+ bool mask_interrupts;
+ struct clk *clk;
++ struct reset_control *reset;
+ };
+
+ static inline struct bcm2835_rng_priv *to_rng_priv(struct hwrng *rng)
+@@ -94,6 +96,10 @@ static int bcm2835_rng_init(struct hwrng
+ return ret;
+ }
+
++ ret = reset_control_reset(priv->reset);
++ if (ret)
++ return ret;
++
+ if (priv->mask_interrupts) {
+ /* mask the interrupt */
+ val = rng_readl(priv, RNG_INT_MASK);
+@@ -159,6 +165,10 @@ static int bcm2835_rng_probe(struct plat
+ if (PTR_ERR(priv->clk) == -EPROBE_DEFER)
+ return -EPROBE_DEFER;
+
++ priv->reset = devm_reset_control_get_optional_exclusive(dev, NULL);
++ if (IS_ERR(priv->reset))
++ return PTR_ERR(priv->reset);
++
+ priv->rng.name = pdev->name;
+ priv->rng.init = bcm2835_rng_init;
+ priv->rng.read = bcm2835_rng_read;
+++ /dev/null
-From c0f41a0dac1f3db6c40aabc0f3ac8868709ba6a6 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= <noltari@gmail.com>
-Date: Wed, 24 Feb 2021 08:33:36 +0100
-Subject: [PATCH] mips: smp-bmips: fix CPU mappings
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-When booting bmips with SMP enabled on a BCM6358 running on CPU #1 instead of
-CPU #0, the current CPU mapping code produces the following:
-- smp_processor_id(): 0
-- cpu_logical_map(0): 1
-- cpu_number_map(0): 1
-
-This is because SMP isn't supported on BCM6358 since it has a shared TLB, so
-it is disabled and max_cpus is decreased from 2 to 1.
-
-Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
-Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
-Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
----
- arch/mips/kernel/smp-bmips.c | 27 +++++++++++++++++----------
- 1 file changed, 17 insertions(+), 10 deletions(-)
-
---- a/arch/mips/kernel/smp-bmips.c
-+++ b/arch/mips/kernel/smp-bmips.c
-@@ -134,17 +134,24 @@ static void __init bmips_smp_setup(void)
- if (!board_ebase_setup)
- board_ebase_setup = &bmips_ebase_setup;
-
-- __cpu_number_map[boot_cpu] = 0;
-- __cpu_logical_map[0] = boot_cpu;
-+ if (max_cpus > 1) {
-+ __cpu_number_map[boot_cpu] = 0;
-+ __cpu_logical_map[0] = boot_cpu;
-
-- for (i = 0; i < max_cpus; i++) {
-- if (i != boot_cpu) {
-- __cpu_number_map[i] = cpu;
-- __cpu_logical_map[cpu] = i;
-- cpu++;
-+ for (i = 0; i < max_cpus; i++) {
-+ if (i != boot_cpu) {
-+ __cpu_number_map[i] = cpu;
-+ __cpu_logical_map[cpu] = i;
-+ cpu++;
-+ }
-+ set_cpu_possible(i, 1);
-+ set_cpu_present(i, 1);
- }
-- set_cpu_possible(i, 1);
-- set_cpu_present(i, 1);
-+ } else {
-+ __cpu_number_map[0] = boot_cpu;
-+ __cpu_logical_map[0] = 0;
-+ set_cpu_possible(0, 1);
-+ set_cpu_present(0, 1);
- }
- }
-
+++ /dev/null
-From 095b4dabff2a929cefd330110c5c578956213188 Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= <noltari@gmail.com>
-Date: Wed, 24 Feb 2021 09:02:10 +0100
-Subject: [PATCH] mtd: rawnand: brcmnand: fix OOB R/W with Hamming ECC
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-Hamming ECC doesn't cover the OOB data, so reading or writing OOB shall
-always be done without ECC enabled.
-This is a problem when adding JFFS2 cleanmarkers to erased blocks. If JFFS2
-clenmarkers are added to the OOB with ECC enabled, OOB bytes will be changed
-from ff ff ff to 00 00 00, reporting incorrect ECC errors.
-
-Fixes: 27c5b17cd1b1 ("mtd: nand: add NAND driver "library" for Broadcom STB NAND controller")
-Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
-Acked-by: Brian Norris <computersforpeace@gmail.com>
-Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
-Link: https://lore.kernel.org/linux-mtd/20210224080210.23686-1-noltari@gmail.com
----
- drivers/mtd/nand/raw/brcmnand/brcmnand.c | 6 ++++++
- 1 file changed, 6 insertions(+)
-
---- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c
-+++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c
-@@ -2688,6 +2688,12 @@ static int brcmnand_attach_chip(struct n
-
- ret = brcmstb_choose_ecc_layout(host);
-
-+ /* If OOB is written with ECC enabled it will cause ECC errors */
-+ if (is_hamming_ecc(host->ctrl, &host->hwcfg)) {
-+ chip->ecc.write_oob = brcmnand_write_oob_raw;
-+ chip->ecc.read_oob = brcmnand_read_oob_raw;
-+ }
-+
- return ret;
- }
-
+++ /dev/null
-From 0618e07ea3e0981d7765b43d3f7db39e739842eb Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= <noltari@gmail.com>
-Date: Fri, 5 Mar 2021 08:01:30 +0100
-Subject: [PATCH 1/3] dt-bindings: rng: bcm2835: add clock constraints
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-brcm,bcm6368-rng controllers require enabling the IPSEC clock in order to get
-a functional RNG.
-
-Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
-Reviewed-by: Rob Herring <robh@kernel.org>
-Acked-by: Florian Fainelli <f.fainelli@gmail.com>
-Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
----
- .../devicetree/bindings/rng/brcm,bcm2835.yaml | 10 ++++++++++
- 1 file changed, 10 insertions(+)
-
---- a/Documentation/devicetree/bindings/rng/brcm,bcm2835.yaml
-+++ b/Documentation/devicetree/bindings/rng/brcm,bcm2835.yaml
-@@ -35,6 +35,16 @@ required:
- - compatible
- - reg
-
-+if:
-+ properties:
-+ compatible:
-+ enum:
-+ - brcm,bcm6368-rng
-+then:
-+ required:
-+ - clocks
-+ - clock-names
-+
- additionalProperties: false
-
- examples:
+++ /dev/null
-From 381345820db55bf8e7289de047c24c00a2e3690d Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= <noltari@gmail.com>
-Date: Fri, 5 Mar 2021 08:01:31 +0100
-Subject: [PATCH 2/3] dt-bindings: rng: bcm2835: document reset support
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-brcm,bcm6368-rng controllers require resetting the IPSEC clock in order to get
-a functional RNG.
-
-Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
-Reviewed-by: Rob Herring <robh@kernel.org>
-Acked-by: Florian Fainelli <f.fainelli@gmail.com>
-Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
----
- .../devicetree/bindings/rng/brcm,bcm2835.yaml | 11 +++++++++++
- 1 file changed, 11 insertions(+)
-
---- a/Documentation/devicetree/bindings/rng/brcm,bcm2835.yaml
-+++ b/Documentation/devicetree/bindings/rng/brcm,bcm2835.yaml
-@@ -28,6 +28,12 @@ properties:
- clock-names:
- const: ipsec
-
-+ resets:
-+ maxItems: 1
-+
-+ reset-names:
-+ const: ipsec
-+
- interrupts:
- maxItems: 1
-
-@@ -44,6 +50,8 @@ then:
- required:
- - clocks
- - clock-names
-+ - resets
-+ - reset-names
-
- additionalProperties: false
-
-@@ -68,4 +76,7 @@ examples:
-
- clocks = <&periph_clk 18>;
- clock-names = "ipsec";
-+
-+ resets = <&periph_rst 4>;
-+ reset-names = "ipsec";
- };
+++ /dev/null
-From e5f9f41d5e62004c913bfd4ddf06abe032f5ce1c Mon Sep 17 00:00:00 2001
-From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= <noltari@gmail.com>
-Date: Fri, 5 Mar 2021 08:01:32 +0100
-Subject: [PATCH 3/3] hwrng: bcm2835 - add reset support
-MIME-Version: 1.0
-Content-Type: text/plain; charset=UTF-8
-Content-Transfer-Encoding: 8bit
-
-BCM6368 devices need to reset the IPSEC controller in order to generate true
-random numbers.
-
-This is what BCM6368 produces without a reset:
-root@OpenWrt:/# cat /dev/hwrng | rngtest -c 1000
-rngtest 6.10
-Copyright (c) 2004 by Henrique de Moraes Holschuh
-This is free software; see the source for copying conditions. There is NO warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
-
-rngtest: starting FIPS tests...
-rngtest: bits received from input: 20000032
-rngtest: FIPS 140-2 successes: 0
-rngtest: FIPS 140-2 failures: 1000
-rngtest: FIPS 140-2(2001-10-10) Monobit: 2
-rngtest: FIPS 140-2(2001-10-10) Poker: 1000
-rngtest: FIPS 140-2(2001-10-10) Runs: 1000
-rngtest: FIPS 140-2(2001-10-10) Long run: 30
-rngtest: FIPS 140-2(2001-10-10) Continuous run: 0
-rngtest: input channel speed: (min=37.253; avg=320.827; max=635.783)Mibits/s
-rngtest: FIPS tests speed: (min=12.141; avg=15.034; max=16.428)Mibits/s
-rngtest: Program run time: 1336176 microseconds
-
-Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
-Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
-Acked-by: Florian Fainelli <f.fainelli@gmail.com>
-Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
----
- drivers/char/hw_random/bcm2835-rng.c | 10 ++++++++++
- 1 file changed, 10 insertions(+)
-
---- a/drivers/char/hw_random/bcm2835-rng.c
-+++ b/drivers/char/hw_random/bcm2835-rng.c
-@@ -13,6 +13,7 @@
- #include <linux/platform_device.h>
- #include <linux/printk.h>
- #include <linux/clk.h>
-+#include <linux/reset.h>
-
- #define RNG_CTRL 0x0
- #define RNG_STATUS 0x4
-@@ -32,6 +33,7 @@ struct bcm2835_rng_priv {
- void __iomem *base;
- bool mask_interrupts;
- struct clk *clk;
-+ struct reset_control *reset;
- };
-
- static inline struct bcm2835_rng_priv *to_rng_priv(struct hwrng *rng)
-@@ -94,6 +96,10 @@ static int bcm2835_rng_init(struct hwrng
- return ret;
- }
-
-+ ret = reset_control_reset(priv->reset);
-+ if (ret)
-+ return ret;
-+
- if (priv->mask_interrupts) {
- /* mask the interrupt */
- val = rng_readl(priv, RNG_INT_MASK);
-@@ -159,6 +165,10 @@ static int bcm2835_rng_probe(struct plat
- if (PTR_ERR(priv->clk) == -EPROBE_DEFER)
- return -EPROBE_DEFER;
-
-+ priv->reset = devm_reset_control_get_optional_exclusive(dev, NULL);
-+ if (IS_ERR(priv->reset))
-+ return PTR_ERR(priv->reset);
-+
- priv->rng.name = pdev->name;
- priv->rng.init = bcm2835_rng_init;
- priv->rng.read = bcm2835_rng_read;
projects / openwrt / staging / ldir.git / commitdiff