target/linux/lantiq/files-4.14/arch/mips/boot/dts/EASY80920.dtsi

   1 #include "vr9.dtsi"
   2
   3 #include <dt-bindings/input/input.h>
   4
   5 / {
   6         compatible = "lantiq,easy80920", "lantiq,xway", "lantiq,vr9";
   7
   8         chosen {
   9                 bootargs = "console=ttyLTQ0,115200";
  10         };
  11
  12         aliases {
  13                 led-boot = &power;
  14                 led-failsafe = &power;
  15                 led-running = &power;
  16
  17                 led-usb = &led_usb1;
  18                 led-usb2 = &led_usb2;
  19         };
  20
  21         memory@0 {
  22                 reg = <0x0 0x4000000>;
  23         };
  24
  25         gphy-xrx200 {
  26                 compatible = "lantiq,phy-xrx200";
  27                 firmware1 = "lantiq/xrx200_phy11g_a14.bin";
  28                 firmware2 = "lantiq/xrx200_phy11g_a22.bin";
  29                 phys = [ 00 01 ];
  30         };
  31
  32         gpio-keys-polled {
  33                 compatible = "gpio-keys-polled";
  34                 #address-cells = <1>;
  35                 #size-cells = <0>;
  36                 poll-interval = <100>;
  37 /*              reset {
  38                         label = "reset";
  39                         gpios = <&gpio 7 GPIO_ACTIVE_LOW>;
  40                         linux,code = <KEY_RESTART>;
  41                 };*/
  42                 paging {
  43                         label = "paging";
  44                         gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
  45                         linux,code = <KEY_PHONE>;
  46                 };
  47         };
  48
  49         gpio-leds {
  50                 compatible = "gpio-leds";
  51
  52                 power: power {
  53                         label = "easy80920:green:power";
  54                         gpios = <&stp 9 GPIO_ACTIVE_HIGH>;
  55                         default-state = "keep";
  56                 };
  57                 warning {
  58                         label = "easy80920:green:warning";
  59                         gpios = <&stp 22 GPIO_ACTIVE_HIGH>;
  60                 };
  61                 fxs1 {
  62                         label = "easy80920:green:fxs1";
  63                         gpios = <&stp 21 GPIO_ACTIVE_HIGH>;
  64                 };
  65                 fxs2 {
  66                         label = "easy80920:green:fxs2";
  67                         gpios = <&stp 20 GPIO_ACTIVE_HIGH>;
  68                 };
  69                 fxo {
  70                         label = "easy80920:green:fxo";
  71                         gpios = <&stp 19 GPIO_ACTIVE_HIGH>;
  72                 };
  73                 led_usb1: usb1 {
  74                         label = "easy80920:green:usb1";
  75                         gpios = <&stp 18 GPIO_ACTIVE_HIGH>;
  76                 };
  77                 led_usb2: usb2 {
  78                         label = "easy80920:green:usb2";
  79                         gpios = <&stp 15 GPIO_ACTIVE_HIGH>;
  80                 };
  81                 sd {
  82                         label = "easy80920:green:sd";
  83                         gpios = <&stp 14 GPIO_ACTIVE_HIGH>;
  84                 };
  85                 wps {
  86                         label = "easy80920:green:wps";
  87                         gpios = <&stp 12 GPIO_ACTIVE_HIGH>;
  88                 };
  89         };
  90 };
  91
  92 &eth0 {
  93         lan: interface@0 {
  94                 compatible = "lantiq,xrx200-pdi";
  95                 #address-cells = <1>;
  96                 #size-cells = <0>;
  97                 reg = <0>;
  98                 lantiq,switch;
  99
 100                 ethernet@4 {
 101                         compatible = "lantiq,xrx200-pdi-port";
 102                         reg = <4>;
 103                         phy-mode = "gmii";
 104                         phy-handle = <&phy13>;
 105                 };
 106                 ethernet@2 {
 107                         compatible = "lantiq,xrx200-pdi-port";
 108                         reg = <2>;
 109                         phy-mode = "gmii";
 110                         phy-handle = <&phy11>;
 111                 };
 112                 ethernet@1 {
 113                         compatible = "lantiq,xrx200-pdi-port";
 114                         reg = <1>;
 115                         phy-mode = "rgmii";
 116                         phy-handle = <&phy1>;
 117                 };
 118                 ethernet@0 {
 119                         compatible = "lantiq,xrx200-pdi-port";
 120                         reg = <0>;
 121                         phy-mode = "rgmii";
 122                         phy-handle = <&phy0>;
 123                 };
 124         };
 125
 126         wan: interface@1 {
 127                 compatible = "lantiq,xrx200-pdi";
 128                 #address-cells = <1>;
 129                 #size-cells = <0>;
 130                 reg = <1>;
 131                 lantiq,wan;
 132
 133                 ethernet@5 {
 134                         compatible = "lantiq,xrx200-pdi-port";
 135                         reg = <5>;
 136                         phy-mode = "rgmii";
 137                         phy-handle = <&phy5>;
 138                 };
 139         };
 140
 141         mdio@0 {
 142                 #address-cells = <1>;
 143                 #size-cells = <0>;
 144                 compatible = "lantiq,xrx200-mdio";
 145                 reg = <0>;
 146
 147                 phy0: ethernet-phy@0 {
 148                         reg = <0x0>;
 149                         compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
 150                 };
 151                 phy1: ethernet-phy@1 {
 152                         reg = <0x1>;
 153                         compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
 154                 };
 155                 phy5: ethernet-phy@5 {
 156                         reg = <0x5>;
 157                         compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
 158                 };
 159                 phy11: ethernet-phy@11 {
 160                         reg = <0x11>;
 161                         compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
 162                 };
 163                 phy13: ethernet-phy@13 {
 164                         reg = <0x13>;
 165                         compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
 166                 };
 167         };
 168 };
 169
 170 &gpio {
 171         pinctrl-names = "default";
 172         pinctrl-0 = <&state_default>;
 173
 174         state_default: pinmux {
 175                 exin3 {
 176                         lantiq,groups = "exin3";
 177                         lantiq,function = "exin";
 178                 };
 179                 stp {
 180                         lantiq,groups = "stp";
 181                         lantiq,function = "stp";
 182                 };
 183                 nand {
 184                         lantiq,groups = "nand cle", "nand ale",
 185                                         "nand rd", "nand rdy";
 186                         lantiq,function = "ebu";
 187                 };
 188                 mdio {
 189                         lantiq,groups = "mdio";
 190                         lantiq,function = "mdio";
 191                 };
 192                 pci {
 193                         lantiq,groups = "gnt1", "req1";
 194                         lantiq,function = "pci";
 195                 };
 196                 conf_out {
 197                         lantiq,pins = "io24", "io13", "io49", /* nand cle, ale and rd */
 198                                         "io4", "io5", "io6", /* stp */
 199                                         "io21",
 200                                         "io33";
 201                         lantiq,open-drain;
 202                         lantiq,pull = <0>;
 203                         lantiq,output = <1>;
 204                 };
 205                 pcie-rst {
 206                         lantiq,pins = "io38";
 207                         lantiq,pull = <0>;
 208                         lantiq,output = <1>;
 209                 };
 210                 conf_in {
 211                         lantiq,pins = "io39", /* exin3 */
 212                                         "io48"; /* nand rdy */
 213                         lantiq,pull = <2>;
 214                 };
 215         };
 216         pins_spi_default: pins_spi_default {
 217                 spi_in {
 218                         lantiq,groups = "spi_di";
 219                         lantiq,function = "spi";
 220                 };
 221                 spi_out {
 222                         lantiq,groups = "spi_do", "spi_clk",
 223                                 "spi_cs4";
 224                         lantiq,function = "spi";
 225                         lantiq,output = <1>;
 226                 };
 227         };
 228 };
 229
 230 &spi {
 231         pinctrl-names = "default";
 232         pinctrl-0 = <&pins_spi_default>;
 233
 234         status = "okay";
 235
 236         m25p80@4 {
 237                 #address-cells = <1>;
 238                 #size-cells = <1>;
 239                 compatible = "jedec,spi-nor";
 240                 reg = <4 0>;
 241                 spi-max-frequency = <1000000>;
 242
 243                 partitions {
 244                         compatible = "fixed-partitions";
 245                         #address-cells = <1>;
 246                         #size-cells = <1>;
 247
 248                         partition@0 {
 249                                 reg = <0x0 0x20000>;
 250                                 label = "SPI (RO) U-Boot Image";
 251                                 read-only;
 252                         };
 253
 254                         partition@20000 {
 255                                 reg = <0x20000 0x10000>;
 256                                 label = "ENV_MAC";
 257                                 read-only;
 258                         };
 259
 260                         partition@30000 {
 261                                 reg = <0x30000 0x10000>;
 262                                 label = "DPF";
 263                                 read-only;
 264                         };
 265
 266                         partition@40000 {
 267                                 reg = <0x40000 0x10000>;
 268                                 label = "NVRAM";
 269                                 read-only;
 270                         };
 271
 272                         partition@500000 {
 273                                 reg = <0x50000 0x003a0000>;
 274                                 label = "kernel";
 275                         };
 276                 };
 277         };
 278 };
 279
 280 &stp {
 281         status = "okay";
 282
 283         lantiq,shadow = <0xffff>;
 284         lantiq,groups = <0x7>;
 285         lantiq,dsl = <0x3>;
 286         lantiq,phy1 = <0x7>;
 287         lantiq,phy2 = <0x7>;
 288         /* lantiq,rising; */
 289 };
 290
 291 &usb0 {
 292         status = "okay";
 293         gpios = <&gpio 33 GPIO_ACTIVE_HIGH>;
 294         lantiq,portmask = <0x3>;
 295 };