target/linux/lantiq/files/arch/mips/boot/dts/VG3503J.dts

   1 /dts-v1/;
   2
   3 #include "vr9.dtsi"
   4
   5 #include <dt-bindings/input/input.h>
   6 #include <dt-bindings/mips/lantiq_rcu_gphy.h>
   7
   8 / {
   9         compatible = "arcadyan,vg3503j", "lantiq,xway", "lantiq,vr9";
  10         model = "BT OpenReach VDSL Modem";
  11
  12         chosen {
  13                 bootargs = "console=ttyLTQ0,115200";
  14         };
  15
  16         aliases {
  17                 led-boot = &power_green;
  18                 led-failsafe = &power_red;
  19                 led-running = &power_green;
  20                 led-upgrade = &power_green;
  21
  22                 led-dsl = &dsl;
  23         };
  24
  25         memory@0 {
  26                 device_type = "memory";
  27                 reg = <0x0 0x2000000>;
  28         };
  29
  30         keys {
  31                 compatible = "gpio-keys-polled";
  32                 poll-interval = <100>;
  33                 reset {
  34                         label = "reset";
  35                         gpios = <&gpio 6 GPIO_ACTIVE_LOW>;
  36                         linux,code = <KEY_RESTART>;
  37                 };
  38         };
  39
  40         leds {
  41                 compatible = "gpio-leds";
  42
  43                 power_red: power2 {
  44                         label = "vg3503j:red:power";
  45                         gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
  46                 };
  47                 dsl: dsl {
  48                         label = "vg3503j:green:dsl";
  49                         gpios = <&gpio 19 GPIO_ACTIVE_LOW>;
  50                 };
  51                 power_green: power {
  52                         label = "vg3503j:green:power";
  53                         gpios = <&gpio 28 GPIO_ACTIVE_LOW>;
  54                         default-state = "keep";
  55                 };
  56         };
  57 };
  58
  59 &eth0 {
  60         pinctrl-0 = <&mdio_pins>,
  61                     <&gphy0_led0_pins>, <&gphy0_led1_pins>, <&gphy0_led2_pins>,
  62                     <&gphy1_led0_pins>, <&gphy1_led1_pins>, <&gphy1_led2_pins>;
  63
  64         interface@0 {
  65                 compatible = "lantiq,xrx200-pdi";
  66                 #address-cells = <1>;
  67                 #size-cells = <0>;
  68                 reg = <0>;
  69
  70                 lantiq,switch;
  71                 ethernet@2 {
  72                         compatible = "lantiq,xrx200-pdi-port";
  73                         reg = <2>;
  74                         phy-mode = "mii";
  75                         phy-handle = <&phy11>;
  76                 };
  77                 ethernet@4 {
  78                         compatible = "lantiq,xrx200-pdi-port";
  79                         reg = <4>;
  80                         phy-mode = "mii";
  81                         phy-handle = <&phy13>;
  82                 };
  83         };
  84
  85         mdio {
  86                 #address-cells = <1>;
  87                 #size-cells = <0>;
  88                 compatible = "lantiq,xrx200-mdio";
  89
  90                 phy11: ethernet-phy@11 {
  91                         reg = <0x11>;
  92                         compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
  93                         lantiq,led1h = <0x70>;
  94                         lantiq,led1l = <0x00>;
  95                         lantiq,led2h = <0x00>;
  96                         lantiq,led2l = <0x03>;
  97                 };
  98                 phy13: ethernet-phy@13 {
  99                         reg = <0x13>;
 100                         compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
 101                         lantiq,led1h = <0x70>;
 102                         lantiq,led1l = <0x00>;
 103                         lantiq,led2h = <0x00>;
 104                         lantiq,led2l = <0x03>;
 105                 };
 106         };
 107 };
 108
 109 &gphy0 {
 110         lantiq,gphy-mode = <GPHY_MODE_GE>;
 111 };
 112
 113 &gphy1 {
 114         lantiq,gphy-mode = <GPHY_MODE_GE>;
 115 };
 116
 117 &localbus {
 118         flash@0 {
 119                 compatible = "lantiq,nor";
 120                 bank-width = <2>;
 121                 reg = <0 0x0 0x2000000>;
 122
 123                 partitions {
 124                         compatible = "fixed-partitions";
 125                         #address-cells = <1>;
 126                         #size-cells = <1>;
 127
 128                         partition@0 {
 129                                 label = "uboot";
 130                                 reg = <0x00000 0x20000>;
 131                         };
 132
 133                         partition@20000 {
 134                                 label = "firmware";
 135                                 reg = <0x20000 0x7d0000>;
 136                         };
 137
 138                         partition@7f0000 {
 139                                 label = "uboot-env";
 140                                 reg = <0x7f0000 0x10000>;
 141                         };
 142                 };
 143         };
 144 };