target/linux/ramips/dts/mt7620a_edimax_ew-7478apc.dts

   1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
   2
   3 #include "mt7620a.dtsi"
   4
   5 #include <dt-bindings/gpio/gpio.h>
   6 #include <dt-bindings/input/input.h>
   7 #include <dt-bindings/mtd/partitions/uimage.h>
   8
   9 / {
  10         compatible = "edimax,ew-7478apc", "ralink,mt7620a-soc";
  11         model = "Edimax EW-7478APC";
  12
  13         aliases {
  14                 led-boot = &led_power;
  15                 led-failsafe = &led_power;
  16                 led-running = &led_power;
  17                 led-upgrade = &led_power;
  18         };
  19
  20         keys {
  21                 compatible = "gpio-keys";
  22
  23                 reset_wps {
  24                         label = "reset_wps";
  25                         gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
  26                         linux,code = <KEY_RESTART>;
  27                 };
  28         };
  29
  30         leds {
  31                 compatible = "gpio-leds";
  32
  33                 led_power: power {
  34                         label = "white:power";
  35                         gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
  36                 };
  37
  38                 internet {
  39                         label = "blue:internet";
  40                         gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
  41                 };
  42
  43                 wlan {
  44                         label = "blue:wlan";
  45                         gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
  46                 };
  47
  48                 usb {
  49                         label = "blue:usb";
  50                         gpios = <&gpio0 14 GPIO_ACTIVE_LOW>;
  51                         trigger-sources = <&ohci_port1>, <&ehci_port1>;
  52                         linux,default-trigger = "usbport";
  53                 };
  54         };
  55 };
  56
  57 &gpio2 {
  58         status = "okay";
  59
  60         enable_usb_power {
  61                 gpio-hog;
  62                 line-name = "enable USB power";
  63                 gpios = <5 GPIO_ACTIVE_HIGH>;
  64                 output-high;
  65         };
  66 };
  67
  68 &spi0 {
  69         status = "okay";
  70
  71         flash@0 {
  72                 compatible = "jedec,spi-nor";
  73                 reg = <0>;
  74                 spi-max-frequency = <10000000>;
  75
  76                 partitions {
  77                         compatible = "fixed-partitions";
  78                         #address-cells = <1>;
  79                         #size-cells = <1>;
  80
  81                         partition@0 {
  82                                 label = "u-boot";
  83                                 reg = <0x0 0x30000>;
  84                                 read-only;
  85                         };
  86
  87                         partition@30000 {
  88                                 label = "u-boot-env";
  89                                 reg = <0x30000 0x10000>;
  90                                 read-only;
  91                         };
  92
  93                         factory: partition@40000 {
  94                                 label = "factory";
  95                                 reg = <0x40000 0x10000>;
  96                                 read-only;
  97                         };
  98
  99                         partition@50000 {
 100                                 label = "cimage";
 101                                 reg = <0x50000 0x20000>;
 102                                 read-only;
 103                         };
 104
 105                         partition@70000 {
 106                                 compatible = "openwrt,uimage", "denx,uimage";
 107                                 openwrt,offset = <FW_EDIMAX_OFFSET>;
 108                                 openwrt,partition-magic = <FW_MAGIC_EDIMAX>;
 109                                 label = "firmware";
 110                                 reg = <0x00070000 0x00790000>;
 111                         };
 112                 };
 113         };
 114 };
 115
 116 &state_default {
 117         gpio {
 118                 groups = "i2c", "uartf", "nd_sd";
 119                 function = "gpio";
 120         };
 121 };
 122
 123 &ethernet {
 124         pinctrl-names = "default";
 125         pinctrl-0 = <&rgmii1_pins &rgmii2_pins &mdio_pins>;
 126
 127         nvmem-cells = <&macaddr_factory_4>;
 128         nvmem-cell-names = "mac-address";
 129
 130         mediatek,portmap = "wllll";
 131
 132         port@5 {
 133                 status = "okay";
 134                 mediatek,fixed-link = <1000 1 1 1>;
 135                 phy-mode = "rgmii";
 136         };
 137
 138         mdio-bus {
 139                 status = "okay";
 140
 141                 phy0: ethernet-phy@0 {
 142                         reg = <0>;
 143                         phy-mode = "rgmii";
 144                 };
 145
 146                 phy1: ethernet-phy@1 {
 147                         reg = <1>;
 148                         phy-mode = "rgmii";
 149                 };
 150
 151                 phy2: ethernet-phy@2 {
 152                         reg = <2>;
 153                         phy-mode = "rgmii";
 154                 };
 155
 156                 phy3: ethernet-phy@3 {
 157                         reg = <3>;
 158                         phy-mode = "rgmii";
 159                 };
 160
 161                 phy4: ethernet-phy@4 {
 162                         reg = <4>;
 163                         phy-mode = "rgmii";
 164                 };
 165
 166                 phy1f: ethernet-phy@1f {
 167                         reg = <0x1f>;
 168                         phy-mode = "rgmii";
 169                 };
 170         };
 171 };
 172
 173 &gsw {
 174         mediatek,ephy-base = /bits/ 8 <12>;
 175 };
 176
 177 &wmac {
 178         ralink,mtd-eeprom = <&factory 0x0>;
 179 };
 180
 181 &pcie {
 182         status = "okay";
 183 };
 184
 185 &pcie0 {
 186         wifi@0,0 {
 187                 reg = <0x0000 0 0 0 0>;
 188                 mediatek,mtd-eeprom = <&factory 0x8000>;
 189                 mediatek,2ghz = <0>;
 190         };
 191 };
 192
 193 &ehci {
 194         status = "okay";
 195 };
 196
 197 &ohci {
 198         status = "okay";
 199 };
 200
 201 &factory {
 202         compatible = "nvmem-cells";
 203         #address-cells = <1>;
 204         #size-cells = <1>;
 205
 206         macaddr_factory_4: macaddr@4 {
 207                 reg = <0x4 0x6>;
 208         };
 209 };