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[openwrt/staging/mkresin.git] / target / linux / ramips / files-4.14 / drivers / net / ethernet / mediatek / mt7530.c
1 /*
2 * This program is free software; you can redistribute it and/or
3 * modify it under the terms of the GNU General Public License
4 * as published by the Free Software Foundation; either version 2
5 * of the License, or (at your option) any later version.
6 *
7 * This program is distributed in the hope that it will be useful,
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details.
11 *
12 * Copyright (C) 2013 John Crispin <blogic@openwrt.org>
13 * Copyright (C) 2016 Vitaly Chekryzhev <13hakta@gmail.com>
14 */
15
16 #include <linux/if.h>
17 #include <linux/module.h>
18 #include <linux/init.h>
19 #include <linux/list.h>
20 #include <linux/if_ether.h>
21 #include <linux/skbuff.h>
22 #include <linux/netdevice.h>
23 #include <linux/netlink.h>
24 #include <linux/bitops.h>
25 #include <net/genetlink.h>
26 #include <linux/switch.h>
27 #include <linux/delay.h>
28 #include <linux/phy.h>
29 #include <linux/netdevice.h>
30 #include <linux/etherdevice.h>
31 #include <linux/lockdep.h>
32 #include <linux/workqueue.h>
33 #include <linux/of_device.h>
34
35 #include "mt7530.h"
36
37 #define MT7530_CPU_PORT 6
38 #define MT7530_NUM_PORTS 8
39 #ifdef CONFIG_SOC_MT7621
40 #define MT7530_NUM_VLANS 4095
41 #else
42 #define MT7530_NUM_VLANS 16
43 #endif
44 #define MT7530_MAX_VID 4095
45 #define MT7530_MIN_VID 0
46
47 #define MT7530_PORT_MIB_TXB_ID 2 /* TxGOC */
48 #define MT7530_PORT_MIB_RXB_ID 6 /* RxGOC */
49
50 #define MT7621_PORT_MIB_TXB_ID 18 /* TxByte */
51 #define MT7621_PORT_MIB_RXB_ID 37 /* RxByte */
52
53 /* registers */
54 #define REG_ESW_WT_MAC_MFC 0x10
55
56 #define REG_ESW_WT_MAC_MFC_MIRROR_ENABLE BIT(3)
57 #define REG_ESW_WT_MAC_MFC_MIRROR_DEST_MASK 0x07
58
59 #define REG_ESW_VLAN_VTCR 0x90
60 #define REG_ESW_VLAN_VAWD1 0x94
61 #define REG_ESW_VLAN_VAWD2 0x98
62 #define REG_ESW_VLAN_VTIM(x) (0x100 + 4 * ((x) / 2))
63
64 #define REG_ESW_VLAN_VAWD1_IVL_MAC BIT(30)
65 #define REG_ESW_VLAN_VAWD1_VTAG_EN BIT(28)
66 #define REG_ESW_VLAN_VAWD1_VALID BIT(0)
67
68 /* vlan egress mode */
69 enum {
70 ETAG_CTRL_UNTAG = 0,
71 ETAG_CTRL_TAG = 2,
72 ETAG_CTRL_SWAP = 1,
73 ETAG_CTRL_STACK = 3,
74 };
75
76 #define REG_ESW_PORT_PCR(x) (0x2004 | ((x) << 8))
77 #define REG_ESW_PORT_PVC(x) (0x2010 | ((x) << 8))
78 #define REG_ESW_PORT_PPBV1(x) (0x2014 | ((x) << 8))
79
80 #define REG_ESW_PORT_PCR_MIRROR_SRC_RX_BIT BIT(8)
81 #define REG_ESW_PORT_PCR_MIRROR_SRC_TX_BIT BIT(9)
82 #define REG_ESW_PORT_PCR_MIRROR_SRC_RX_MASK 0x0100
83 #define REG_ESW_PORT_PCR_MIRROR_SRC_TX_MASK 0x0200
84
85 #define REG_HWTRAP 0x7804
86
87 #define MIB_DESC(_s , _o, _n) \
88 { \
89 .size = (_s), \
90 .offset = (_o), \
91 .name = (_n), \
92 }
93
94 struct mt7xxx_mib_desc {
95 unsigned int size;
96 unsigned int offset;
97 const char *name;
98 };
99
100 static const struct mt7xxx_mib_desc mt7620_mibs[] = {
101 MIB_DESC(1, MT7620_MIB_STATS_PPE_AC_BCNT0, "PPE_AC_BCNT0"),
102 MIB_DESC(1, MT7620_MIB_STATS_PPE_AC_PCNT0, "PPE_AC_PCNT0"),
103 MIB_DESC(1, MT7620_MIB_STATS_PPE_AC_BCNT63, "PPE_AC_BCNT63"),
104 MIB_DESC(1, MT7620_MIB_STATS_PPE_AC_PCNT63, "PPE_AC_PCNT63"),
105 MIB_DESC(1, MT7620_MIB_STATS_PPE_MTR_CNT0, "PPE_MTR_CNT0"),
106 MIB_DESC(1, MT7620_MIB_STATS_PPE_MTR_CNT63, "PPE_MTR_CNT63"),
107 MIB_DESC(1, MT7620_MIB_STATS_GDM1_TX_GBCNT, "GDM1_TX_GBCNT"),
108 MIB_DESC(1, MT7620_MIB_STATS_GDM1_TX_GPCNT, "GDM1_TX_GPCNT"),
109 MIB_DESC(1, MT7620_MIB_STATS_GDM1_TX_SKIPCNT, "GDM1_TX_SKIPCNT"),
110 MIB_DESC(1, MT7620_MIB_STATS_GDM1_TX_COLCNT, "GDM1_TX_COLCNT"),
111 MIB_DESC(1, MT7620_MIB_STATS_GDM1_RX_GBCNT1, "GDM1_RX_GBCNT1"),
112 MIB_DESC(1, MT7620_MIB_STATS_GDM1_RX_GPCNT1, "GDM1_RX_GPCNT1"),
113 MIB_DESC(1, MT7620_MIB_STATS_GDM1_RX_OERCNT, "GDM1_RX_OERCNT"),
114 MIB_DESC(1, MT7620_MIB_STATS_GDM1_RX_FERCNT, "GDM1_RX_FERCNT"),
115 MIB_DESC(1, MT7620_MIB_STATS_GDM1_RX_SERCNT, "GDM1_RX_SERCNT"),
116 MIB_DESC(1, MT7620_MIB_STATS_GDM1_RX_LERCNT, "GDM1_RX_LERCNT"),
117 MIB_DESC(1, MT7620_MIB_STATS_GDM1_RX_CERCNT, "GDM1_RX_CERCNT"),
118 MIB_DESC(1, MT7620_MIB_STATS_GDM1_RX_FCCNT, "GDM1_RX_FCCNT"),
119 MIB_DESC(1, MT7620_MIB_STATS_GDM2_TX_GBCNT, "GDM2_TX_GBCNT"),
120 MIB_DESC(1, MT7620_MIB_STATS_GDM2_TX_GPCNT, "GDM2_TX_GPCNT"),
121 MIB_DESC(1, MT7620_MIB_STATS_GDM2_TX_SKIPCNT, "GDM2_TX_SKIPCNT"),
122 MIB_DESC(1, MT7620_MIB_STATS_GDM2_TX_COLCNT, "GDM2_TX_COLCNT"),
123 MIB_DESC(1, MT7620_MIB_STATS_GDM2_RX_GBCNT, "GDM2_RX_GBCNT"),
124 MIB_DESC(1, MT7620_MIB_STATS_GDM2_RX_GPCNT, "GDM2_RX_GPCNT"),
125 MIB_DESC(1, MT7620_MIB_STATS_GDM2_RX_OERCNT, "GDM2_RX_OERCNT"),
126 MIB_DESC(1, MT7620_MIB_STATS_GDM2_RX_FERCNT, "GDM2_RX_FERCNT"),
127 MIB_DESC(1, MT7620_MIB_STATS_GDM2_RX_SERCNT, "GDM2_RX_SERCNT"),
128 MIB_DESC(1, MT7620_MIB_STATS_GDM2_RX_LERCNT, "GDM2_RX_LERCNT"),
129 MIB_DESC(1, MT7620_MIB_STATS_GDM2_RX_CERCNT, "GDM2_RX_CERCNT"),
130 MIB_DESC(1, MT7620_MIB_STATS_GDM2_RX_FCCNT, "GDM2_RX_FCCNT")
131 };
132
133 static const struct mt7xxx_mib_desc mt7620_port_mibs[] = {
134 MIB_DESC(1, MT7620_MIB_STATS_PORT_TGPCN, "TxGPC"),
135 MIB_DESC(1, MT7620_MIB_STATS_PORT_TBOCN, "TxBOC"),
136 MIB_DESC(1, MT7620_MIB_STATS_PORT_TGOCN, "TxGOC"),
137 MIB_DESC(1, MT7620_MIB_STATS_PORT_TEPCN, "TxEPC"),
138 MIB_DESC(1, MT7620_MIB_STATS_PORT_RGPCN, "RxGPC"),
139 MIB_DESC(1, MT7620_MIB_STATS_PORT_RBOCN, "RxBOC"),
140 MIB_DESC(1, MT7620_MIB_STATS_PORT_RGOCN, "RxGOC"),
141 MIB_DESC(1, MT7620_MIB_STATS_PORT_REPC1N, "RxEPC1"),
142 MIB_DESC(1, MT7620_MIB_STATS_PORT_REPC2N, "RxEPC2")
143 };
144
145 static const struct mt7xxx_mib_desc mt7621_mibs[] = {
146 MIB_DESC(1, MT7621_STATS_TDPC, "TxDrop"),
147 MIB_DESC(1, MT7621_STATS_TCRC, "TxCRC"),
148 MIB_DESC(1, MT7621_STATS_TUPC, "TxUni"),
149 MIB_DESC(1, MT7621_STATS_TMPC, "TxMulti"),
150 MIB_DESC(1, MT7621_STATS_TBPC, "TxBroad"),
151 MIB_DESC(1, MT7621_STATS_TCEC, "TxCollision"),
152 MIB_DESC(1, MT7621_STATS_TSCEC, "TxSingleCol"),
153 MIB_DESC(1, MT7621_STATS_TMCEC, "TxMultiCol"),
154 MIB_DESC(1, MT7621_STATS_TDEC, "TxDefer"),
155 MIB_DESC(1, MT7621_STATS_TLCEC, "TxLateCol"),
156 MIB_DESC(1, MT7621_STATS_TXCEC, "TxExcCol"),
157 MIB_DESC(1, MT7621_STATS_TPPC, "TxPause"),
158 MIB_DESC(1, MT7621_STATS_TL64PC, "Tx64Byte"),
159 MIB_DESC(1, MT7621_STATS_TL65PC, "Tx65Byte"),
160 MIB_DESC(1, MT7621_STATS_TL128PC, "Tx128Byte"),
161 MIB_DESC(1, MT7621_STATS_TL256PC, "Tx256Byte"),
162 MIB_DESC(1, MT7621_STATS_TL512PC, "Tx512Byte"),
163 MIB_DESC(1, MT7621_STATS_TL1024PC, "Tx1024Byte"),
164 MIB_DESC(2, MT7621_STATS_TOC, "TxByte"),
165 MIB_DESC(1, MT7621_STATS_RDPC, "RxDrop"),
166 MIB_DESC(1, MT7621_STATS_RFPC, "RxFiltered"),
167 MIB_DESC(1, MT7621_STATS_RUPC, "RxUni"),
168 MIB_DESC(1, MT7621_STATS_RMPC, "RxMulti"),
169 MIB_DESC(1, MT7621_STATS_RBPC, "RxBroad"),
170 MIB_DESC(1, MT7621_STATS_RAEPC, "RxAlignErr"),
171 MIB_DESC(1, MT7621_STATS_RCEPC, "RxCRC"),
172 MIB_DESC(1, MT7621_STATS_RUSPC, "RxUnderSize"),
173 MIB_DESC(1, MT7621_STATS_RFEPC, "RxFragment"),
174 MIB_DESC(1, MT7621_STATS_ROSPC, "RxOverSize"),
175 MIB_DESC(1, MT7621_STATS_RJEPC, "RxJabber"),
176 MIB_DESC(1, MT7621_STATS_RPPC, "RxPause"),
177 MIB_DESC(1, MT7621_STATS_RL64PC, "Rx64Byte"),
178 MIB_DESC(1, MT7621_STATS_RL65PC, "Rx65Byte"),
179 MIB_DESC(1, MT7621_STATS_RL128PC, "Rx128Byte"),
180 MIB_DESC(1, MT7621_STATS_RL256PC, "Rx256Byte"),
181 MIB_DESC(1, MT7621_STATS_RL512PC, "Rx512Byte"),
182 MIB_DESC(1, MT7621_STATS_RL1024PC, "Rx1024Byte"),
183 MIB_DESC(2, MT7621_STATS_ROC, "RxByte"),
184 MIB_DESC(1, MT7621_STATS_RDPC_CTRL, "RxCtrlDrop"),
185 MIB_DESC(1, MT7621_STATS_RDPC_ING, "RxIngDrop"),
186 MIB_DESC(1, MT7621_STATS_RDPC_ARL, "RxARLDrop")
187 };
188
189 enum {
190 /* Global attributes. */
191 MT7530_ATTR_ENABLE_VLAN,
192 };
193
194 struct mt7530_port_entry {
195 u16 pvid;
196 bool mirror_rx;
197 bool mirror_tx;
198 };
199
200 struct mt7530_vlan_entry {
201 u16 vid;
202 u8 member;
203 u8 etags;
204 };
205
206 struct mt7530_priv {
207 void __iomem *base;
208 struct mii_bus *bus;
209 struct switch_dev swdev;
210
211 u8 mirror_dest_port;
212 bool global_vlan_enable;
213 struct mt7530_vlan_entry vlan_entries[MT7530_NUM_VLANS];
214 struct mt7530_port_entry port_entries[MT7530_NUM_PORTS];
215 };
216
217 struct mt7530_mapping {
218 char *name;
219 u16 pvids[MT7530_NUM_PORTS];
220 u8 members[MT7530_NUM_VLANS];
221 u8 etags[MT7530_NUM_VLANS];
222 u16 vids[MT7530_NUM_VLANS];
223 } mt7530_defaults[] = {
224 {
225 .name = "llllw",
226 .pvids = { 1, 1, 1, 1, 2, 1, 1 },
227 .members = { 0, 0x6f, 0x50 },
228 .etags = { 0, 0x40, 0x40 },
229 .vids = { 0, 1, 2 },
230 }, {
231 .name = "wllll",
232 .pvids = { 2, 1, 1, 1, 1, 1, 1 },
233 .members = { 0, 0x7e, 0x41 },
234 .etags = { 0, 0x40, 0x40 },
235 .vids = { 0, 1, 2 },
236 }, {
237 .name = "lwlll",
238 .pvids = { 1, 2, 1, 1, 1, 1, 1 },
239 .members = { 0, 0x7d, 0x42 },
240 .etags = { 0, 0x40, 0x40 },
241 .vids = { 0, 1, 2 },
242 },
243 };
244
245 struct mt7530_mapping*
246 mt7530_find_mapping(struct device_node *np)
247 {
248 const char *map;
249 int i;
250
251 if (of_property_read_string(np, "mediatek,portmap", &map))
252 return NULL;
253
254 for (i = 0; i < ARRAY_SIZE(mt7530_defaults); i++)
255 if (!strcmp(map, mt7530_defaults[i].name))
256 return &mt7530_defaults[i];
257
258 return NULL;
259 }
260
261 static void
262 mt7530_apply_mapping(struct mt7530_priv *mt7530, struct mt7530_mapping *map)
263 {
264 int i = 0;
265
266 for (i = 0; i < MT7530_NUM_PORTS; i++)
267 mt7530->port_entries[i].pvid = map->pvids[i];
268
269 for (i = 0; i < MT7530_NUM_VLANS; i++) {
270 mt7530->vlan_entries[i].member = map->members[i];
271 mt7530->vlan_entries[i].etags = map->etags[i];
272 mt7530->vlan_entries[i].vid = map->vids[i];
273 }
274 }
275
276 static int
277 mt7530_reset_switch(struct switch_dev *dev)
278 {
279 struct mt7530_priv *priv = container_of(dev, struct mt7530_priv, swdev);
280 int i;
281
282 memset(priv->port_entries, 0, sizeof(priv->port_entries));
283 memset(priv->vlan_entries, 0, sizeof(priv->vlan_entries));
284
285 /* set default vid of each vlan to the same number of vlan, so the vid
286 * won't need be set explicitly.
287 */
288 for (i = 0; i < MT7530_NUM_VLANS; i++) {
289 priv->vlan_entries[i].vid = i;
290 }
291
292 return 0;
293 }
294
295 static int
296 mt7530_get_vlan_enable(struct switch_dev *dev,
297 const struct switch_attr *attr,
298 struct switch_val *val)
299 {
300 struct mt7530_priv *priv = container_of(dev, struct mt7530_priv, swdev);
301
302 val->value.i = priv->global_vlan_enable;
303
304 return 0;
305 }
306
307 static int
308 mt7530_set_vlan_enable(struct switch_dev *dev,
309 const struct switch_attr *attr,
310 struct switch_val *val)
311 {
312 struct mt7530_priv *priv = container_of(dev, struct mt7530_priv, swdev);
313
314 priv->global_vlan_enable = val->value.i != 0;
315
316 return 0;
317 }
318
319 static u32
320 mt7530_r32(struct mt7530_priv *priv, u32 reg)
321 {
322 u32 val;
323 if (priv->bus) {
324 u16 high, low;
325
326 mdiobus_write(priv->bus, 0x1f, 0x1f, (reg >> 6) & 0x3ff);
327 low = mdiobus_read(priv->bus, 0x1f, (reg >> 2) & 0xf);
328 high = mdiobus_read(priv->bus, 0x1f, 0x10);
329
330 return (high << 16) | (low & 0xffff);
331 }
332
333 val = ioread32(priv->base + reg);
334 pr_debug("MT7530 MDIO Read [%04x]=%08x\n", reg, val);
335
336 return val;
337 }
338
339 static void
340 mt7530_w32(struct mt7530_priv *priv, u32 reg, u32 val)
341 {
342 if (priv->bus) {
343 mdiobus_write(priv->bus, 0x1f, 0x1f, (reg >> 6) & 0x3ff);
344 mdiobus_write(priv->bus, 0x1f, (reg >> 2) & 0xf, val & 0xffff);
345 mdiobus_write(priv->bus, 0x1f, 0x10, val >> 16);
346 return;
347 }
348
349 pr_debug("MT7530 MDIO Write[%04x]=%08x\n", reg, val);
350 iowrite32(val, priv->base + reg);
351 }
352
353 static void
354 mt7530_vtcr(struct mt7530_priv *priv, u32 cmd, u32 val)
355 {
356 int i;
357
358 mt7530_w32(priv, REG_ESW_VLAN_VTCR, BIT(31) | (cmd << 12) | val);
359
360 for (i = 0; i < 20; i++) {
361 u32 val = mt7530_r32(priv, REG_ESW_VLAN_VTCR);
362
363 if ((val & BIT(31)) == 0)
364 break;
365
366 udelay(1000);
367 }
368 if (i == 20)
369 printk("mt7530: vtcr timeout\n");
370 }
371
372 static int
373 mt7530_get_port_pvid(struct switch_dev *dev, int port, int *val)
374 {
375 struct mt7530_priv *priv = container_of(dev, struct mt7530_priv, swdev);
376
377 if (port >= MT7530_NUM_PORTS)
378 return -EINVAL;
379
380 *val = mt7530_r32(priv, REG_ESW_PORT_PPBV1(port));
381 *val &= 0xfff;
382
383 return 0;
384 }
385
386 static int
387 mt7530_set_port_pvid(struct switch_dev *dev, int port, int pvid)
388 {
389 struct mt7530_priv *priv = container_of(dev, struct mt7530_priv, swdev);
390
391 if (port >= MT7530_NUM_PORTS)
392 return -EINVAL;
393
394 if (pvid < MT7530_MIN_VID || pvid > MT7530_MAX_VID)
395 return -EINVAL;
396
397 priv->port_entries[port].pvid = pvid;
398
399 return 0;
400 }
401
402 static int
403 mt7530_get_vlan_ports(struct switch_dev *dev, struct switch_val *val)
404 {
405 struct mt7530_priv *priv = container_of(dev, struct mt7530_priv, swdev);
406 u32 member;
407 u32 etags;
408 int i;
409
410 val->len = 0;
411
412 if (val->port_vlan < 0 || val->port_vlan >= MT7530_NUM_VLANS)
413 return -EINVAL;
414
415 mt7530_vtcr(priv, 0, val->port_vlan);
416
417 member = mt7530_r32(priv, REG_ESW_VLAN_VAWD1);
418 member >>= 16;
419 member &= 0xff;
420
421 etags = mt7530_r32(priv, REG_ESW_VLAN_VAWD2);
422
423 for (i = 0; i < MT7530_NUM_PORTS; i++) {
424 struct switch_port *p;
425 int etag;
426
427 if (!(member & BIT(i)))
428 continue;
429
430 p = &val->value.ports[val->len++];
431 p->id = i;
432
433 etag = (etags >> (i * 2)) & 0x3;
434
435 if (etag == ETAG_CTRL_TAG)
436 p->flags |= BIT(SWITCH_PORT_FLAG_TAGGED);
437 else if (etag != ETAG_CTRL_UNTAG)
438 printk("vlan egress tag control neither untag nor tag.\n");
439 }
440
441 return 0;
442 }
443
444 static int
445 mt7530_set_vlan_ports(struct switch_dev *dev, struct switch_val *val)
446 {
447 struct mt7530_priv *priv = container_of(dev, struct mt7530_priv, swdev);
448 u8 member = 0;
449 u8 etags = 0;
450 int i;
451
452 if (val->port_vlan < 0 || val->port_vlan >= MT7530_NUM_VLANS ||
453 val->len > MT7530_NUM_PORTS)
454 return -EINVAL;
455
456 for (i = 0; i < val->len; i++) {
457 struct switch_port *p = &val->value.ports[i];
458
459 if (p->id >= MT7530_NUM_PORTS)
460 return -EINVAL;
461
462 member |= BIT(p->id);
463
464 if (p->flags & BIT(SWITCH_PORT_FLAG_TAGGED))
465 etags |= BIT(p->id);
466 }
467 priv->vlan_entries[val->port_vlan].member = member;
468 priv->vlan_entries[val->port_vlan].etags = etags;
469
470 return 0;
471 }
472
473 static int
474 mt7530_set_vid(struct switch_dev *dev, const struct switch_attr *attr,
475 struct switch_val *val)
476 {
477 struct mt7530_priv *priv = container_of(dev, struct mt7530_priv, swdev);
478 int vlan;
479 u16 vid;
480
481 vlan = val->port_vlan;
482 vid = (u16)val->value.i;
483
484 if (vlan < 0 || vlan >= MT7530_NUM_VLANS)
485 return -EINVAL;
486
487 if (vid < MT7530_MIN_VID || vid > MT7530_MAX_VID)
488 return -EINVAL;
489
490 priv->vlan_entries[vlan].vid = vid;
491 return 0;
492 }
493
494 static int
495 mt7621_get_vid(struct switch_dev *dev, const struct switch_attr *attr,
496 struct switch_val *val)
497 {
498 val->value.i = val->port_vlan;
499 return 0;
500 }
501
502 static int
503 mt7530_get_vid(struct switch_dev *dev, const struct switch_attr *attr,
504 struct switch_val *val)
505 {
506 struct mt7530_priv *priv = container_of(dev, struct mt7530_priv, swdev);
507 u32 vid;
508 int vlan;
509
510 vlan = val->port_vlan;
511
512 vid = mt7530_r32(priv, REG_ESW_VLAN_VTIM(vlan));
513 if (vlan & 1)
514 vid = vid >> 12;
515 vid &= 0xfff;
516
517 val->value.i = vid;
518 return 0;
519 }
520
521 static int
522 mt7530_get_mirror_monitor_port(struct switch_dev *dev, const struct switch_attr *attr,
523 struct switch_val *val)
524 {
525 struct mt7530_priv *priv = container_of(dev, struct mt7530_priv, swdev);
526
527 val->value.i = priv->mirror_dest_port;
528
529 return 0;
530 }
531
532 static int
533 mt7530_set_mirror_monitor_port(struct switch_dev *dev, const struct switch_attr *attr,
534 struct switch_val *val)
535 {
536 struct mt7530_priv *priv = container_of(dev, struct mt7530_priv, swdev);
537
538 priv->mirror_dest_port = val->value.i;
539
540 return 0;
541 }
542
543 static int
544 mt7530_get_port_mirror_rx(struct switch_dev *dev, const struct switch_attr *attr,
545 struct switch_val *val)
546 {
547 struct mt7530_priv *priv = container_of(dev, struct mt7530_priv, swdev);
548
549 val->value.i = priv->port_entries[val->port_vlan].mirror_rx;
550
551 return 0;
552 }
553
554 static int
555 mt7530_set_port_mirror_rx(struct switch_dev *dev, const struct switch_attr *attr,
556 struct switch_val *val)
557 {
558 struct mt7530_priv *priv = container_of(dev, struct mt7530_priv, swdev);
559
560 priv->port_entries[val->port_vlan].mirror_rx = val->value.i;
561
562 return 0;
563 }
564
565 static int
566 mt7530_get_port_mirror_tx(struct switch_dev *dev, const struct switch_attr *attr,
567 struct switch_val *val)
568 {
569 struct mt7530_priv *priv = container_of(dev, struct mt7530_priv, swdev);
570
571 val->value.i = priv->port_entries[val->port_vlan].mirror_tx;
572
573 return 0;
574 }
575
576 static int
577 mt7530_set_port_mirror_tx(struct switch_dev *dev, const struct switch_attr *attr,
578 struct switch_val *val)
579 {
580 struct mt7530_priv *priv = container_of(dev, struct mt7530_priv, swdev);
581
582 priv->port_entries[val->port_vlan].mirror_tx = val->value.i;
583
584 return 0;
585 }
586
587 static void
588 mt7530_write_vlan_entry(struct mt7530_priv *priv, int vlan, u16 vid,
589 u8 ports, u8 etags)
590 {
591 int port;
592 u32 val;
593
594 #ifndef CONFIG_SOC_MT7621
595 /* vid of vlan */
596 val = mt7530_r32(priv, REG_ESW_VLAN_VTIM(vlan));
597 if (vlan % 2 == 0) {
598 val &= 0xfff000;
599 val |= vid;
600 } else {
601 val &= 0xfff;
602 val |= (vid << 12);
603 }
604 mt7530_w32(priv, REG_ESW_VLAN_VTIM(vlan), val);
605 #endif
606
607 /* vlan port membership */
608 if (ports)
609 mt7530_w32(priv, REG_ESW_VLAN_VAWD1, REG_ESW_VLAN_VAWD1_IVL_MAC |
610 REG_ESW_VLAN_VAWD1_VTAG_EN | (ports << 16) |
611 REG_ESW_VLAN_VAWD1_VALID);
612 else
613 mt7530_w32(priv, REG_ESW_VLAN_VAWD1, 0);
614
615 /* egress mode */
616 val = 0;
617 for (port = 0; port < MT7530_NUM_PORTS; port++) {
618 if (etags & BIT(port))
619 val |= ETAG_CTRL_TAG << (port * 2);
620 else
621 val |= ETAG_CTRL_UNTAG << (port * 2);
622 }
623 mt7530_w32(priv, REG_ESW_VLAN_VAWD2, val);
624
625 /* write to vlan table */
626 #ifdef CONFIG_SOC_MT7621
627 mt7530_vtcr(priv, 1, vid);
628 #else
629 mt7530_vtcr(priv, 1, vlan);
630 #endif
631 }
632
633 static int
634 mt7530_apply_config(struct switch_dev *dev)
635 {
636 struct mt7530_priv *priv = container_of(dev, struct mt7530_priv, swdev);
637 int i, j;
638 u8 tag_ports;
639 u8 untag_ports;
640 bool is_mirror = false;
641
642 if (!priv->global_vlan_enable) {
643 for (i = 0; i < MT7530_NUM_PORTS; i++)
644 mt7530_w32(priv, REG_ESW_PORT_PCR(i), 0x00400000);
645
646 mt7530_w32(priv, REG_ESW_PORT_PCR(MT7530_CPU_PORT), 0x00ff0000);
647
648 for (i = 0; i < MT7530_NUM_PORTS; i++)
649 mt7530_w32(priv, REG_ESW_PORT_PVC(i), 0x810000c0);
650
651 return 0;
652 }
653
654 /* set all ports as security mode */
655 for (i = 0; i < MT7530_NUM_PORTS; i++)
656 mt7530_w32(priv, REG_ESW_PORT_PCR(i), 0x00ff0003);
657
658 /* check if a port is used in tag/untag vlan egress mode */
659 tag_ports = 0;
660 untag_ports = 0;
661
662 for (i = 0; i < MT7530_NUM_VLANS; i++) {
663 u8 member = priv->vlan_entries[i].member;
664 u8 etags = priv->vlan_entries[i].etags;
665
666 if (!member)
667 continue;
668
669 for (j = 0; j < MT7530_NUM_PORTS; j++) {
670 if (!(member & BIT(j)))
671 continue;
672
673 if (etags & BIT(j))
674 tag_ports |= 1u << j;
675 else
676 untag_ports |= 1u << j;
677 }
678 }
679
680 /* set all untag-only ports as transparent and the rest as user port */
681 for (i = 0; i < MT7530_NUM_PORTS; i++) {
682 u32 pvc_mode = 0x81000000;
683
684 if (untag_ports & BIT(i) && !(tag_ports & BIT(i)))
685 pvc_mode = 0x810000c0;
686
687 mt7530_w32(priv, REG_ESW_PORT_PVC(i), pvc_mode);
688 }
689
690 /* first clear the swtich vlan table */
691 for (i = 0; i < MT7530_NUM_VLANS; i++)
692 mt7530_write_vlan_entry(priv, i, i, 0, 0);
693
694 /* now program only vlans with members to avoid
695 clobbering remapped entries in later iterations */
696 for (i = 0; i < MT7530_NUM_VLANS; i++) {
697 u16 vid = priv->vlan_entries[i].vid;
698 u8 member = priv->vlan_entries[i].member;
699 u8 etags = priv->vlan_entries[i].etags;
700
701 if (member)
702 mt7530_write_vlan_entry(priv, i, vid, member, etags);
703 }
704
705 /* Port Default PVID */
706 for (i = 0; i < MT7530_NUM_PORTS; i++) {
707 int vlan = priv->port_entries[i].pvid;
708 u16 pvid = 0;
709 u32 val;
710
711 if (vlan < MT7530_NUM_VLANS && priv->vlan_entries[vlan].member)
712 pvid = priv->vlan_entries[vlan].vid;
713
714 val = mt7530_r32(priv, REG_ESW_PORT_PPBV1(i));
715 val &= ~0xfff;
716 val |= pvid;
717 mt7530_w32(priv, REG_ESW_PORT_PPBV1(i), val);
718 }
719
720 /* set mirroring source port */
721 for (i = 0; i < MT7530_NUM_PORTS; i++) {
722 u32 val = mt7530_r32(priv, REG_ESW_PORT_PCR(i));
723 if (priv->port_entries[i].mirror_rx) {
724 val |= REG_ESW_PORT_PCR_MIRROR_SRC_RX_BIT;
725 is_mirror = true;
726 }
727
728 if (priv->port_entries[i].mirror_tx) {
729 val |= REG_ESW_PORT_PCR_MIRROR_SRC_TX_BIT;
730 is_mirror = true;
731 }
732
733 mt7530_w32(priv, REG_ESW_PORT_PCR(i), val);
734 }
735
736 /* set mirroring monitor port */
737 if (is_mirror) {
738 u32 val = mt7530_r32(priv, REG_ESW_WT_MAC_MFC);
739 val |= REG_ESW_WT_MAC_MFC_MIRROR_ENABLE;
740 val &= ~REG_ESW_WT_MAC_MFC_MIRROR_DEST_MASK;
741 val |= priv->mirror_dest_port;
742 mt7530_w32(priv, REG_ESW_WT_MAC_MFC, val);
743 }
744
745 return 0;
746 }
747
748 static int
749 mt7530_get_port_link(struct switch_dev *dev, int port,
750 struct switch_port_link *link)
751 {
752 struct mt7530_priv *priv = container_of(dev, struct mt7530_priv, swdev);
753 u32 speed, pmsr;
754
755 if (port < 0 || port >= MT7530_NUM_PORTS)
756 return -EINVAL;
757
758 pmsr = mt7530_r32(priv, 0x3008 + (0x100 * port));
759
760 link->link = pmsr & 1;
761 link->duplex = (pmsr >> 1) & 1;
762 speed = (pmsr >> 2) & 3;
763
764 switch (speed) {
765 case 0:
766 link->speed = SWITCH_PORT_SPEED_10;
767 break;
768 case 1:
769 link->speed = SWITCH_PORT_SPEED_100;
770 break;
771 case 2:
772 case 3: /* forced gige speed can be 2 or 3 */
773 link->speed = SWITCH_PORT_SPEED_1000;
774 break;
775 default:
776 link->speed = SWITCH_PORT_SPEED_UNKNOWN;
777 break;
778 }
779
780 return 0;
781 }
782
783 static u64 get_mib_counter(struct mt7530_priv *priv, int i, int port)
784 {
785 unsigned int port_base;
786 u64 lo;
787
788 port_base = MT7621_MIB_COUNTER_BASE +
789 MT7621_MIB_COUNTER_PORT_OFFSET * port;
790
791 lo = mt7530_r32(priv, port_base + mt7621_mibs[i].offset);
792 if (mt7621_mibs[i].size == 2) {
793 u64 hi;
794
795 hi = mt7530_r32(priv, port_base + mt7621_mibs[i].offset + 4);
796 lo |= hi << 32;
797 }
798
799 return lo;
800 }
801
802 static int mt7621_sw_get_port_mib(struct switch_dev *dev,
803 const struct switch_attr *attr,
804 struct switch_val *val)
805 {
806 static char buf[4096];
807 struct mt7530_priv *priv = container_of(dev, struct mt7530_priv, swdev);
808 int i, len = 0;
809
810 if (val->port_vlan >= MT7530_NUM_PORTS)
811 return -EINVAL;
812
813 len += snprintf(buf + len, sizeof(buf) - len,
814 "Port %d MIB counters\n", val->port_vlan);
815
816 for (i = 0; i < ARRAY_SIZE(mt7621_mibs); ++i) {
817 u64 counter;
818 len += snprintf(buf + len, sizeof(buf) - len,
819 "%-11s: ", mt7621_mibs[i].name);
820 counter = get_mib_counter(priv, i, val->port_vlan);
821 len += snprintf(buf + len, sizeof(buf) - len, "%llu\n",
822 counter);
823 }
824
825 val->value.s = buf;
826 val->len = len;
827 return 0;
828 }
829
830 static u64 get_mib_counter_7620(struct mt7530_priv *priv, int i)
831 {
832 return mt7530_r32(priv, MT7620_MIB_COUNTER_BASE + mt7620_mibs[i].offset);
833 }
834
835 static u64 get_mib_counter_port_7620(struct mt7530_priv *priv, int i, int port)
836 {
837 return mt7530_r32(priv,
838 MT7620_MIB_COUNTER_BASE_PORT +
839 (MT7620_MIB_COUNTER_PORT_OFFSET * port) +
840 mt7620_port_mibs[i].offset);
841 }
842
843 static int mt7530_sw_get_mib(struct switch_dev *dev,
844 const struct switch_attr *attr,
845 struct switch_val *val)
846 {
847 static char buf[4096];
848 struct mt7530_priv *priv = container_of(dev, struct mt7530_priv, swdev);
849 int i, len = 0;
850
851 len += snprintf(buf + len, sizeof(buf) - len, "Switch MIB counters\n");
852
853 for (i = 0; i < ARRAY_SIZE(mt7620_mibs); ++i) {
854 u64 counter;
855 len += snprintf(buf + len, sizeof(buf) - len,
856 "%-11s: ", mt7620_mibs[i].name);
857 counter = get_mib_counter_7620(priv, i);
858 len += snprintf(buf + len, sizeof(buf) - len, "%llu\n",
859 counter);
860 }
861
862 val->value.s = buf;
863 val->len = len;
864 return 0;
865 }
866
867 static int mt7530_sw_get_port_mib(struct switch_dev *dev,
868 const struct switch_attr *attr,
869 struct switch_val *val)
870 {
871 static char buf[4096];
872 struct mt7530_priv *priv = container_of(dev, struct mt7530_priv, swdev);
873 int i, len = 0;
874
875 if (val->port_vlan >= MT7530_NUM_PORTS)
876 return -EINVAL;
877
878 len += snprintf(buf + len, sizeof(buf) - len,
879 "Port %d MIB counters\n", val->port_vlan);
880
881 for (i = 0; i < ARRAY_SIZE(mt7620_port_mibs); ++i) {
882 u64 counter;
883 len += snprintf(buf + len, sizeof(buf) - len,
884 "%-11s: ", mt7620_port_mibs[i].name);
885 counter = get_mib_counter_port_7620(priv, i, val->port_vlan);
886 len += snprintf(buf + len, sizeof(buf) - len, "%llu\n",
887 counter);
888 }
889
890 val->value.s = buf;
891 val->len = len;
892 return 0;
893 }
894
895 static int mt7530_get_port_stats(struct switch_dev *dev, int port,
896 struct switch_port_stats *stats)
897 {
898 struct mt7530_priv *priv = container_of(dev, struct mt7530_priv, swdev);
899
900 if (port < 0 || port >= MT7530_NUM_PORTS)
901 return -EINVAL;
902
903 stats->tx_bytes = get_mib_counter_port_7620(priv, MT7530_PORT_MIB_TXB_ID, port);
904 stats->rx_bytes = get_mib_counter_port_7620(priv, MT7530_PORT_MIB_RXB_ID, port);
905
906 return 0;
907 }
908
909 static int mt7621_get_port_stats(struct switch_dev *dev, int port,
910 struct switch_port_stats *stats)
911 {
912 struct mt7530_priv *priv = container_of(dev, struct mt7530_priv, swdev);
913
914 if (port < 0 || port >= MT7530_NUM_PORTS)
915 return -EINVAL;
916
917 stats->tx_bytes = get_mib_counter(priv, MT7621_PORT_MIB_TXB_ID, port);
918 stats->rx_bytes = get_mib_counter(priv, MT7621_PORT_MIB_RXB_ID, port);
919
920 return 0;
921 }
922
923 static const struct switch_attr mt7530_global[] = {
924 {
925 .type = SWITCH_TYPE_INT,
926 .name = "enable_vlan",
927 .description = "VLAN mode (1:enabled)",
928 .max = 1,
929 .id = MT7530_ATTR_ENABLE_VLAN,
930 .get = mt7530_get_vlan_enable,
931 .set = mt7530_set_vlan_enable,
932 }, {
933 .type = SWITCH_TYPE_STRING,
934 .name = "mib",
935 .description = "Get MIB counters for switch",
936 .get = mt7530_sw_get_mib,
937 .set = NULL,
938 }, {
939 .type = SWITCH_TYPE_INT,
940 .name = "mirror_monitor_port",
941 .description = "Mirror monitor port",
942 .set = mt7530_set_mirror_monitor_port,
943 .get = mt7530_get_mirror_monitor_port,
944 .max = MT7530_NUM_PORTS - 1
945 },
946 };
947
948 static const struct switch_attr mt7621_port[] = {
949 {
950 .type = SWITCH_TYPE_STRING,
951 .name = "mib",
952 .description = "Get MIB counters for port",
953 .get = mt7621_sw_get_port_mib,
954 .set = NULL,
955 }, {
956 .type = SWITCH_TYPE_INT,
957 .name = "enable_mirror_rx",
958 .description = "Enable mirroring of RX packets",
959 .set = mt7530_set_port_mirror_rx,
960 .get = mt7530_get_port_mirror_rx,
961 .max = 1,
962 }, {
963 .type = SWITCH_TYPE_INT,
964 .name = "enable_mirror_tx",
965 .description = "Enable mirroring of TX packets",
966 .set = mt7530_set_port_mirror_tx,
967 .get = mt7530_get_port_mirror_tx,
968 .max = 1,
969 },
970 };
971
972 static const struct switch_attr mt7621_vlan[] = {
973 {
974 .type = SWITCH_TYPE_INT,
975 .name = "vid",
976 .description = "VLAN ID (0-4094)",
977 .set = mt7530_set_vid,
978 .get = mt7621_get_vid,
979 .max = 4094,
980 },
981 };
982
983 static const struct switch_attr mt7530_port[] = {
984 {
985 .type = SWITCH_TYPE_STRING,
986 .name = "mib",
987 .description = "Get MIB counters for port",
988 .get = mt7530_sw_get_port_mib,
989 .set = NULL,
990 }, {
991 .type = SWITCH_TYPE_INT,
992 .name = "enable_mirror_rx",
993 .description = "Enable mirroring of RX packets",
994 .set = mt7530_set_port_mirror_rx,
995 .get = mt7530_get_port_mirror_rx,
996 .max = 1,
997 }, {
998 .type = SWITCH_TYPE_INT,
999 .name = "enable_mirror_tx",
1000 .description = "Enable mirroring of TX packets",
1001 .set = mt7530_set_port_mirror_tx,
1002 .get = mt7530_get_port_mirror_tx,
1003 .max = 1,
1004 },
1005 };
1006
1007 static const struct switch_attr mt7530_vlan[] = {
1008 {
1009 .type = SWITCH_TYPE_INT,
1010 .name = "vid",
1011 .description = "VLAN ID (0-4094)",
1012 .set = mt7530_set_vid,
1013 .get = mt7530_get_vid,
1014 .max = 4094,
1015 },
1016 };
1017
1018 static const struct switch_dev_ops mt7621_ops = {
1019 .attr_global = {
1020 .attr = mt7530_global,
1021 .n_attr = ARRAY_SIZE(mt7530_global),
1022 },
1023 .attr_port = {
1024 .attr = mt7621_port,
1025 .n_attr = ARRAY_SIZE(mt7621_port),
1026 },
1027 .attr_vlan = {
1028 .attr = mt7621_vlan,
1029 .n_attr = ARRAY_SIZE(mt7621_vlan),
1030 },
1031 .get_vlan_ports = mt7530_get_vlan_ports,
1032 .set_vlan_ports = mt7530_set_vlan_ports,
1033 .get_port_pvid = mt7530_get_port_pvid,
1034 .set_port_pvid = mt7530_set_port_pvid,
1035 .get_port_link = mt7530_get_port_link,
1036 .get_port_stats = mt7621_get_port_stats,
1037 .apply_config = mt7530_apply_config,
1038 .reset_switch = mt7530_reset_switch,
1039 };
1040
1041 static const struct switch_dev_ops mt7530_ops = {
1042 .attr_global = {
1043 .attr = mt7530_global,
1044 .n_attr = ARRAY_SIZE(mt7530_global),
1045 },
1046 .attr_port = {
1047 .attr = mt7530_port,
1048 .n_attr = ARRAY_SIZE(mt7530_port),
1049 },
1050 .attr_vlan = {
1051 .attr = mt7530_vlan,
1052 .n_attr = ARRAY_SIZE(mt7530_vlan),
1053 },
1054 .get_vlan_ports = mt7530_get_vlan_ports,
1055 .set_vlan_ports = mt7530_set_vlan_ports,
1056 .get_port_pvid = mt7530_get_port_pvid,
1057 .set_port_pvid = mt7530_set_port_pvid,
1058 .get_port_link = mt7530_get_port_link,
1059 .get_port_stats = mt7530_get_port_stats,
1060 .apply_config = mt7530_apply_config,
1061 .reset_switch = mt7530_reset_switch,
1062 };
1063
1064 int
1065 mt7530_probe(struct device *dev, void __iomem *base, struct mii_bus *bus, int vlan)
1066 {
1067 struct switch_dev *swdev;
1068 struct mt7530_priv *mt7530;
1069 struct mt7530_mapping *map;
1070 int ret;
1071
1072 mt7530 = devm_kzalloc(dev, sizeof(struct mt7530_priv), GFP_KERNEL);
1073 if (!mt7530)
1074 return -ENOMEM;
1075
1076 mt7530->base = base;
1077 mt7530->bus = bus;
1078 mt7530->global_vlan_enable = vlan;
1079
1080 swdev = &mt7530->swdev;
1081 if (bus) {
1082 swdev->alias = "mt7530";
1083 swdev->name = "mt7530";
1084 } else if (IS_ENABLED(CONFIG_SOC_MT7621)) {
1085 swdev->alias = "mt7621";
1086 swdev->name = "mt7621";
1087 } else {
1088 swdev->alias = "mt7620";
1089 swdev->name = "mt7620";
1090 }
1091 swdev->cpu_port = MT7530_CPU_PORT;
1092 swdev->ports = MT7530_NUM_PORTS;
1093 swdev->vlans = MT7530_NUM_VLANS;
1094 if (IS_ENABLED(CONFIG_SOC_MT7621))
1095 swdev->ops = &mt7621_ops;
1096 else
1097 swdev->ops = &mt7530_ops;
1098
1099 ret = register_switch(swdev, NULL);
1100 if (ret) {
1101 dev_err(dev, "failed to register mt7530\n");
1102 return ret;
1103 }
1104
1105
1106 map = mt7530_find_mapping(dev->of_node);
1107 if (map)
1108 mt7530_apply_mapping(mt7530, map);
1109 mt7530_apply_config(swdev);
1110
1111 /* magic vodoo */
1112 if (!IS_ENABLED(CONFIG_SOC_MT7621) && bus && mt7530_r32(mt7530, REG_HWTRAP) != 0x1117edf) {
1113 dev_info(dev, "fixing up MHWTRAP register - bootloader probably played with it\n");
1114 mt7530_w32(mt7530, REG_HWTRAP, 0x1117edf);
1115 }
1116 dev_info(dev, "loaded %s driver\n", swdev->name);
1117
1118 return 0;
1119 }
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