--- /dev/null
+/*
+ * Marvell 88E6060 switch driver
+ * Copyright (c) 2008 Felix Fietkau <nbd@nbd.name>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License v2 as published by the
+ * Free Software Foundation
+ */
+#include <linux/kernel.h>
+#include <linux/string.h>
+#include <linux/errno.h>
+#include <linux/unistd.h>
+#include <linux/slab.h>
+#include <linux/interrupt.h>
+#include <linux/init.h>
+#include <linux/delay.h>
+#include <linux/netdevice.h>
+#include <linux/etherdevice.h>
+#include <linux/skbuff.h>
+#include <linux/spinlock.h>
+#include <linux/mm.h>
+#include <linux/module.h>
+#include <linux/mii.h>
+#include <linux/ethtool.h>
+#include <linux/phy.h>
+#include <linux/if_vlan.h>
+#include <linux/version.h>
+
+#include <asm/io.h>
+#include <asm/irq.h>
+#include <asm/uaccess.h>
+#include "mvswitch.h"
+
+/* Undefine this to use trailer mode instead.
+ * I don't know if header mode works with all chips */
+#define HEADER_MODE 1
+
+MODULE_DESCRIPTION("Marvell 88E6060 Switch driver");
+MODULE_AUTHOR("Felix Fietkau");
+MODULE_LICENSE("GPL");
+
+#define MVSWITCH_MAGIC 0x88E6060
+
+struct mvswitch_priv {
+ netdev_features_t orig_features;
+ u8 vlans[16];
+};
+
+#define to_mvsw(_phy) ((struct mvswitch_priv *) (_phy)->priv)
+
+static inline u16
+r16(struct phy_device *phydev, int addr, int reg)
+{
+ struct mii_bus *bus = phydev->mdio.bus;
+
+ return bus->read(bus, addr, reg);
+}
+
+static inline void
+w16(struct phy_device *phydev, int addr, int reg, u16 val)
+{
+ struct mii_bus *bus = phydev->mdio.bus;
+
+ bus->write(bus, addr, reg, val);
+}
+
+
+static struct sk_buff *
+mvswitch_mangle_tx(struct net_device *dev, struct sk_buff *skb)
+{
+ struct mvswitch_priv *priv;
+ char *buf = NULL;
+ u16 vid;
+
+ priv = dev->phy_ptr;
+ if (unlikely(!priv))
+ goto error;
+
+ if (unlikely(skb->len < 16))
+ goto error;
+
+#ifdef HEADER_MODE
+ if (__vlan_hwaccel_get_tag(skb, &vid))
+ goto error;
+
+ if (skb_cloned(skb) || (skb->len <= 62) || (skb_headroom(skb) < MV_HEADER_SIZE)) {
+ if (pskb_expand_head(skb, MV_HEADER_SIZE, (skb->len < 62 ? 62 - skb->len : 0), GFP_ATOMIC))
+ goto error_expand;
+ if (skb->len < 62)
+ skb->len = 62;
+ }
+ buf = skb_push(skb, MV_HEADER_SIZE);
+#else
+ if (__vlan_get_tag(skb, &vid))
+ goto error;
+
+ if (unlikely((vid > 15 || !priv->vlans[vid])))
+ goto error;
+
+ if (skb->len <= 64) {
+ if (pskb_expand_head(skb, 0, 64 + MV_TRAILER_SIZE - skb->len, GFP_ATOMIC))
+ goto error_expand;
+
+ buf = skb->data + 64;
+ skb->len = 64 + MV_TRAILER_SIZE;
+ } else {
+ if (skb_cloned(skb) || unlikely(skb_tailroom(skb) < 4)) {
+ if (pskb_expand_head(skb, 0, 4, GFP_ATOMIC))
+ goto error_expand;
+ }
+ buf = skb_put(skb, 4);
+ }
+
+ /* move the ethernet header 4 bytes forward, overwriting the vlan tag */
+ memmove(skb->data + 4, skb->data, 12);
+ skb->data += 4;
+ skb->len -= 4;
+ skb->mac_header += 4;
+#endif
+
+ if (!buf)
+ goto error;
+
+
+#ifdef HEADER_MODE
+ /* prepend the tag */
+ *((__be16 *) buf) = cpu_to_be16(
+ ((vid << MV_HEADER_VLAN_S) & MV_HEADER_VLAN_M) |
+ ((priv->vlans[vid] << MV_HEADER_PORTS_S) & MV_HEADER_PORTS_M)
+ );
+#else
+ /* append the tag */
+ *((__be32 *) buf) = cpu_to_be32((
+ (MV_TRAILER_OVERRIDE << MV_TRAILER_FLAGS_S) |
+ ((priv->vlans[vid] & MV_TRAILER_PORTS_M) << MV_TRAILER_PORTS_S)
+ ));
+#endif
+
+ return skb;
+
+error_expand:
+ if (net_ratelimit())
+ printk("%s: failed to expand/update skb for the switch\n", dev->name);
+
+error:
+ /* any errors? drop the packet! */
+ dev_kfree_skb_any(skb);
+ return NULL;
+}
+
+static void
+mvswitch_mangle_rx(struct net_device *dev, struct sk_buff *skb)
+{
+ struct mvswitch_priv *priv;
+ unsigned char *buf;
+ int vlan = -1;
+ int i;
+
+ priv = dev->phy_ptr;
+ if (WARN_ON_ONCE(!priv))
+ return;
+
+#ifdef HEADER_MODE
+ buf = skb->data;
+ skb_pull(skb, MV_HEADER_SIZE);
+#else
+ buf = skb->data + skb->len - MV_TRAILER_SIZE;
+ if (buf[0] != 0x80)
+ return;
+#endif
+
+ /* look for the vlan matching the incoming port */
+ for (i = 0; i < ARRAY_SIZE(priv->vlans); i++) {
+ if ((1 << buf[1]) & priv->vlans[i])
+ vlan = i;
+ }
+
+ if (vlan == -1)
+ return;
+
+ __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vlan);
+}
+
+
+static int
+mvswitch_wait_mask(struct phy_device *pdev, int addr, int reg, u16 mask, u16 val)
+{
+ int i = 100;
+ u16 r;
+
+ do {
+ r = r16(pdev, addr, reg) & mask;
+ if (r == val)
+ return 0;
+ } while(--i > 0);
+ return -ETIMEDOUT;
+}
+
+static int
+mvswitch_config_init(struct phy_device *pdev)
+{
+ struct mvswitch_priv *priv = to_mvsw(pdev);
+ struct net_device *dev = pdev->attached_dev;
+ u8 vlmap = 0;
+ int i;
+
+ if (!dev)
+ return -EINVAL;
+
+ printk("%s: Marvell 88E6060 PHY driver attached.\n", dev->name);
+ linkmode_zero(pdev->supported);
+ linkmode_set_bit(ETHTOOL_LINK_MODE_100baseT_Full_BIT, pdev->supported);
+ linkmode_copy(pdev->advertising, pdev->supported);
+ dev->phy_ptr = priv;
+ pdev->irq = PHY_POLL;
+#ifdef HEADER_MODE
+ dev->flags |= IFF_PROMISC;
+#endif
+
+ /* initialize default vlans */
+ for (i = 0; i < MV_PORTS; i++)
+ priv->vlans[(i == MV_WANPORT ? 2 : 1)] |= (1 << i);
+
+ /* before entering reset, disable all ports */
+ for (i = 0; i < MV_PORTS; i++)
+ w16(pdev, MV_PORTREG(CONTROL, i), 0x00);
+
+ msleep(2); /* wait for the status change to settle in */
+
+ /* put the ATU in reset */
+ w16(pdev, MV_SWITCHREG(ATU_CTRL), MV_ATUCTL_RESET);
+
+ i = mvswitch_wait_mask(pdev, MV_SWITCHREG(ATU_CTRL), MV_ATUCTL_RESET, 0);
+ if (i < 0) {
+ printk("%s: Timeout waiting for the switch to reset.\n", dev->name);
+ return i;
+ }
+
+ /* set the ATU flags */
+ w16(pdev, MV_SWITCHREG(ATU_CTRL),
+ MV_ATUCTL_NO_LEARN |
+ MV_ATUCTL_ATU_1K |
+ MV_ATUCTL_AGETIME(MV_ATUCTL_AGETIME_MIN) /* minimum without disabling ageing */
+ );
+
+ /* initialize the cpu port */
+ w16(pdev, MV_PORTREG(CONTROL, MV_CPUPORT),
+#ifdef HEADER_MODE
+ MV_PORTCTRL_HEADER |
+#else
+ MV_PORTCTRL_RXTR |
+ MV_PORTCTRL_TXTR |
+#endif
+ MV_PORTCTRL_ENABLED
+ );
+ /* wait for the phy change to settle in */
+ msleep(2);
+ for (i = 0; i < MV_PORTS; i++) {
+ u8 pvid = 0;
+ int j;
+
+ vlmap = 0;
+
+ /* look for the matching vlan */
+ for (j = 0; j < ARRAY_SIZE(priv->vlans); j++) {
+ if (priv->vlans[j] & (1 << i)) {
+ vlmap = priv->vlans[j];
+ pvid = j;
+ }
+ }
+ /* leave port unconfigured if it's not part of a vlan */
+ if (!vlmap)
+ continue;
+
+ /* add the cpu port to the allowed destinations list */
+ vlmap |= (1 << MV_CPUPORT);
+
+ /* take port out of its own vlan destination map */
+ vlmap &= ~(1 << i);
+
+ /* apply vlan settings */
+ w16(pdev, MV_PORTREG(VLANMAP, i),
+ MV_PORTVLAN_PORTS(vlmap) |
+ MV_PORTVLAN_ID(i)
+ );
+
+ /* re-enable port */
+ w16(pdev, MV_PORTREG(CONTROL, i),
+ MV_PORTCTRL_ENABLED
+ );
+ }
+
+ w16(pdev, MV_PORTREG(VLANMAP, MV_CPUPORT),
+ MV_PORTVLAN_ID(MV_CPUPORT)
+ );
+
+ /* set the port association vector */
+ for (i = 0; i <= MV_PORTS; i++) {
+ w16(pdev, MV_PORTREG(ASSOC, i),
+ MV_PORTASSOC_PORTS(1 << i)
+ );
+ }
+
+ /* init switch control */
+ w16(pdev, MV_SWITCHREG(CTRL),
+ MV_SWITCHCTL_MSIZE |
+ MV_SWITCHCTL_DROP
+ );
+
+ dev->eth_mangle_rx = mvswitch_mangle_rx;
+ dev->eth_mangle_tx = mvswitch_mangle_tx;
+ priv->orig_features = dev->features;
+
+#ifdef HEADER_MODE
+ dev->priv_flags |= IFF_NO_IP_ALIGN;
+ dev->features |= NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HW_VLAN_CTAG_TX;
+#else
+ dev->features |= NETIF_F_HW_VLAN_CTAG_RX;
+#endif
+
+ return 0;
+}
+
+static int
+mvswitch_read_status(struct phy_device *pdev)
+{
+ pdev->speed = SPEED_100;
+ pdev->duplex = DUPLEX_FULL;
+ pdev->link = 1;
+
+ /* XXX ugly workaround: we can't force the switch
+ * to gracefully handle hosts moving from one port to another,
+ * so we have to regularly clear the ATU database */
+
+ /* wait for the ATU to become available */
+ mvswitch_wait_mask(pdev, MV_SWITCHREG(ATU_OP), MV_ATUOP_INPROGRESS, 0);
+
+ /* flush the ATU */
+ w16(pdev, MV_SWITCHREG(ATU_OP),
+ MV_ATUOP_INPROGRESS |
+ MV_ATUOP_FLUSH_ALL
+ );
+
+ /* wait for operation to complete */
+ mvswitch_wait_mask(pdev, MV_SWITCHREG(ATU_OP), MV_ATUOP_INPROGRESS, 0);
+
+ return 0;
+}
+
+static int
+mvswitch_aneg_done(struct phy_device *phydev)
+{
+ return 1; /* Return any positive value */
+}
+
+static int
+mvswitch_config_aneg(struct phy_device *phydev)
+{
+ return 0;
+}
+
+static void
+mvswitch_detach(struct phy_device *pdev)
+{
+ struct mvswitch_priv *priv = to_mvsw(pdev);
+ struct net_device *dev = pdev->attached_dev;
+
+ if (!dev)
+ return;
+
+ dev->phy_ptr = NULL;
+ dev->eth_mangle_rx = NULL;
+ dev->eth_mangle_tx = NULL;
+ dev->features = priv->orig_features;
+ dev->priv_flags &= ~IFF_NO_IP_ALIGN;
+}
+
+static void
+mvswitch_remove(struct phy_device *pdev)
+{
+ struct mvswitch_priv *priv = to_mvsw(pdev);
+
+ kfree(priv);
+}
+
+static int
+mvswitch_probe(struct phy_device *pdev)
+{
+ struct mvswitch_priv *priv;
+
+ priv = kzalloc(sizeof(struct mvswitch_priv), GFP_KERNEL);
+ if (priv == NULL)
+ return -ENOMEM;
+
+ pdev->priv = priv;
+
+ return 0;
+}
+
+static int
+mvswitch_fixup(struct phy_device *dev)
+{
+ struct mii_bus *bus = dev->mdio.bus;
+ u16 reg;
+
+ if (dev->mdio.addr != 0x10)
+ return 0;
+
+ reg = bus->read(bus, MV_PORTREG(IDENT, 0)) & MV_IDENT_MASK;
+ if (reg != MV_IDENT_VALUE)
+ return 0;
+
+ dev->phy_id = MVSWITCH_MAGIC;
+ return 0;
+}
+
+
+static struct phy_driver mvswitch_driver = {
+ .name = "Marvell 88E6060",
+ .phy_id = MVSWITCH_MAGIC,
+ .phy_id_mask = 0xffffffff,
+ .features = PHY_BASIC_FEATURES,
+ .probe = &mvswitch_probe,
+ .remove = &mvswitch_remove,
+ .detach = &mvswitch_detach,
+ .config_init = &mvswitch_config_init,
+ .config_aneg = &mvswitch_config_aneg,
+ .aneg_done = &mvswitch_aneg_done,
+ .read_status = &mvswitch_read_status,
+};
+
+static int __init
+mvswitch_init(void)
+{
+ phy_register_fixup_for_id(PHY_ANY_ID, mvswitch_fixup);
+ return phy_driver_register(&mvswitch_driver, THIS_MODULE);
+}
+
+static void __exit
+mvswitch_exit(void)
+{
+ phy_driver_unregister(&mvswitch_driver);
+}
+
+module_init(mvswitch_init);
+module_exit(mvswitch_exit);
--- /dev/null
+/*
+ * Marvell 88E6060 switch driver
+ * Copyright (c) 2008 Felix Fietkau <nbd@nbd.name>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License v2 as published by the
+ * Free Software Foundation
+ */
+#ifndef __MVSWITCH_H
+#define __MVSWITCH_H
+
+#define MV_HEADER_SIZE 2
+#define MV_HEADER_PORTS_M 0x001f
+#define MV_HEADER_PORTS_S 0
+#define MV_HEADER_VLAN_M 0xf000
+#define MV_HEADER_VLAN_S 12
+
+#define MV_TRAILER_SIZE 4
+#define MV_TRAILER_PORTS_M 0x1f
+#define MV_TRAILER_PORTS_S 16
+#define MV_TRAILER_FLAGS_S 24
+#define MV_TRAILER_OVERRIDE 0x80
+
+
+#define MV_PORTS 5
+#define MV_WANPORT 4
+#define MV_CPUPORT 5
+
+#define MV_BASE 0x10
+
+#define MV_PHYPORT_BASE (MV_BASE + 0x0)
+#define MV_PHYPORT(_n) (MV_PHYPORT_BASE + (_n))
+#define MV_SWITCHPORT_BASE (MV_BASE + 0x8)
+#define MV_SWITCHPORT(_n) (MV_SWITCHPORT_BASE + (_n))
+#define MV_SWITCHREGS (MV_BASE + 0xf)
+
+enum {
+ MV_PHY_CONTROL = 0x00,
+ MV_PHY_STATUS = 0x01,
+ MV_PHY_IDENT0 = 0x02,
+ MV_PHY_IDENT1 = 0x03,
+ MV_PHY_ANEG = 0x04,
+ MV_PHY_LINK_ABILITY = 0x05,
+ MV_PHY_ANEG_EXPAND = 0x06,
+ MV_PHY_XMIT_NEXTP = 0x07,
+ MV_PHY_LINK_NEXTP = 0x08,
+ MV_PHY_CONTROL1 = 0x10,
+ MV_PHY_STATUS1 = 0x11,
+ MV_PHY_INTR_EN = 0x12,
+ MV_PHY_INTR_STATUS = 0x13,
+ MV_PHY_INTR_PORT = 0x14,
+ MV_PHY_RECV_COUNTER = 0x16,
+ MV_PHY_LED_PARALLEL = 0x16,
+ MV_PHY_LED_STREAM = 0x17,
+ MV_PHY_LED_CTRL = 0x18,
+ MV_PHY_LED_OVERRIDE = 0x19,
+ MV_PHY_VCT_CTRL = 0x1a,
+ MV_PHY_VCT_STATUS = 0x1b,
+ MV_PHY_CONTROL2 = 0x1e
+};
+#define MV_PHYREG(_type, _port) MV_PHYPORT(_port), MV_PHY_##_type
+
+enum {
+ MV_PORT_STATUS = 0x00,
+ MV_PORT_IDENT = 0x03,
+ MV_PORT_CONTROL = 0x04,
+ MV_PORT_VLANMAP = 0x06,
+ MV_PORT_ASSOC = 0x0b,
+ MV_PORT_RXCOUNT = 0x10,
+ MV_PORT_TXCOUNT = 0x11,
+};
+#define MV_PORTREG(_type, _port) MV_SWITCHPORT(_port), MV_PORT_##_type
+
+enum {
+ MV_PORTCTRL_BLOCK = (1 << 0),
+ MV_PORTCTRL_LEARN = (2 << 0),
+ MV_PORTCTRL_ENABLED = (3 << 0),
+ MV_PORTCTRL_VLANTUN = (1 << 7), /* Enforce VLANs on packets */
+ MV_PORTCTRL_RXTR = (1 << 8), /* Enable Marvell packet trailer for ingress */
+ MV_PORTCTRL_HEADER = (1 << 11), /* Enable Marvell packet header mode for port */
+ MV_PORTCTRL_TXTR = (1 << 14), /* Enable Marvell packet trailer for egress */
+ MV_PORTCTRL_FORCEFL = (1 << 15), /* force flow control */
+};
+
+#define MV_PORTVLAN_ID(_n) (((_n) & 0xf) << 12)
+#define MV_PORTVLAN_PORTS(_n) ((_n) & 0x3f)
+
+#define MV_PORTASSOC_PORTS(_n) ((_n) & 0x1f)
+#define MV_PORTASSOC_MONITOR (1 << 15)
+
+enum {
+ MV_SWITCH_MAC0 = 0x01,
+ MV_SWITCH_MAC1 = 0x02,
+ MV_SWITCH_MAC2 = 0x03,
+ MV_SWITCH_CTRL = 0x04,
+ MV_SWITCH_ATU_CTRL = 0x0a,
+ MV_SWITCH_ATU_OP = 0x0b,
+ MV_SWITCH_ATU_DATA = 0x0c,
+ MV_SWITCH_ATU_MAC0 = 0x0d,
+ MV_SWITCH_ATU_MAC1 = 0x0e,
+ MV_SWITCH_ATU_MAC2 = 0x0f,
+};
+#define MV_SWITCHREG(_type) MV_SWITCHREGS, MV_SWITCH_##_type
+
+enum {
+ MV_SWITCHCTL_EEIE = (1 << 0), /* EEPROM interrupt enable */
+ MV_SWITCHCTL_PHYIE = (1 << 1), /* PHY interrupt enable */
+ MV_SWITCHCTL_ATUDONE= (1 << 2), /* ATU done interrupt enable */
+ MV_SWITCHCTL_ATUIE = (1 << 3), /* ATU interrupt enable */
+ MV_SWITCHCTL_CTRMODE= (1 << 8), /* statistics for rx and tx errors */
+ MV_SWITCHCTL_RELOAD = (1 << 9), /* reload registers from eeprom */
+ MV_SWITCHCTL_MSIZE = (1 << 10), /* increase maximum frame size */
+ MV_SWITCHCTL_DROP = (1 << 13), /* discard frames with excessive collisions */
+};
+
+enum {
+#define MV_ATUCTL_AGETIME_MIN 16
+#define MV_ATUCTL_AGETIME_MAX 4080
+#define MV_ATUCTL_AGETIME(_n) ((((_n) / 16) & 0xff) << 4)
+ MV_ATUCTL_ATU_256 = (0 << 12),
+ MV_ATUCTL_ATU_512 = (1 << 12),
+ MV_ATUCTL_ATU_1K = (2 << 12),
+ MV_ATUCTL_ATUMASK = (3 << 12),
+ MV_ATUCTL_NO_LEARN = (1 << 14),
+ MV_ATUCTL_RESET = (1 << 15),
+};
+
+enum {
+#define MV_ATUOP_DBNUM(_n) ((_n) & 0x0f)
+
+ MV_ATUOP_NOOP = (0 << 12),
+ MV_ATUOP_FLUSH_ALL = (1 << 12),
+ MV_ATUOP_FLUSH_U = (2 << 12),
+ MV_ATUOP_LOAD_DB = (3 << 12),
+ MV_ATUOP_GET_NEXT = (4 << 12),
+ MV_ATUOP_FLUSH_DB = (5 << 12),
+ MV_ATUOP_FLUSH_DB_UU= (6 << 12),
+
+ MV_ATUOP_INPROGRESS = (1 << 15),
+};
+
+#define MV_IDENT_MASK 0xfff0
+#define MV_IDENT_VALUE 0x0600
+
+#endif
--- /dev/null
+--- a/drivers/net/phy/Kconfig
++++ b/drivers/net/phy/Kconfig
+@@ -284,6 +284,10 @@ config IP17XX_PHY
+ tristate "Driver for IC+ IP17xx switches"
+ select SWCONFIG
+
++config MVSWITCH_PHY
++ tristate "Driver for Marvell 88E6060 switches"
++ select ETHERNET_PACKET_MANGLE
++
+ config PSB6970_PHY
+ tristate "Lantiq XWAY Tantos (PSB6970) Ethernet switch"
+ select SWCONFIG
+--- a/drivers/net/phy/Makefile
++++ b/drivers/net/phy/Makefile
+@@ -27,6 +27,7 @@ obj-$(CONFIG_ADM6996_PHY) += adm6996.o
+ obj-$(CONFIG_AR8216_PHY) += ar8216.o ar8327.o
+ obj-$(CONFIG_SWCONFIG_B53) += b53/
+ obj-$(CONFIG_IP17XX_PHY) += ip17xx.o
++obj-$(CONFIG_MVSWITCH_PHY) += mvswitch.o
+ obj-$(CONFIG_PSB6970_PHY) += psb6970.o
+ obj-$(CONFIG_RTL8306_PHY) += rtl8306.o
+ obj-$(CONFIG_RTL8366_SMI) += rtl8366_smi.o
# CONFIG_MVMDIO is not set
# CONFIG_MVNETA_BM is not set
# CONFIG_MVSW61XX_PHY is not set
-# CONFIG_MVSWITCH_PHY is not set
# CONFIG_MV_XOR_V2 is not set
# CONFIG_MWAVE is not set
# CONFIG_MWL8K is not set
# CONFIG_MV643XX_ETH is not set
# CONFIG_MVMDIO is not set
# CONFIG_MVNETA_BM is not set
-# CONFIG_MVSWITCH_PHY is not set
# CONFIG_MV_XOR_V2 is not set
# CONFIG_MWAVE is not set
# CONFIG_MWL8K is not set
+++ /dev/null
-/*
- * Marvell 88E6060 switch driver
- * Copyright (c) 2008 Felix Fietkau <nbd@nbd.name>
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License v2 as published by the
- * Free Software Foundation
- */
-#include <linux/kernel.h>
-#include <linux/string.h>
-#include <linux/errno.h>
-#include <linux/unistd.h>
-#include <linux/slab.h>
-#include <linux/interrupt.h>
-#include <linux/init.h>
-#include <linux/delay.h>
-#include <linux/netdevice.h>
-#include <linux/etherdevice.h>
-#include <linux/skbuff.h>
-#include <linux/spinlock.h>
-#include <linux/mm.h>
-#include <linux/module.h>
-#include <linux/mii.h>
-#include <linux/ethtool.h>
-#include <linux/phy.h>
-#include <linux/if_vlan.h>
-#include <linux/version.h>
-
-#include <asm/io.h>
-#include <asm/irq.h>
-#include <asm/uaccess.h>
-#include "mvswitch.h"
-
-/* Undefine this to use trailer mode instead.
- * I don't know if header mode works with all chips */
-#define HEADER_MODE 1
-
-MODULE_DESCRIPTION("Marvell 88E6060 Switch driver");
-MODULE_AUTHOR("Felix Fietkau");
-MODULE_LICENSE("GPL");
-
-#define MVSWITCH_MAGIC 0x88E6060
-
-struct mvswitch_priv {
- netdev_features_t orig_features;
- u8 vlans[16];
-};
-
-#define to_mvsw(_phy) ((struct mvswitch_priv *) (_phy)->priv)
-
-static inline u16
-r16(struct phy_device *phydev, int addr, int reg)
-{
- struct mii_bus *bus = phydev->mdio.bus;
-
- return bus->read(bus, addr, reg);
-}
-
-static inline void
-w16(struct phy_device *phydev, int addr, int reg, u16 val)
-{
- struct mii_bus *bus = phydev->mdio.bus;
-
- bus->write(bus, addr, reg, val);
-}
-
-
-static struct sk_buff *
-mvswitch_mangle_tx(struct net_device *dev, struct sk_buff *skb)
-{
- struct mvswitch_priv *priv;
- char *buf = NULL;
- u16 vid;
-
- priv = dev->phy_ptr;
- if (unlikely(!priv))
- goto error;
-
- if (unlikely(skb->len < 16))
- goto error;
-
-#ifdef HEADER_MODE
- if (__vlan_hwaccel_get_tag(skb, &vid))
- goto error;
-
- if (skb_cloned(skb) || (skb->len <= 62) || (skb_headroom(skb) < MV_HEADER_SIZE)) {
- if (pskb_expand_head(skb, MV_HEADER_SIZE, (skb->len < 62 ? 62 - skb->len : 0), GFP_ATOMIC))
- goto error_expand;
- if (skb->len < 62)
- skb->len = 62;
- }
- buf = skb_push(skb, MV_HEADER_SIZE);
-#else
- if (__vlan_get_tag(skb, &vid))
- goto error;
-
- if (unlikely((vid > 15 || !priv->vlans[vid])))
- goto error;
-
- if (skb->len <= 64) {
- if (pskb_expand_head(skb, 0, 64 + MV_TRAILER_SIZE - skb->len, GFP_ATOMIC))
- goto error_expand;
-
- buf = skb->data + 64;
- skb->len = 64 + MV_TRAILER_SIZE;
- } else {
- if (skb_cloned(skb) || unlikely(skb_tailroom(skb) < 4)) {
- if (pskb_expand_head(skb, 0, 4, GFP_ATOMIC))
- goto error_expand;
- }
- buf = skb_put(skb, 4);
- }
-
- /* move the ethernet header 4 bytes forward, overwriting the vlan tag */
- memmove(skb->data + 4, skb->data, 12);
- skb->data += 4;
- skb->len -= 4;
- skb->mac_header += 4;
-#endif
-
- if (!buf)
- goto error;
-
-
-#ifdef HEADER_MODE
- /* prepend the tag */
- *((__be16 *) buf) = cpu_to_be16(
- ((vid << MV_HEADER_VLAN_S) & MV_HEADER_VLAN_M) |
- ((priv->vlans[vid] << MV_HEADER_PORTS_S) & MV_HEADER_PORTS_M)
- );
-#else
- /* append the tag */
- *((__be32 *) buf) = cpu_to_be32((
- (MV_TRAILER_OVERRIDE << MV_TRAILER_FLAGS_S) |
- ((priv->vlans[vid] & MV_TRAILER_PORTS_M) << MV_TRAILER_PORTS_S)
- ));
-#endif
-
- return skb;
-
-error_expand:
- if (net_ratelimit())
- printk("%s: failed to expand/update skb for the switch\n", dev->name);
-
-error:
- /* any errors? drop the packet! */
- dev_kfree_skb_any(skb);
- return NULL;
-}
-
-static void
-mvswitch_mangle_rx(struct net_device *dev, struct sk_buff *skb)
-{
- struct mvswitch_priv *priv;
- unsigned char *buf;
- int vlan = -1;
- int i;
-
- priv = dev->phy_ptr;
- if (WARN_ON_ONCE(!priv))
- return;
-
-#ifdef HEADER_MODE
- buf = skb->data;
- skb_pull(skb, MV_HEADER_SIZE);
-#else
- buf = skb->data + skb->len - MV_TRAILER_SIZE;
- if (buf[0] != 0x80)
- return;
-#endif
-
- /* look for the vlan matching the incoming port */
- for (i = 0; i < ARRAY_SIZE(priv->vlans); i++) {
- if ((1 << buf[1]) & priv->vlans[i])
- vlan = i;
- }
-
- if (vlan == -1)
- return;
-
- __vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vlan);
-}
-
-
-static int
-mvswitch_wait_mask(struct phy_device *pdev, int addr, int reg, u16 mask, u16 val)
-{
- int i = 100;
- u16 r;
-
- do {
- r = r16(pdev, addr, reg) & mask;
- if (r == val)
- return 0;
- } while(--i > 0);
- return -ETIMEDOUT;
-}
-
-static int
-mvswitch_config_init(struct phy_device *pdev)
-{
- struct mvswitch_priv *priv = to_mvsw(pdev);
- struct net_device *dev = pdev->attached_dev;
- u8 vlmap = 0;
- int i;
-
- if (!dev)
- return -EINVAL;
-
- printk("%s: Marvell 88E6060 PHY driver attached.\n", dev->name);
- linkmode_zero(pdev->supported);
- linkmode_set_bit(ETHTOOL_LINK_MODE_100baseT_Full_BIT, pdev->supported);
- linkmode_copy(pdev->advertising, pdev->supported);
- dev->phy_ptr = priv;
- pdev->irq = PHY_POLL;
-#ifdef HEADER_MODE
- dev->flags |= IFF_PROMISC;
-#endif
-
- /* initialize default vlans */
- for (i = 0; i < MV_PORTS; i++)
- priv->vlans[(i == MV_WANPORT ? 2 : 1)] |= (1 << i);
-
- /* before entering reset, disable all ports */
- for (i = 0; i < MV_PORTS; i++)
- w16(pdev, MV_PORTREG(CONTROL, i), 0x00);
-
- msleep(2); /* wait for the status change to settle in */
-
- /* put the ATU in reset */
- w16(pdev, MV_SWITCHREG(ATU_CTRL), MV_ATUCTL_RESET);
-
- i = mvswitch_wait_mask(pdev, MV_SWITCHREG(ATU_CTRL), MV_ATUCTL_RESET, 0);
- if (i < 0) {
- printk("%s: Timeout waiting for the switch to reset.\n", dev->name);
- return i;
- }
-
- /* set the ATU flags */
- w16(pdev, MV_SWITCHREG(ATU_CTRL),
- MV_ATUCTL_NO_LEARN |
- MV_ATUCTL_ATU_1K |
- MV_ATUCTL_AGETIME(MV_ATUCTL_AGETIME_MIN) /* minimum without disabling ageing */
- );
-
- /* initialize the cpu port */
- w16(pdev, MV_PORTREG(CONTROL, MV_CPUPORT),
-#ifdef HEADER_MODE
- MV_PORTCTRL_HEADER |
-#else
- MV_PORTCTRL_RXTR |
- MV_PORTCTRL_TXTR |
-#endif
- MV_PORTCTRL_ENABLED
- );
- /* wait for the phy change to settle in */
- msleep(2);
- for (i = 0; i < MV_PORTS; i++) {
- u8 pvid = 0;
- int j;
-
- vlmap = 0;
-
- /* look for the matching vlan */
- for (j = 0; j < ARRAY_SIZE(priv->vlans); j++) {
- if (priv->vlans[j] & (1 << i)) {
- vlmap = priv->vlans[j];
- pvid = j;
- }
- }
- /* leave port unconfigured if it's not part of a vlan */
- if (!vlmap)
- continue;
-
- /* add the cpu port to the allowed destinations list */
- vlmap |= (1 << MV_CPUPORT);
-
- /* take port out of its own vlan destination map */
- vlmap &= ~(1 << i);
-
- /* apply vlan settings */
- w16(pdev, MV_PORTREG(VLANMAP, i),
- MV_PORTVLAN_PORTS(vlmap) |
- MV_PORTVLAN_ID(i)
- );
-
- /* re-enable port */
- w16(pdev, MV_PORTREG(CONTROL, i),
- MV_PORTCTRL_ENABLED
- );
- }
-
- w16(pdev, MV_PORTREG(VLANMAP, MV_CPUPORT),
- MV_PORTVLAN_ID(MV_CPUPORT)
- );
-
- /* set the port association vector */
- for (i = 0; i <= MV_PORTS; i++) {
- w16(pdev, MV_PORTREG(ASSOC, i),
- MV_PORTASSOC_PORTS(1 << i)
- );
- }
-
- /* init switch control */
- w16(pdev, MV_SWITCHREG(CTRL),
- MV_SWITCHCTL_MSIZE |
- MV_SWITCHCTL_DROP
- );
-
- dev->eth_mangle_rx = mvswitch_mangle_rx;
- dev->eth_mangle_tx = mvswitch_mangle_tx;
- priv->orig_features = dev->features;
-
-#ifdef HEADER_MODE
- dev->priv_flags |= IFF_NO_IP_ALIGN;
- dev->features |= NETIF_F_HW_VLAN_CTAG_RX | NETIF_F_HW_VLAN_CTAG_TX;
-#else
- dev->features |= NETIF_F_HW_VLAN_CTAG_RX;
-#endif
-
- return 0;
-}
-
-static int
-mvswitch_read_status(struct phy_device *pdev)
-{
- pdev->speed = SPEED_100;
- pdev->duplex = DUPLEX_FULL;
- pdev->link = 1;
-
- /* XXX ugly workaround: we can't force the switch
- * to gracefully handle hosts moving from one port to another,
- * so we have to regularly clear the ATU database */
-
- /* wait for the ATU to become available */
- mvswitch_wait_mask(pdev, MV_SWITCHREG(ATU_OP), MV_ATUOP_INPROGRESS, 0);
-
- /* flush the ATU */
- w16(pdev, MV_SWITCHREG(ATU_OP),
- MV_ATUOP_INPROGRESS |
- MV_ATUOP_FLUSH_ALL
- );
-
- /* wait for operation to complete */
- mvswitch_wait_mask(pdev, MV_SWITCHREG(ATU_OP), MV_ATUOP_INPROGRESS, 0);
-
- return 0;
-}
-
-static int
-mvswitch_aneg_done(struct phy_device *phydev)
-{
- return 1; /* Return any positive value */
-}
-
-static int
-mvswitch_config_aneg(struct phy_device *phydev)
-{
- return 0;
-}
-
-static void
-mvswitch_detach(struct phy_device *pdev)
-{
- struct mvswitch_priv *priv = to_mvsw(pdev);
- struct net_device *dev = pdev->attached_dev;
-
- if (!dev)
- return;
-
- dev->phy_ptr = NULL;
- dev->eth_mangle_rx = NULL;
- dev->eth_mangle_tx = NULL;
- dev->features = priv->orig_features;
- dev->priv_flags &= ~IFF_NO_IP_ALIGN;
-}
-
-static void
-mvswitch_remove(struct phy_device *pdev)
-{
- struct mvswitch_priv *priv = to_mvsw(pdev);
-
- kfree(priv);
-}
-
-static int
-mvswitch_probe(struct phy_device *pdev)
-{
- struct mvswitch_priv *priv;
-
- priv = kzalloc(sizeof(struct mvswitch_priv), GFP_KERNEL);
- if (priv == NULL)
- return -ENOMEM;
-
- pdev->priv = priv;
-
- return 0;
-}
-
-static int
-mvswitch_fixup(struct phy_device *dev)
-{
- struct mii_bus *bus = dev->mdio.bus;
- u16 reg;
-
- if (dev->mdio.addr != 0x10)
- return 0;
-
- reg = bus->read(bus, MV_PORTREG(IDENT, 0)) & MV_IDENT_MASK;
- if (reg != MV_IDENT_VALUE)
- return 0;
-
- dev->phy_id = MVSWITCH_MAGIC;
- return 0;
-}
-
-
-static struct phy_driver mvswitch_driver = {
- .name = "Marvell 88E6060",
- .phy_id = MVSWITCH_MAGIC,
- .phy_id_mask = 0xffffffff,
- .features = PHY_BASIC_FEATURES,
- .probe = &mvswitch_probe,
- .remove = &mvswitch_remove,
- .detach = &mvswitch_detach,
- .config_init = &mvswitch_config_init,
- .config_aneg = &mvswitch_config_aneg,
- .aneg_done = &mvswitch_aneg_done,
- .read_status = &mvswitch_read_status,
-};
-
-static int __init
-mvswitch_init(void)
-{
- phy_register_fixup_for_id(PHY_ANY_ID, mvswitch_fixup);
- return phy_driver_register(&mvswitch_driver, THIS_MODULE);
-}
-
-static void __exit
-mvswitch_exit(void)
-{
- phy_driver_unregister(&mvswitch_driver);
-}
-
-module_init(mvswitch_init);
-module_exit(mvswitch_exit);
+++ /dev/null
-/*
- * Marvell 88E6060 switch driver
- * Copyright (c) 2008 Felix Fietkau <nbd@nbd.name>
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License v2 as published by the
- * Free Software Foundation
- */
-#ifndef __MVSWITCH_H
-#define __MVSWITCH_H
-
-#define MV_HEADER_SIZE 2
-#define MV_HEADER_PORTS_M 0x001f
-#define MV_HEADER_PORTS_S 0
-#define MV_HEADER_VLAN_M 0xf000
-#define MV_HEADER_VLAN_S 12
-
-#define MV_TRAILER_SIZE 4
-#define MV_TRAILER_PORTS_M 0x1f
-#define MV_TRAILER_PORTS_S 16
-#define MV_TRAILER_FLAGS_S 24
-#define MV_TRAILER_OVERRIDE 0x80
-
-
-#define MV_PORTS 5
-#define MV_WANPORT 4
-#define MV_CPUPORT 5
-
-#define MV_BASE 0x10
-
-#define MV_PHYPORT_BASE (MV_BASE + 0x0)
-#define MV_PHYPORT(_n) (MV_PHYPORT_BASE + (_n))
-#define MV_SWITCHPORT_BASE (MV_BASE + 0x8)
-#define MV_SWITCHPORT(_n) (MV_SWITCHPORT_BASE + (_n))
-#define MV_SWITCHREGS (MV_BASE + 0xf)
-
-enum {
- MV_PHY_CONTROL = 0x00,
- MV_PHY_STATUS = 0x01,
- MV_PHY_IDENT0 = 0x02,
- MV_PHY_IDENT1 = 0x03,
- MV_PHY_ANEG = 0x04,
- MV_PHY_LINK_ABILITY = 0x05,
- MV_PHY_ANEG_EXPAND = 0x06,
- MV_PHY_XMIT_NEXTP = 0x07,
- MV_PHY_LINK_NEXTP = 0x08,
- MV_PHY_CONTROL1 = 0x10,
- MV_PHY_STATUS1 = 0x11,
- MV_PHY_INTR_EN = 0x12,
- MV_PHY_INTR_STATUS = 0x13,
- MV_PHY_INTR_PORT = 0x14,
- MV_PHY_RECV_COUNTER = 0x16,
- MV_PHY_LED_PARALLEL = 0x16,
- MV_PHY_LED_STREAM = 0x17,
- MV_PHY_LED_CTRL = 0x18,
- MV_PHY_LED_OVERRIDE = 0x19,
- MV_PHY_VCT_CTRL = 0x1a,
- MV_PHY_VCT_STATUS = 0x1b,
- MV_PHY_CONTROL2 = 0x1e
-};
-#define MV_PHYREG(_type, _port) MV_PHYPORT(_port), MV_PHY_##_type
-
-enum {
- MV_PORT_STATUS = 0x00,
- MV_PORT_IDENT = 0x03,
- MV_PORT_CONTROL = 0x04,
- MV_PORT_VLANMAP = 0x06,
- MV_PORT_ASSOC = 0x0b,
- MV_PORT_RXCOUNT = 0x10,
- MV_PORT_TXCOUNT = 0x11,
-};
-#define MV_PORTREG(_type, _port) MV_SWITCHPORT(_port), MV_PORT_##_type
-
-enum {
- MV_PORTCTRL_BLOCK = (1 << 0),
- MV_PORTCTRL_LEARN = (2 << 0),
- MV_PORTCTRL_ENABLED = (3 << 0),
- MV_PORTCTRL_VLANTUN = (1 << 7), /* Enforce VLANs on packets */
- MV_PORTCTRL_RXTR = (1 << 8), /* Enable Marvell packet trailer for ingress */
- MV_PORTCTRL_HEADER = (1 << 11), /* Enable Marvell packet header mode for port */
- MV_PORTCTRL_TXTR = (1 << 14), /* Enable Marvell packet trailer for egress */
- MV_PORTCTRL_FORCEFL = (1 << 15), /* force flow control */
-};
-
-#define MV_PORTVLAN_ID(_n) (((_n) & 0xf) << 12)
-#define MV_PORTVLAN_PORTS(_n) ((_n) & 0x3f)
-
-#define MV_PORTASSOC_PORTS(_n) ((_n) & 0x1f)
-#define MV_PORTASSOC_MONITOR (1 << 15)
-
-enum {
- MV_SWITCH_MAC0 = 0x01,
- MV_SWITCH_MAC1 = 0x02,
- MV_SWITCH_MAC2 = 0x03,
- MV_SWITCH_CTRL = 0x04,
- MV_SWITCH_ATU_CTRL = 0x0a,
- MV_SWITCH_ATU_OP = 0x0b,
- MV_SWITCH_ATU_DATA = 0x0c,
- MV_SWITCH_ATU_MAC0 = 0x0d,
- MV_SWITCH_ATU_MAC1 = 0x0e,
- MV_SWITCH_ATU_MAC2 = 0x0f,
-};
-#define MV_SWITCHREG(_type) MV_SWITCHREGS, MV_SWITCH_##_type
-
-enum {
- MV_SWITCHCTL_EEIE = (1 << 0), /* EEPROM interrupt enable */
- MV_SWITCHCTL_PHYIE = (1 << 1), /* PHY interrupt enable */
- MV_SWITCHCTL_ATUDONE= (1 << 2), /* ATU done interrupt enable */
- MV_SWITCHCTL_ATUIE = (1 << 3), /* ATU interrupt enable */
- MV_SWITCHCTL_CTRMODE= (1 << 8), /* statistics for rx and tx errors */
- MV_SWITCHCTL_RELOAD = (1 << 9), /* reload registers from eeprom */
- MV_SWITCHCTL_MSIZE = (1 << 10), /* increase maximum frame size */
- MV_SWITCHCTL_DROP = (1 << 13), /* discard frames with excessive collisions */
-};
-
-enum {
-#define MV_ATUCTL_AGETIME_MIN 16
-#define MV_ATUCTL_AGETIME_MAX 4080
-#define MV_ATUCTL_AGETIME(_n) ((((_n) / 16) & 0xff) << 4)
- MV_ATUCTL_ATU_256 = (0 << 12),
- MV_ATUCTL_ATU_512 = (1 << 12),
- MV_ATUCTL_ATU_1K = (2 << 12),
- MV_ATUCTL_ATUMASK = (3 << 12),
- MV_ATUCTL_NO_LEARN = (1 << 14),
- MV_ATUCTL_RESET = (1 << 15),
-};
-
-enum {
-#define MV_ATUOP_DBNUM(_n) ((_n) & 0x0f)
-
- MV_ATUOP_NOOP = (0 << 12),
- MV_ATUOP_FLUSH_ALL = (1 << 12),
- MV_ATUOP_FLUSH_U = (2 << 12),
- MV_ATUOP_LOAD_DB = (3 << 12),
- MV_ATUOP_GET_NEXT = (4 << 12),
- MV_ATUOP_FLUSH_DB = (5 << 12),
- MV_ATUOP_FLUSH_DB_UU= (6 << 12),
-
- MV_ATUOP_INPROGRESS = (1 << 15),
-};
-
-#define MV_IDENT_MASK 0xfff0
-#define MV_IDENT_VALUE 0x0600
-
-#endif
--- a/drivers/net/phy/Kconfig
+++ b/drivers/net/phy/Kconfig
-@@ -250,6 +250,85 @@ config LED_TRIGGER_PHY
+@@ -250,6 +250,81 @@ config LED_TRIGGER_PHY
for any speed known to the PHY.
+ tristate "Driver for IC+ IP17xx switches"
+ select SWCONFIG
+
-+config MVSWITCH_PHY
-+ tristate "Driver for Marvell 88E6060 switches"
-+ select ETHERNET_PACKET_MANGLE
-+
+config PSB6970_PHY
+ tristate "Lantiq XWAY Tantos (PSB6970) Ethernet switch"
+ select SWCONFIG
config SFP
--- a/drivers/net/phy/Makefile
+++ b/drivers/net/phy/Makefile
-@@ -22,6 +22,20 @@ libphy-$(CONFIG_LED_TRIGGER_PHY) += phy_
+@@ -22,6 +22,19 @@ libphy-$(CONFIG_LED_TRIGGER_PHY) += phy_
obj-$(CONFIG_PHYLINK) += phylink.o
obj-$(CONFIG_PHYLIB) += libphy.o
+obj-$(CONFIG_AR8216_PHY) += ar8216.o ar8327.o
+obj-$(CONFIG_SWCONFIG_B53) += b53/
+obj-$(CONFIG_IP17XX_PHY) += ip17xx.o
-+obj-$(CONFIG_MVSWITCH_PHY) += mvswitch.o
+obj-$(CONFIG_PSB6970_PHY) += psb6970.o
+obj-$(CONFIG_RTL8306_PHY) += rtl8306.o
+obj-$(CONFIG_RTL8366_SMI) += rtl8366_smi.o
projects / openwrt / staging / mkresin.git / commitdiff