ath79: add support for Atheros DB120 reference board
[openwrt/staging/stintel.git] / target / linux / ath79 / dts / ar9344_atheros_db120.dts
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2
3 #include "ar9344.dtsi"
4
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h>
7 #include <dt-bindings/mtd/partitions/uimage.h>
8
9 / {
10 model = "Atheros DB120 reference board";
11 compatible = "atheros,db120", "qca,ar9344";
12
13 aliases {
14 led-boot = &led_system;
15 led-failsafe = &led_system;
16 led-running = &led_system;
17 led-upgrade = &led_system;
18 };
19
20 leds {
21 compatible = "gpio-leds";
22
23 wlan2g {
24 label = "green:wlan2g";
25 gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
26 linux,default-trigger = "phy0tpt";
27 };
28
29 wlan5g {
30 label = "green:wlan5g";
31 gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
32 linux,default-trigger = "phy1tpt";
33 };
34
35 led_system: system {
36 label = "green:system";
37 gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
38 default-state = "on";
39 };
40
41 usb {
42 label = "green:usb";
43 gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
44 trigger-sources = <&hub_port1>;
45 linux,default-trigger = "usbport";
46 };
47 };
48
49 leds-ath9k {
50 compatible = "gpio-leds";
51
52 wlan5g-ath {
53 label = "green:wlan5g-ath";
54 gpios = <&ath9k 0 GPIO_ACTIVE_LOW>;
55 linux,default-trigger = "phy1tpt";
56 };
57 };
58
59 keys {
60 compatible = "gpio-keys";
61
62 wps {
63 linux,code = <KEY_WPS_BUTTON>;
64 label = "WPS button";
65 gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
66 debounce-interval = <60>;
67 };
68 };
69
70 virtual_flash {
71 compatible = "mtd-concat";
72 devices = <&fwconcat0 &fwconcat1>;
73
74 partitions {
75 compatible = "fixed-partitions";
76 #address-cells = <1>;
77 #size-cells = <1>;
78
79 partition@0 {
80 reg = <0x0 0x0>;
81 label = "firmware";
82 compatible = "openwrt,uimage", "denx,uimage";
83 openwrt,ih-magic = <IH_MAGIC_OKLI>;
84 };
85 };
86 };
87 };
88
89 &ref {
90 clock-frequency = <40000000>;
91 };
92
93 &spi {
94 status = "okay";
95
96 flash@0 {
97 compatible = "jedec,spi-nor";
98 reg = <0>;
99 spi-max-frequency = <25000000>;
100
101 partitions {
102 compatible = "fixed-partitions";
103 #address-cells = <1>;
104 #size-cells = <1>;
105
106 uboot: partition@0 {
107 label = "u-boot";
108 reg = <0x000000 0x040000>;
109 read-only;
110 };
111
112 partition@40000 {
113 label = "u-boot-env";
114 reg = <0x040000 0x010000>;
115 read-only;
116 };
117
118 fwconcat0: partition@50000 {
119 label = "fwconcat0";
120 reg = <0x050000 0x630000>;
121 };
122
123 partition@680000 {
124 label = "loader";
125 reg = <0x680000 0x010000>;
126 };
127
128 fwconcat1: partition@690000 {
129 label = "fwconcat1";
130 reg = <0x690000 0x150000>;
131 };
132
133 partition@7e0000 {
134 label = "nvram";
135 reg = <0x7e0000 0x010000>;
136 };
137
138 art: partition@7f0000 {
139 label = "art";
140 reg = <0x7f0000 0x010000>;
141 read-only;
142 };
143 };
144 };
145 };
146
147 &eth0 {
148 status = "okay";
149
150 pll-data = <0x06000000 0x00000101 0x00001616>;
151
152 nvmem-cells = <&macaddr_art_0>;
153 nvmem-cell-names = "mac-address";
154
155 phy-mode = "rgmii";
156 phy-handle = <&phy0>;
157 };
158
159 &mdio0 {
160 status = "okay";
161
162 phy-mask = <0>;
163
164 phy0: ethernet-phy@0 {
165 reg = <0>;
166
167 qca,ar8327-initvals = <
168 0x04 0x07600000 /* PORT0 PAD MODE CTRL */
169 0x10 0xc1000000 /* POWER_ON_STRAP */
170 0x7c 0x0000007e /* PORT0_STATUS */
171 0x94 0x0000007e /* PORT6_STATUS */
172 >;
173 };
174 };
175
176 &pinmux {
177 pmx_led_wan_lan: pinmux_led_wan_lan {
178 pinctrl-single,bits = <0x10 0x2c2d0000 0xffff0000>,
179 <0x14 0x292a2b 0xffffff>;
180 };
181 };
182
183 &builtin_switch {
184 pinctrl-names = "default";
185 pinctrl-0 = <&pmx_led_wan_lan>;
186
187 /delete-property/qca,phy4-mii-enable;
188 };
189
190 &eth1 {
191 status = "okay";
192
193 nvmem-cells = <&macaddr_art_6>;
194 nvmem-cell-names = "mac-address";
195
196 gmac-config {
197 device = <&gmac>;
198 switch-phy-swap = <0>;
199 switch-only-mode = <1>;
200 };
201 };
202
203 &pcie {
204 status = "okay";
205
206 ath9k: wifi@0,0 {
207 compatible = "pci168c,0030";
208 reg = <0x0000 0 0 0 0>;
209 qca,no-eeprom;
210 qca,disable-2ghz;
211 #gpio-cells = <2>;
212 gpio-controller;
213 };
214 };
215
216 &wmac {
217 status = "okay";
218
219 mtd-cal-data = <&art 0x1000>;
220 };
221
222 &usb {
223 status = "okay";
224
225 #address-cells = <1>;
226 #size-cells = <0>;
227
228 hub_port1: port@1 {
229 reg = <1>;
230 #trigger-source-cells = <0>;
231 };
232 };
233
234 &usb_phy {
235 status = "okay";
236 };
237
238 &art {
239 compatible = "nvmem-cells";
240 #address-cells = <1>;
241 #size-cells = <1>;
242
243 macaddr_art_0: macaddr@0 {
244 reg = <0x0 0x6>;
245 };
246
247 macaddr_art_6: macaddr@6 {
248 reg = <0x6 0x6>;
249 };
250 };