bcm63xx: move dts-v1 statement to top-level DTSI files
[openwrt/staging/stintel.git] / target / linux / bcm63xx / dts / bcm6348.dtsi
1 /dts-v1/;
2
3 / {
4 #address-cells = <1>;
5 #size-cells = <1>;
6 compatible = "brcm,bcm6348";
7
8 aliases {
9 pflash = &pflash;
10 pinctrl = &pinctrl;
11 serial0 = &uart0;
12 spi0 = &lsspi;
13 };
14
15 cpus {
16 #address-cells = <1>;
17 #size-cells = <0>;
18
19 cpu@0 {
20 compatible = "brcm,bmips3300", "mips,mips4Kc";
21 device_type = "cpu";
22 reg = <0>;
23 };
24 };
25
26 cpu_intc: interrupt-controller {
27 #address-cells = <0>;
28 compatible = "mti,cpu-interrupt-controller";
29
30 interrupt-controller;
31 #interrupt-cells = <1>;
32 };
33
34 memory { device_type = "memory"; reg = <0 0>; };
35
36 pflash: nor@1fc00000 {
37 compatible = "cfi-flash";
38 reg = <0x1fc00000 0x400000>;
39 bank-width = <2>;
40 #address-cells = <1>;
41 #size-cells = <1>;
42
43 status = "disabled";
44 };
45
46 ubus@fff00000 {
47 #address-cells = <1>;
48 #size-cells = <1>;
49 ranges;
50 compatible = "simple-bus";
51 interrupt-parent = <&periph_intc>;
52
53 periph_intc: interrupt-controller@fffe000c {
54 compatible = "brcm,bcm6345-l1-intc";
55 reg = <0xfffe000c 0x8>;
56
57 interrupt-controller;
58 #interrupt-cells = <1>;
59
60 interrupt-parent = <&cpu_intc>;
61 interrupts = <2>;
62 };
63
64 ext_intc: interrupt-controller@fffe0014 {
65 compatible = "brcm,bcm6345-ext-intc";
66 reg = <0xfffe0014 0x4>;
67
68 interrupt-controller;
69 #interrupt-cells = <2>;
70
71 interrupt-parent = <&cpu_intc>;
72 interrupts = <3>, <4>, <5>, <6>;
73
74 brcm,field-width = <5>;
75 };
76
77 pinctrl: pin-controller@fffe0400 {
78 compatible = "brcm,bcm6348-pinctrl";
79 reg = <0xfffe0400 0x8>,
80 <0xfffe0408 0x8>,
81 <0xfffe0418 0x4>;
82 reg-names = "dirout", "dat", "mode";
83
84 gpio-controller;
85 #gpio-cells = <2>;
86
87 interrupt-parent = <&ext_intc>;
88 interrupts = <0 0>, <1 0>, <2 0>, <3 0>;
89 interrupt-names = "gpio32", "gpio33", "gpio34", "gpio35";
90
91 pinctrl_ext_ephy: ext_ephy {
92 function = "ext_ephy";
93 groups = "group1", "group4";
94 };
95
96 pinctrl_mii_snoop: mii_snoop {
97 function = "ext_ephy";
98 groups = "group1", "group4";
99 };
100
101 pinctrl_legacy_led: legacy_led {
102 function = "legacy_led";
103 groups = "group4";
104 };
105
106 pinctrl_mii_pccard: mii_pccard {
107 function = "mii_pccard";
108 groups = "group1";
109 };
110
111 pinctrl_pci: pci {
112 function = "pci";
113 groups = "group2";
114 };
115
116 pinctrl_spi_master_uart: spi_master_uart {
117 function = "spi_master_uart";
118 groups = "group1";
119 };
120
121 pinctrl_ext_mii: ext_mii {
122 function = "ext_mii";
123 groups = "group0", "group3";
124 };
125
126 pinctrl_utopia: utopia {
127 function = "utopia";
128 groups = "group0", "group1", "group3";
129 };
130 };
131
132 uart0: serial@fffe0300 {
133 compatible = "brcm,bcm6345-uart";
134 reg = <0xfffe0300 0x18>;
135
136 interrupt-parent = <&periph_intc>;
137 interrupts = <2>;
138
139 /* clocks = <&periph_clk>; */
140 /* clock-names = "refclk"; */
141
142 status = "disabled";
143 };
144
145 lsspi: spi@fffe0c00 {
146 #address-cells = <1>;
147 #size-cells = <0>;
148 compatible = "brcm,bcm6348-spi";
149 reg = <0xfffe0c00 0x40>;
150 interrupts = <1>;
151 /* clocks = <&clkctl 9>; */
152
153 };
154 };
155 };