target/linux/ipq40xx/files-6.1/arch/arm/boot/dts/qcom-ipq4029-ap-303.dts

   1 // SPDX-License-Identifier: GPL-2.0-only OR MIT
   2
   3 #include "qcom-ipq4029-aruba-glenmorangie.dtsi"
   4 #include <dt-bindings/gpio/gpio.h>
   5
   6 / {
   7         model = "Aruba AP-303";
   8         compatible = "aruba,ap-303";
   9
  10         aliases {
  11                 led-boot = &led_system_green;
  12                 led-failsafe = &led_system_red;
  13                 led-running = &led_system_green;
  14                 led-upgrade = &led_system_red;
  15         };
  16
  17         leds {
  18                 compatible = "gpio-leds";
  19
  20                 wifi_green {
  21                         label = "green:wifi";
  22                         gpios = <&tlmm 39 GPIO_ACTIVE_HIGH>;
  23                         linux,default-trigger = "phy0tpt";
  24                 };
  25
  26                 wifi_amber {
  27                         label = "amber:wifi";
  28                         gpios = <&tlmm 40 GPIO_ACTIVE_HIGH>;
  29                         linux,default-trigger = "phy1tpt";
  30                 };
  31
  32                 led_system_red: system_red {
  33                         label = "red:system";
  34                         gpios = <&tlmm 46 GPIO_ACTIVE_HIGH>;
  35                 };
  36
  37                 led_system_green: system_green {
  38                         label = "green:system";
  39                         gpios = <&tlmm 47 GPIO_ACTIVE_HIGH>;
  40                 };
  41         };
  42 };
  43
  44 &tlmm {
  45         /*
  46          * In addition to the Pins listed below,
  47          * the following GPIOs have "features":
  48          * 54 - out - active low to force HW reset
  49          * 41 - out - active low to reset TPM
  50          * 43 - out - active low to reset BLE radio
  51          * 19 - in  - active high when DC powered
  52          */
  53
  54         phy-reset {
  55                 line-name = "PHY-reset";
  56                 gpios = <42 GPIO_ACTIVE_HIGH>;
  57                 gpio-hog;
  58                 output-high;
  59         };
  60 };
  61
  62 &blsp1_spi1 {
  63         pinctrl-0 = <&spi_0_pins>;
  64         pinctrl-names = "default";
  65         status = "okay";
  66         cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>;
  67
  68         flash@0 {
  69                 compatible = "jedec,spi-nor";
  70                 reg = <0>;
  71                 spi-max-frequency = <24000000>;
  72
  73                 partitions {
  74                         compatible = "fixed-partitions";
  75                         #address-cells = <1>;
  76                         #size-cells = <1>;
  77
  78                         /*
  79                          * There is no partition map for the NOR flash
  80                          * in the stock firmware.
  81                          *
  82                          * All partitions here are based on offsets
  83                          * found in the U-Boot GPL code and information
  84                          * from smem.
  85                          */
  86
  87                         partition@0 {
  88                                 label = "sbl1";
  89                                 reg = <0x0 0x40000>;
  90                                 read-only;
  91                         };
  92
  93                         partition@40000 {
  94                                 label = "mibib";
  95                                 reg = <0x40000 0x20000>;
  96                                 read-only;
  97                         };
  98
  99                         partition@60000 {
 100                                 label = "qsee";
 101                                 reg = <0x60000 0x60000>;
 102                                 read-only;
 103                         };
 104
 105                         partition@c0000 {
 106                                 label = "cdt";
 107                                 reg = <0xc0000 0x10000>;
 108                                 read-only;
 109                         };
 110
 111                         partition@d0000 {
 112                                 label = "ddrparams";
 113                                 reg = <0xd0000 0x10000>;
 114                                 read-only;
 115                         };
 116
 117                         partition@e0000 {
 118                                 label = "ART";
 119                                 reg = <0xe0000 0x10000>;
 120                                 read-only;
 121
 122                                 nvmem-layout {
 123                                         compatible = "fixed-layout";
 124                                         #address-cells = <1>;
 125                                         #size-cells = <1>;
 126
 127                                         precal_art_1000: precal@1000 {
 128                                                 reg = <0x1000 0x2f20>;
 129                                         };
 130
 131                                         precal_art_5000: precal@5000 {
 132                                                 reg = <0x5000 0x2f20>;
 133                                         };
 134                                 };
 135                         };
 136
 137                         partition@f0000 {
 138                                 label = "appsbl";
 139                                 reg = <0xf0000 0xf0000>;
 140                                 read-only;
 141                         };
 142
 143                         partition@1e0000 {
 144                                 label = "mfginfo";
 145                                 reg = <0x1e0000 0x10000>;
 146                                 read-only;
 147
 148                                 nvmem-layout {
 149                                         compatible = "fixed-layout";
 150                                         #address-cells = <1>;
 151                                         #size-cells = <1>;
 152
 153                                         macaddr_mfginfo_1d: macaddr@1d {
 154                                                 compatible = "mac-base";
 155                                                 reg = <0x1d 0x6>;
 156                                                 #nvmem-cell-cells = <1>;
 157                                         };
 158                                 };
 159                         };
 160
 161                         partition@1f0000 {
 162                                 label = "apcd";
 163                                 reg = <0x1f0000 0x10000>;
 164                                 read-only;
 165                         };
 166
 167                         partition@200000 {
 168                                 label = "osss";
 169                                 reg = <0x200000 0x180000>;
 170                                 read-only;
 171                         };
 172
 173                         partition@380000 {
 174                                 label = "appsblenv";
 175                                 reg = <0x380000 0x10000>;
 176                         };
 177
 178                         partition@390000 {
 179                                 label = "pds";
 180                                 reg = <0x390000 0x10000>;
 181                                 read-only;
 182                         };
 183
 184                         partition@3a0000 {
 185                                 label = "fcache";
 186                                 reg = <0x3a0000 0x10000>;
 187                                 read-only;
 188                         };
 189
 190                         partition@3b0000 {
 191                                 /* Called osss1 in smem */
 192                                 label = "u-boot-env-bak";
 193                                 reg = <0x3b0000 0x10000>;
 194                                 read-only;
 195                         };
 196
 197                         partition@3f0000 {
 198                                 label = "u-boot-env";
 199                                 reg = <0x3f0000 0x10000>;
 200                                 read-only;
 201                         };
 202                 };
 203         };
 204 };