ramips: mt7621: convert to nvmem-layout
[openwrt/staging/stintel.git] / target / linux / ramips / dts / mt7621_tplink_re650-v2.dts
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2
3 #include "mt7621.dtsi"
4
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h>
7
8 / {
9 compatible = "tplink,re650-v2", "mediatek,mt7621-soc";
10 model = "TP-Link RE650 v2";
11
12 aliases {
13 label-mac-device = &gmac0;
14 led-boot = &led_power;
15 led-failsafe = &led_power;
16 led-running = &led_power;
17 led-upgrade = &led_power;
18 };
19
20 keys {
21 compatible = "gpio-keys";
22
23 wps {
24 label = "wps";
25 gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
26 debounce-interval = <60>;
27 linux,code = <KEY_WPS_BUTTON>;
28 };
29
30 power {
31 label = "power";
32 gpios = <&gpio 25 GPIO_ACTIVE_LOW>;
33 debounce-interval = <60>;
34 linux,code = <KEY_POWER>;
35 };
36
37 led {
38 label = "led";
39 gpios = <&gpio 30 GPIO_ACTIVE_LOW>;
40 debounce-interval = <60>;
41 linux,code = <KEY_LIGHTS_TOGGLE>;
42 };
43
44 reset {
45 label = "reset";
46 gpios = <&gpio 31 GPIO_ACTIVE_LOW>;
47 debounce-interval = <60>;
48 linux,code = <KEY_RESTART>;
49 };
50 };
51
52 leds {
53 compatible = "gpio-leds";
54
55 led_power: power {
56 label = "blue:power";
57 gpios = <&gpio 22 GPIO_ACTIVE_LOW>;
58 };
59
60 wifi2g {
61 label = "blue:wifi2g";
62 gpios = <&gpio 23 GPIO_ACTIVE_LOW>;
63 linux,default-trigger = "phy0tpt";
64 };
65
66 wifi5g {
67 label = "blue:wifi5g";
68 gpios = <&gpio 24 GPIO_ACTIVE_LOW>;
69 linux,default-trigger = "phy1tpt";
70 };
71
72 wps_red {
73 label = "red:wps";
74 gpios = <&gpio 26 GPIO_ACTIVE_HIGH>;
75 };
76
77 wps_blue {
78 label = "blue:wps";
79 gpios = <&gpio 27 GPIO_ACTIVE_HIGH>;
80 };
81
82 eth_act {
83 label = "green:eth_act";
84 gpios = <&gpio 28 GPIO_ACTIVE_LOW>;
85 };
86
87 eth_link {
88 label = "green:eth_link";
89 gpios = <&gpio 29 GPIO_ACTIVE_LOW>;
90 };
91 };
92 };
93
94 &spi0 {
95 status = "okay";
96
97 flash@0 {
98 compatible = "jedec,spi-nor";
99 reg = <0>;
100 spi-max-frequency = <40000000>;
101
102 partitions {
103 compatible = "fixed-partitions";
104 #address-cells = <1>;
105 #size-cells = <1>;
106
107 partition@0 {
108 label = "u-boot";
109 reg = <0x0 0x20000>;
110 read-only;
111 };
112
113 partition@20000 {
114 compatible = "tplink,firmware";
115 label = "firmware";
116 reg = <0x20000 0x7a0000>;
117 };
118
119 config: partition@7c0000 {
120 label = "config";
121 reg = <0x7c0000 0x2d440>;
122 read-only;
123
124 nvmem-layout {
125 compatible = "fixed-layout";
126 #address-cells = <1>;
127 #size-cells = <1>;
128
129 macaddr_config_10008: macaddr@10008 {
130 reg = <0x10008 0x6>;
131 };
132 };
133 };
134
135 radio: partition@7f0000 {
136 label = "radio";
137 reg = <0x7f0000 0x10000>;
138 read-only;
139
140 nvmem-layout {
141 compatible = "fixed-layout";
142 #address-cells = <1>;
143 #size-cells = <1>;
144
145 eeprom_radio_0: eeprom@0 {
146 reg = <0x0 0x4da8>;
147 };
148
149 eeprom_radio_8000: eeprom@8000 {
150 reg = <0x8000 0x4da8>;
151 };
152 };
153 };
154 };
155 };
156 };
157
158 &state_default {
159 gpio {
160 groups = "rgmii2", "wdt";
161 function = "gpio";
162 };
163 };
164
165 &pcie {
166 status = "okay";
167 };
168
169 &pcie1 {
170 wifi@0,0 {
171 compatible = "mediatek,mt76";
172 reg = <0x0000 0 0 0 0>;
173 nvmem-cells = <&eeprom_radio_0>, <&macaddr_config_10008>;
174 nvmem-cell-names = "eeprom", "mac-address";
175 mac-address-increment = <1>;
176 ieee80211-freq-limit = <2400000 2500000>;
177 };
178 };
179
180 &pcie0 {
181 wifi@0,0 {
182 compatible = "mediatek,mt76";
183 reg = <0x0000 0 0 0 0>;
184 nvmem-cells = <&eeprom_radio_8000>, <&macaddr_config_10008>;
185 nvmem-cell-names = "eeprom", "mac-address";
186 mac-address-increment = <2>;
187 ieee80211-freq-limit = <5000000 6000000>;
188 };
189 };
190
191 &ethernet {
192 pinctrl-0 = <&mdio_pins>, <&rgmii1_pins>;
193 };
194
195 &gmac0 {
196 nvmem-cells = <&macaddr_config_10008>;
197 nvmem-cell-names = "mac-address";
198 };
199
200 &switch0 {
201 ports {
202 port@0 {
203 status = "okay";
204 label = "lan";
205 };
206 };
207 };