sunxi: backport h616 thermal sensor support
[openwrt/staging/stintel.git] / target / linux / sunxi / patches-6.1 / 016-v6.9-arm64-dts-allwinner-h616-Add-thermal-sensor-and-zones.patch
1 From f4318af40544b8e7ff5a6b667ede60e6cf808262 Mon Sep 17 00:00:00 2001
2 From: Martin Botka <martin.botka@somainline.org>
3 Date: Mon, 19 Feb 2024 15:36:39 +0000
4 Subject: [PATCH] arm64: dts: allwinner: h616: Add thermal sensor and zones
5
6 There are four thermal sensors:
7 - CPU
8 - GPU
9 - VE
10 - DRAM
11
12 Add the thermal sensor configuration and the thermal zones.
13
14 Signed-off-by: Martin Botka <martin.botka@somainline.org>
15 Signed-off-by: Andre Przywara <andre.przywara@arm.com>
16 Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
17 Link: https://lore.kernel.org/r/20240219153639.179814-8-andre.przywara@arm.com
18 Signed-off-by: Jernej Skrabec <jernej.skrabec@gmail.com>
19 ---
20 .../arm64/boot/dts/allwinner/sun50i-h616.dtsi | 88 +++++++++++++++++++
21 1 file changed, 88 insertions(+)
22
23 --- a/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
24 +++ b/arch/arm64/boot/dts/allwinner/sun50i-h616.dtsi
25 @@ -9,6 +9,7 @@
26 #include <dt-bindings/clock/sun6i-rtc.h>
27 #include <dt-bindings/reset/sun50i-h616-ccu.h>
28 #include <dt-bindings/reset/sun50i-h6-r-ccu.h>
29 +#include <dt-bindings/thermal/thermal.h>
30
31 / {
32 interrupt-parent = <&gic>;
33 @@ -138,6 +139,10 @@
34 reg = <0x03006000 0x1000>;
35 #address-cells = <1>;
36 #size-cells = <1>;
37 +
38 + ths_calibration: thermal-sensor-calibration@14 {
39 + reg = <0x14 0x8>;
40 + };
41 };
42
43 watchdog: watchdog@30090a0 {
44 @@ -511,6 +516,19 @@
45 };
46 };
47
48 + ths: thermal-sensor@5070400 {
49 + compatible = "allwinner,sun50i-h616-ths";
50 + reg = <0x05070400 0x400>;
51 + interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
52 + clocks = <&ccu CLK_BUS_THS>;
53 + clock-names = "bus";
54 + resets = <&ccu RST_BUS_THS>;
55 + nvmem-cells = <&ths_calibration>;
56 + nvmem-cell-names = "calibration";
57 + allwinner,sram = <&syscon>;
58 + #thermal-sensor-cells = <1>;
59 + };
60 +
61 usbotg: usb@5100000 {
62 compatible = "allwinner,sun50i-h616-musb",
63 "allwinner,sun8i-h3-musb";
64 @@ -755,4 +773,74 @@
65 #size-cells = <0>;
66 };
67 };
68 +
69 + thermal-zones {
70 + cpu-thermal {
71 + polling-delay-passive = <500>;
72 + polling-delay = <1000>;
73 + thermal-sensors = <&ths 2>;
74 + sustainable-power = <1000>;
75 +
76 + trips {
77 + cpu_threshold: cpu-trip-0 {
78 + temperature = <60000>;
79 + type = "passive";
80 + hysteresis = <0>;
81 + };
82 + cpu_target: cpu-trip-1 {
83 + temperature = <70000>;
84 + type = "passive";
85 + hysteresis = <0>;
86 + };
87 + cpu_critical: cpu-trip-2 {
88 + temperature = <110000>;
89 + type = "critical";
90 + hysteresis = <0>;
91 + };
92 + };
93 + };
94 +
95 + gpu-thermal {
96 + polling-delay-passive = <500>;
97 + polling-delay = <1000>;
98 + thermal-sensors = <&ths 0>;
99 + sustainable-power = <1100>;
100 +
101 + trips {
102 + gpu_temp_critical: gpu-trip-0 {
103 + temperature = <110000>;
104 + type = "critical";
105 + hysteresis = <0>;
106 + };
107 + };
108 + };
109 +
110 + ve-thermal {
111 + polling-delay-passive = <0>;
112 + polling-delay = <0>;
113 + thermal-sensors = <&ths 1>;
114 +
115 + trips {
116 + ve_temp_critical: ve-trip-0 {
117 + temperature = <110000>;
118 + type = "critical";
119 + hysteresis = <0>;
120 + };
121 + };
122 + };
123 +
124 + ddr-thermal {
125 + polling-delay-passive = <0>;
126 + polling-delay = <0>;
127 + thermal-sensors = <&ths 3>;
128 +
129 + trips {
130 + ddr_temp_critical: ddr-trip-0 {
131 + temperature = <110000>;
132 + type = "critical";
133 + hysteresis = <0>;
134 + };
135 + };
136 + };
137 + };
138 };