4e98d6a37506a3a5db89d0326e91fc62d0080c83
[openwrt/staging/wigyori.git] / package / kernel / mac80211 / patches / rt2x00 / 005-v6.1-rt2x00-add-RF-self-TXDC-calibration-for-MT7620.patch
1 From patchwork Sat Sep 17 20:27:26 2022
2 Content-Type: text/plain; charset="utf-8"
3 MIME-Version: 1.0
4 Content-Transfer-Encoding: 8bit
5 X-Patchwork-Submitter: Daniel Golle <daniel@makrotopia.org>
6 X-Patchwork-Id: 12979246
7 X-Patchwork-Delegate: kvalo@adurom.com
8 Return-Path: <linux-wireless-owner@kernel.org>
9 Date: Sat, 17 Sep 2022 21:27:26 +0100
10 From: Daniel Golle <daniel@makrotopia.org>
11 To: linux-wireless@vger.kernel.org, Stanislaw Gruszka <stf_xl@wp.pl>,
12 Helmut Schaa <helmut.schaa@googlemail.com>
13 Cc: Kalle Valo <kvalo@kernel.org>,
14 "David S. Miller" <davem@davemloft.net>,
15 Eric Dumazet <edumazet@google.com>,
16 Jakub Kicinski <kuba@kernel.org>,
17 Paolo Abeni <pabeni@redhat.com>,
18 Johannes Berg <johannes.berg@intel.com>
19 Subject: [PATCH v3 05/16] rt2x00: add RF self TXDC calibration for MT7620
20 Message-ID:
21 <dbb6e5a0c12d6101477bd09e83253091d21512c9.1663445157.git.daniel@makrotopia.org>
22 References: <cover.1663445157.git.daniel@makrotopia.org>
23 MIME-Version: 1.0
24 Content-Disposition: inline
25 In-Reply-To: <cover.1663445157.git.daniel@makrotopia.org>
26 Precedence: bulk
27 List-ID: <linux-wireless.vger.kernel.org>
28 X-Mailing-List: linux-wireless@vger.kernel.org
29
30 From: Tomislav Požega <pozega.tomislav@gmail.com>
31
32 Add TX self calibration based on mtk driver.
33
34 Signed-off-by: Tomislav Požega <pozega.tomislav@gmail.com>
35 Signed-off-by: Daniel Golle <daniel@makrotopia.org>
36 Acked-by: Stanislaw Gruszka <stf_xl@wp.pl>
37 ---
38 v2: use ++i instead of i = i + 1 in loops
39
40 .../net/wireless/ralink/rt2x00/rt2800lib.c | 48 +++++++++++++++++++
41 1 file changed, 48 insertions(+)
42
43 --- a/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
44 +++ b/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
45 @@ -8428,6 +8428,53 @@ static void rt2800_init_rfcsr_5592(struc
46 rt2800_led_open_drain_enable(rt2x00dev);
47 }
48
49 +static void rt2800_rf_self_txdc_cal(struct rt2x00_dev *rt2x00dev)
50 +{
51 + u8 rfb5r1_org, rfb7r1_org, rfvalue;
52 + u32 mac0518, mac051c, mac0528, mac052c;
53 + u8 i;
54 +
55 + mac0518 = rt2800_register_read(rt2x00dev, RF_CONTROL0);
56 + mac051c = rt2800_register_read(rt2x00dev, RF_BYPASS0);
57 + mac0528 = rt2800_register_read(rt2x00dev, RF_CONTROL2);
58 + mac052c = rt2800_register_read(rt2x00dev, RF_BYPASS2);
59 +
60 + rt2800_register_write(rt2x00dev, RF_BYPASS0, 0x0);
61 + rt2800_register_write(rt2x00dev, RF_BYPASS2, 0x0);
62 +
63 + rt2800_register_write(rt2x00dev, RF_CONTROL0, 0xC);
64 + rt2800_register_write(rt2x00dev, RF_BYPASS0, 0x3306);
65 + rt2800_register_write(rt2x00dev, RF_CONTROL2, 0x3330);
66 + rt2800_register_write(rt2x00dev, RF_BYPASS2, 0xfffff);
67 + rfb5r1_org = rt2800_rfcsr_read_bank(rt2x00dev, 5, 1);
68 + rfb7r1_org = rt2800_rfcsr_read_bank(rt2x00dev, 7, 1);
69 +
70 + rt2800_rfcsr_write_bank(rt2x00dev, 5, 1, 0x4);
71 + for (i = 0; i < 100; ++i) {
72 + usleep_range(50, 100);
73 + rfvalue = rt2800_rfcsr_read_bank(rt2x00dev, 5, 1);
74 + if ((rfvalue & 0x04) != 0x4)
75 + break;
76 + }
77 + rt2800_rfcsr_write_bank(rt2x00dev, 5, 1, rfb5r1_org);
78 +
79 + rt2800_rfcsr_write_bank(rt2x00dev, 7, 1, 0x4);
80 + for (i = 0; i < 100; ++i) {
81 + usleep_range(50, 100);
82 + rfvalue = rt2800_rfcsr_read_bank(rt2x00dev, 7, 1);
83 + if ((rfvalue & 0x04) != 0x4)
84 + break;
85 + }
86 + rt2800_rfcsr_write_bank(rt2x00dev, 7, 1, rfb7r1_org);
87 +
88 + rt2800_register_write(rt2x00dev, RF_BYPASS0, 0x0);
89 + rt2800_register_write(rt2x00dev, RF_BYPASS2, 0x0);
90 + rt2800_register_write(rt2x00dev, RF_CONTROL0, mac0518);
91 + rt2800_register_write(rt2x00dev, RF_BYPASS0, mac051c);
92 + rt2800_register_write(rt2x00dev, RF_CONTROL2, mac0528);
93 + rt2800_register_write(rt2x00dev, RF_BYPASS2, mac052c);
94 +}
95 +
96 static void rt2800_bbp_core_soft_reset(struct rt2x00_dev *rt2x00dev,
97 bool set_bw, bool is_ht40)
98 {
99 @@ -9035,6 +9082,7 @@ static void rt2800_init_rfcsr_6352(struc
100 rt2800_rfcsr_write_dccal(rt2x00dev, 5, 0x00);
101 rt2800_rfcsr_write_dccal(rt2x00dev, 17, 0x7C);
102
103 + rt2800_rf_self_txdc_cal(rt2x00dev);
104 rt2800_bw_filter_calibration(rt2x00dev, true);
105 rt2800_bw_filter_calibration(rt2x00dev, false);
106 }