package/kernel/mac80211/patches/rt2x00/650-rt2x00-add-support-for-external-PA-on-MT7620.patch

   1 From 8dcdb02e3ad5f3d384c071e0a36670bb342bab35 Mon Sep 17 00:00:00 2001
   2 From: Daniel Golle <daniel@makrotopia.org>
   3 Date: Wed, 19 Apr 2017 16:14:53 +0200
   4 Subject: [PATCH 03/16] rt2x00: add support for external PA on MT7620
   5 MIME-Version: 1.0
   6 Content-Type: text/plain; charset=UTF-8
   7 Content-Transfer-Encoding: 8bit
   8 To: linux-wireless@vger.kernel.org,
   9     Stanislaw Gruszka <stf_xl@wp.pl>,
  10     Helmut Schaa <helmut.schaa@googlemail.com>
  11 Cc: Kalle Valo <kvalo@kernel.org>,
  12     David S. Miller <davem@davemloft.net>,
  13     Eric Dumazet <edumazet@google.com>,
  14     Jakub Kicinski <kuba@kernel.org>,
  15     Paolo Abeni <pabeni@redhat.com>,
  16     Johannes Berg <johannes.berg@intel.com>
  17
  18 Implement support for external PA connected to MT7620A.
  19
  20 Signed-off-by: Tomislav Požega <pozega.tomislav@gmail.com>
  21 [pozega.tomislav@gmail.com: use chanreg and dccal helpers.]
  22 Signed-off-by: Daniel Golle <daniel@makrotopia.org>
  23 ---
  24  drivers/net/wireless/ralink/rt2x00/rt2800.h   |  1 +
  25  .../net/wireless/ralink/rt2x00/rt2800lib.c    | 52 ++++++++++++++++++-
  26  2 files changed, 52 insertions(+), 1 deletion(-)
  27
  28 --- a/drivers/net/wireless/ralink/rt2x00/rt2800.h
  29 +++ b/drivers/net/wireless/ralink/rt2x00/rt2800.h
  30 @@ -2739,6 +2739,7 @@ enum rt2800_eeprom_word {
  31  #define EEPROM_NIC_CONF2_RX_STREAM     FIELD16(0x000f)
  32  #define EEPROM_NIC_CONF2_TX_STREAM     FIELD16(0x00f0)
  33  #define EEPROM_NIC_CONF2_CRYSTAL       FIELD16(0x0600)
  34 +#define EEPROM_NIC_CONF2_EXTERNAL_PA   FIELD16(0x8000)
  35
  36  /*
  37   * EEPROM LNA
  38 --- a/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
  39 +++ b/drivers/net/wireless/ralink/rt2x00/rt2800lib.c
  40 @@ -4369,6 +4369,43 @@ static void rt2800_config_channel(struct
  41                 rt2800_iq_calibrate(rt2x00dev, rf->channel);
  42         }
  43
  44 +       if (rt2x00_rt(rt2x00dev, RT6352)) {
  45 +               if (test_bit(CAPABILITY_EXTERNAL_PA_TX0,
  46 +                            &rt2x00dev->cap_flags)) {
  47 +                       reg = rt2800_register_read(rt2x00dev, RF_CONTROL3);
  48 +                       reg |= 0x00000101;
  49 +                       rt2800_register_write(rt2x00dev, RF_CONTROL3, reg);
  50 +
  51 +                       reg = rt2800_register_read(rt2x00dev, RF_BYPASS3);
  52 +                       reg |= 0x00000101;
  53 +                       rt2800_register_write(rt2x00dev, RF_BYPASS3, reg);
  54 +
  55 +                       rt2800_rfcsr_write_chanreg(rt2x00dev, 43, 0x73);
  56 +                       rt2800_rfcsr_write_chanreg(rt2x00dev, 44, 0x73);
  57 +                       rt2800_rfcsr_write_chanreg(rt2x00dev, 45, 0x73);
  58 +                       rt2800_rfcsr_write_chanreg(rt2x00dev, 46, 0x27);
  59 +                       rt2800_rfcsr_write_chanreg(rt2x00dev, 47, 0xC8);
  60 +                       rt2800_rfcsr_write_chanreg(rt2x00dev, 48, 0xA4);
  61 +                       rt2800_rfcsr_write_chanreg(rt2x00dev, 49, 0x05);
  62 +                       rt2800_rfcsr_write_chanreg(rt2x00dev, 54, 0x27);
  63 +                       rt2800_rfcsr_write_chanreg(rt2x00dev, 55, 0xC8);
  64 +                       rt2800_rfcsr_write_chanreg(rt2x00dev, 56, 0xA4);
  65 +                       rt2800_rfcsr_write_chanreg(rt2x00dev, 57, 0x05);
  66 +                       rt2800_rfcsr_write_chanreg(rt2x00dev, 58, 0x27);
  67 +                       rt2800_rfcsr_write_chanreg(rt2x00dev, 59, 0xC8);
  68 +                       rt2800_rfcsr_write_chanreg(rt2x00dev, 60, 0xA4);
  69 +                       rt2800_rfcsr_write_chanreg(rt2x00dev, 61, 0x05);
  70 +                       rt2800_rfcsr_write_dccal(rt2x00dev, 05, 0x00);
  71 +
  72 +                       rt2800_register_write(rt2x00dev, TX0_RF_GAIN_CORRECT,
  73 +                                             0x36303636);
  74 +                       rt2800_register_write(rt2x00dev, TX0_RF_GAIN_ATTEN,
  75 +                                             0x6C6C6B6C);
  76 +                       rt2800_register_write(rt2x00dev, TX1_RF_GAIN_ATTEN,
  77 +                                             0x6C6C6B6C);
  78 +               }
  79 +       }
  80 +
  81         bbp = rt2800_bbp_read(rt2x00dev, 4);
  82         rt2x00_set_field8(&bbp, BBP4_BANDWIDTH, 2 * conf_is_ht40(conf));
  83         rt2800_bbp_write(rt2x00dev, 4, bbp);
  84 @@ -9578,7 +9615,8 @@ static int rt2800_init_eeprom(struct rt2
  85          */
  86         eeprom = rt2800_eeprom_read(rt2x00dev, EEPROM_NIC_CONF1);
  87
  88 -       if (rt2x00_rt(rt2x00dev, RT3352)) {
  89 +       if (rt2x00_rt(rt2x00dev, RT3352) ||
  90 +           rt2x00_rt(rt2x00dev, RT6352)) {
  91                 if (rt2x00_get_field16(eeprom,
  92                     EEPROM_NIC_CONF1_EXTERNAL_TX0_PA_3352))
  93                     __set_bit(CAPABILITY_EXTERNAL_PA_TX0,
  94 @@ -9589,6 +9627,18 @@ static int rt2800_init_eeprom(struct rt2
  95                               &rt2x00dev->cap_flags);
  96         }
  97
  98 +       eeprom = rt2800_eeprom_read(rt2x00dev, EEPROM_NIC_CONF2);
  99 +
 100 +       if (rt2x00_rt(rt2x00dev, RT6352) && eeprom != 0 && eeprom != 0xffff) {
 101 +               if (!rt2x00_get_field16(eeprom,
 102 +                                       EEPROM_NIC_CONF2_EXTERNAL_PA)) {
 103 +                       __clear_bit(CAPABILITY_EXTERNAL_PA_TX0,
 104 +                                   &rt2x00dev->cap_flags);
 105 +                       __clear_bit(CAPABILITY_EXTERNAL_PA_TX1,
 106 +                                   &rt2x00dev->cap_flags);
 107 +               }
 108 +       }
 109 +
 110         return 0;
 111  }
 112