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40dae54f8c71b0bebba7f7582a83bfaf0697520b
[openwrt/staging/wigyori.git] / target / linux / generic / backport-5.10 / 794-v5.13-r8152-support-PHY-firmware-for-RTL8156-series.patch
1 From ca09589a72a0aa17389754fb75a5cd1a5d46818f Mon Sep 17 00:00:00 2001
2 From: Hayes Wang <hayeswang@realtek.com>
3 Date: Fri, 16 Apr 2021 16:04:36 +0800
4 Subject: [PATCH] r8152: support PHY firmware for RTL8156 series
5
6 commit 4a51b0e8a0143b0e83d51d9c58c6416c3818a9f2 upstream.
7
8 Support new firmware type and method for RTL8156 series.
9
10 Signed-off-by: Hayes Wang <hayeswang@realtek.com>
11 Signed-off-by: David S. Miller <davem@davemloft.net>
12 ---
13 drivers/net/usb/r8152.c | 563 +++++++++++++++++++++++++++++++++++++++-
14 1 file changed, 561 insertions(+), 2 deletions(-)
15
16 --- a/drivers/net/usb/r8152.c
17 +++ b/drivers/net/usb/r8152.c
18 @@ -974,8 +974,60 @@ enum rtl8152_fw_flags {
19 FW_FLAGS_START,
20 FW_FLAGS_STOP,
21 FW_FLAGS_NC,
22 + FW_FLAGS_NC1,
23 + FW_FLAGS_NC2,
24 + FW_FLAGS_UC2,
25 + FW_FLAGS_UC,
26 + FW_FLAGS_SPEED_UP,
27 + FW_FLAGS_VER,
28 };
29
30 +enum rtl8152_fw_fixup_cmd {
31 + FW_FIXUP_AND = 0,
32 + FW_FIXUP_OR,
33 + FW_FIXUP_NOT,
34 + FW_FIXUP_XOR,
35 +};
36 +
37 +struct fw_phy_set {
38 + __le16 addr;
39 + __le16 data;
40 +} __packed;
41 +
42 +struct fw_phy_speed_up {
43 + struct fw_block blk_hdr;
44 + __le16 fw_offset;
45 + __le16 version;
46 + __le16 fw_reg;
47 + __le16 reserved;
48 + char info[];
49 +} __packed;
50 +
51 +struct fw_phy_ver {
52 + struct fw_block blk_hdr;
53 + struct fw_phy_set ver;
54 + __le32 reserved;
55 +} __packed;
56 +
57 +struct fw_phy_fixup {
58 + struct fw_block blk_hdr;
59 + struct fw_phy_set setting;
60 + __le16 bit_cmd;
61 + __le16 reserved;
62 +} __packed;
63 +
64 +struct fw_phy_union {
65 + struct fw_block blk_hdr;
66 + __le16 fw_offset;
67 + __le16 fw_reg;
68 + struct fw_phy_set pre_set[2];
69 + struct fw_phy_set bp[8];
70 + struct fw_phy_set bp_en;
71 + u8 pre_num;
72 + u8 bp_num;
73 + char info[];
74 +} __packed;
75 +
76 /**
77 * struct fw_mac - a firmware block used by RTL_FW_PLA and RTL_FW_USB.
78 * The layout of the firmware block is:
79 @@ -1080,6 +1132,15 @@ enum rtl_fw_type {
80 RTL_FW_PHY_START,
81 RTL_FW_PHY_STOP,
82 RTL_FW_PHY_NC,
83 + RTL_FW_PHY_FIXUP,
84 + RTL_FW_PHY_UNION_NC,
85 + RTL_FW_PHY_UNION_NC1,
86 + RTL_FW_PHY_UNION_NC2,
87 + RTL_FW_PHY_UNION_UC2,
88 + RTL_FW_PHY_UNION_UC,
89 + RTL_FW_PHY_UNION_MISC,
90 + RTL_FW_PHY_SPEED_UP,
91 + RTL_FW_PHY_VER,
92 };
93
94 enum rtl_version {
95 @@ -4001,6 +4062,162 @@ static int rtl_post_ram_code(struct r815
96 return 0;
97 }
98
99 +static bool rtl8152_is_fw_phy_speed_up_ok(struct r8152 *tp, struct fw_phy_speed_up *phy)
100 +{
101 + u16 fw_offset;
102 + u32 length;
103 + bool rc = false;
104 +
105 + switch (tp->version) {
106 + case RTL_VER_01:
107 + case RTL_VER_02:
108 + case RTL_VER_03:
109 + case RTL_VER_04:
110 + case RTL_VER_05:
111 + case RTL_VER_06:
112 + case RTL_VER_07:
113 + case RTL_VER_08:
114 + case RTL_VER_09:
115 + case RTL_VER_10:
116 + case RTL_VER_11:
117 + case RTL_VER_12:
118 + case RTL_VER_14:
119 + goto out;
120 + case RTL_VER_13:
121 + case RTL_VER_15:
122 + default:
123 + break;
124 + }
125 +
126 + fw_offset = __le16_to_cpu(phy->fw_offset);
127 + length = __le32_to_cpu(phy->blk_hdr.length);
128 + if (fw_offset < sizeof(*phy) || length <= fw_offset) {
129 + dev_err(&tp->intf->dev, "invalid fw_offset\n");
130 + goto out;
131 + }
132 +
133 + length -= fw_offset;
134 + if (length & 3) {
135 + dev_err(&tp->intf->dev, "invalid block length\n");
136 + goto out;
137 + }
138 +
139 + if (__le16_to_cpu(phy->fw_reg) != 0x9A00) {
140 + dev_err(&tp->intf->dev, "invalid register to load firmware\n");
141 + goto out;
142 + }
143 +
144 + rc = true;
145 +out:
146 + return rc;
147 +}
148 +
149 +static bool rtl8152_is_fw_phy_ver_ok(struct r8152 *tp, struct fw_phy_ver *ver)
150 +{
151 + bool rc = false;
152 +
153 + switch (tp->version) {
154 + case RTL_VER_10:
155 + case RTL_VER_11:
156 + case RTL_VER_12:
157 + case RTL_VER_13:
158 + case RTL_VER_15:
159 + break;
160 + default:
161 + goto out;
162 + }
163 +
164 + if (__le32_to_cpu(ver->blk_hdr.length) != sizeof(*ver)) {
165 + dev_err(&tp->intf->dev, "invalid block length\n");
166 + goto out;
167 + }
168 +
169 + if (__le16_to_cpu(ver->ver.addr) != SRAM_GPHY_FW_VER) {
170 + dev_err(&tp->intf->dev, "invalid phy ver addr\n");
171 + goto out;
172 + }
173 +
174 + rc = true;
175 +out:
176 + return rc;
177 +}
178 +
179 +static bool rtl8152_is_fw_phy_fixup_ok(struct r8152 *tp, struct fw_phy_fixup *fix)
180 +{
181 + bool rc = false;
182 +
183 + switch (tp->version) {
184 + case RTL_VER_10:
185 + case RTL_VER_11:
186 + case RTL_VER_12:
187 + case RTL_VER_13:
188 + case RTL_VER_15:
189 + break;
190 + default:
191 + goto out;
192 + }
193 +
194 + if (__le32_to_cpu(fix->blk_hdr.length) != sizeof(*fix)) {
195 + dev_err(&tp->intf->dev, "invalid block length\n");
196 + goto out;
197 + }
198 +
199 + if (__le16_to_cpu(fix->setting.addr) != OCP_PHY_PATCH_CMD ||
200 + __le16_to_cpu(fix->setting.data) != BIT(7)) {
201 + dev_err(&tp->intf->dev, "invalid phy fixup\n");
202 + goto out;
203 + }
204 +
205 + rc = true;
206 +out:
207 + return rc;
208 +}
209 +
210 +static bool rtl8152_is_fw_phy_union_ok(struct r8152 *tp, struct fw_phy_union *phy)
211 +{
212 + u16 fw_offset;
213 + u32 length;
214 + bool rc = false;
215 +
216 + switch (tp->version) {
217 + case RTL_VER_10:
218 + case RTL_VER_11:
219 + case RTL_VER_12:
220 + case RTL_VER_13:
221 + case RTL_VER_15:
222 + break;
223 + default:
224 + goto out;
225 + }
226 +
227 + fw_offset = __le16_to_cpu(phy->fw_offset);
228 + length = __le32_to_cpu(phy->blk_hdr.length);
229 + if (fw_offset < sizeof(*phy) || length <= fw_offset) {
230 + dev_err(&tp->intf->dev, "invalid fw_offset\n");
231 + goto out;
232 + }
233 +
234 + length -= fw_offset;
235 + if (length & 1) {
236 + dev_err(&tp->intf->dev, "invalid block length\n");
237 + goto out;
238 + }
239 +
240 + if (phy->pre_num > 2) {
241 + dev_err(&tp->intf->dev, "invalid pre_num %d\n", phy->pre_num);
242 + goto out;
243 + }
244 +
245 + if (phy->bp_num > 8) {
246 + dev_err(&tp->intf->dev, "invalid bp_num %d\n", phy->bp_num);
247 + goto out;
248 + }
249 +
250 + rc = true;
251 +out:
252 + return rc;
253 +}
254 +
255 static bool rtl8152_is_fw_phy_nc_ok(struct r8152 *tp, struct fw_phy_nc *phy)
256 {
257 u32 length;
258 @@ -4321,6 +4538,10 @@ static long rtl8152_check_firmware(struc
259 case RTL_FW_PHY_START:
260 if (test_bit(FW_FLAGS_START, &fw_flags) ||
261 test_bit(FW_FLAGS_NC, &fw_flags) ||
262 + test_bit(FW_FLAGS_NC1, &fw_flags) ||
263 + test_bit(FW_FLAGS_NC2, &fw_flags) ||
264 + test_bit(FW_FLAGS_UC2, &fw_flags) ||
265 + test_bit(FW_FLAGS_UC, &fw_flags) ||
266 test_bit(FW_FLAGS_STOP, &fw_flags)) {
267 dev_err(&tp->intf->dev,
268 "check PHY_START fail\n");
269 @@ -4369,7 +4590,153 @@ static long rtl8152_check_firmware(struc
270 goto fail;
271 }
272 __set_bit(FW_FLAGS_NC, &fw_flags);
273 + break;
274 + case RTL_FW_PHY_UNION_NC:
275 + if (!test_bit(FW_FLAGS_START, &fw_flags) ||
276 + test_bit(FW_FLAGS_NC1, &fw_flags) ||
277 + test_bit(FW_FLAGS_NC2, &fw_flags) ||
278 + test_bit(FW_FLAGS_UC2, &fw_flags) ||
279 + test_bit(FW_FLAGS_UC, &fw_flags) ||
280 + test_bit(FW_FLAGS_STOP, &fw_flags)) {
281 + dev_err(&tp->intf->dev, "PHY_UNION_NC out of order\n");
282 + goto fail;
283 + }
284 +
285 + if (test_bit(FW_FLAGS_NC, &fw_flags)) {
286 + dev_err(&tp->intf->dev, "multiple PHY_UNION_NC encountered\n");
287 + goto fail;
288 + }
289
290 + if (!rtl8152_is_fw_phy_union_ok(tp, (struct fw_phy_union *)block)) {
291 + dev_err(&tp->intf->dev, "check PHY_UNION_NC failed\n");
292 + goto fail;
293 + }
294 + __set_bit(FW_FLAGS_NC, &fw_flags);
295 + break;
296 + case RTL_FW_PHY_UNION_NC1:
297 + if (!test_bit(FW_FLAGS_START, &fw_flags) ||
298 + test_bit(FW_FLAGS_NC2, &fw_flags) ||
299 + test_bit(FW_FLAGS_UC2, &fw_flags) ||
300 + test_bit(FW_FLAGS_UC, &fw_flags) ||
301 + test_bit(FW_FLAGS_STOP, &fw_flags)) {
302 + dev_err(&tp->intf->dev, "PHY_UNION_NC1 out of order\n");
303 + goto fail;
304 + }
305 +
306 + if (test_bit(FW_FLAGS_NC1, &fw_flags)) {
307 + dev_err(&tp->intf->dev, "multiple PHY NC1 encountered\n");
308 + goto fail;
309 + }
310 +
311 + if (!rtl8152_is_fw_phy_union_ok(tp, (struct fw_phy_union *)block)) {
312 + dev_err(&tp->intf->dev, "check PHY_UNION_NC1 failed\n");
313 + goto fail;
314 + }
315 + __set_bit(FW_FLAGS_NC1, &fw_flags);
316 + break;
317 + case RTL_FW_PHY_UNION_NC2:
318 + if (!test_bit(FW_FLAGS_START, &fw_flags) ||
319 + test_bit(FW_FLAGS_UC2, &fw_flags) ||
320 + test_bit(FW_FLAGS_UC, &fw_flags) ||
321 + test_bit(FW_FLAGS_STOP, &fw_flags)) {
322 + dev_err(&tp->intf->dev, "PHY_UNION_NC2 out of order\n");
323 + goto fail;
324 + }
325 +
326 + if (test_bit(FW_FLAGS_NC2, &fw_flags)) {
327 + dev_err(&tp->intf->dev, "multiple PHY NC2 encountered\n");
328 + goto fail;
329 + }
330 +
331 + if (!rtl8152_is_fw_phy_union_ok(tp, (struct fw_phy_union *)block)) {
332 + dev_err(&tp->intf->dev, "check PHY_UNION_NC2 failed\n");
333 + goto fail;
334 + }
335 + __set_bit(FW_FLAGS_NC2, &fw_flags);
336 + break;
337 + case RTL_FW_PHY_UNION_UC2:
338 + if (!test_bit(FW_FLAGS_START, &fw_flags) ||
339 + test_bit(FW_FLAGS_UC, &fw_flags) ||
340 + test_bit(FW_FLAGS_STOP, &fw_flags)) {
341 + dev_err(&tp->intf->dev, "PHY_UNION_UC2 out of order\n");
342 + goto fail;
343 + }
344 +
345 + if (test_bit(FW_FLAGS_UC2, &fw_flags)) {
346 + dev_err(&tp->intf->dev, "multiple PHY UC2 encountered\n");
347 + goto fail;
348 + }
349 +
350 + if (!rtl8152_is_fw_phy_union_ok(tp, (struct fw_phy_union *)block)) {
351 + dev_err(&tp->intf->dev, "check PHY_UNION_UC2 failed\n");
352 + goto fail;
353 + }
354 + __set_bit(FW_FLAGS_UC2, &fw_flags);
355 + break;
356 + case RTL_FW_PHY_UNION_UC:
357 + if (!test_bit(FW_FLAGS_START, &fw_flags) ||
358 + test_bit(FW_FLAGS_STOP, &fw_flags)) {
359 + dev_err(&tp->intf->dev, "PHY_UNION_UC out of order\n");
360 + goto fail;
361 + }
362 +
363 + if (test_bit(FW_FLAGS_UC, &fw_flags)) {
364 + dev_err(&tp->intf->dev, "multiple PHY UC encountered\n");
365 + goto fail;
366 + }
367 +
368 + if (!rtl8152_is_fw_phy_union_ok(tp, (struct fw_phy_union *)block)) {
369 + dev_err(&tp->intf->dev, "check PHY_UNION_UC failed\n");
370 + goto fail;
371 + }
372 + __set_bit(FW_FLAGS_UC, &fw_flags);
373 + break;
374 + case RTL_FW_PHY_UNION_MISC:
375 + if (!rtl8152_is_fw_phy_union_ok(tp, (struct fw_phy_union *)block)) {
376 + dev_err(&tp->intf->dev, "check RTL_FW_PHY_UNION_MISC failed\n");
377 + goto fail;
378 + }
379 + break;
380 + case RTL_FW_PHY_FIXUP:
381 + if (!rtl8152_is_fw_phy_fixup_ok(tp, (struct fw_phy_fixup *)block)) {
382 + dev_err(&tp->intf->dev, "check PHY fixup failed\n");
383 + goto fail;
384 + }
385 + break;
386 + case RTL_FW_PHY_SPEED_UP:
387 + if (test_bit(FW_FLAGS_SPEED_UP, &fw_flags)) {
388 + dev_err(&tp->intf->dev, "multiple PHY firmware encountered");
389 + goto fail;
390 + }
391 +
392 + if (!rtl8152_is_fw_phy_speed_up_ok(tp, (struct fw_phy_speed_up *)block)) {
393 + dev_err(&tp->intf->dev, "check PHY speed up failed\n");
394 + goto fail;
395 + }
396 + __set_bit(FW_FLAGS_SPEED_UP, &fw_flags);
397 + break;
398 + case RTL_FW_PHY_VER:
399 + if (test_bit(FW_FLAGS_START, &fw_flags) ||
400 + test_bit(FW_FLAGS_NC, &fw_flags) ||
401 + test_bit(FW_FLAGS_NC1, &fw_flags) ||
402 + test_bit(FW_FLAGS_NC2, &fw_flags) ||
403 + test_bit(FW_FLAGS_UC2, &fw_flags) ||
404 + test_bit(FW_FLAGS_UC, &fw_flags) ||
405 + test_bit(FW_FLAGS_STOP, &fw_flags)) {
406 + dev_err(&tp->intf->dev, "Invalid order to set PHY version\n");
407 + goto fail;
408 + }
409 +
410 + if (test_bit(FW_FLAGS_VER, &fw_flags)) {
411 + dev_err(&tp->intf->dev, "multiple PHY version encountered");
412 + goto fail;
413 + }
414 +
415 + if (!rtl8152_is_fw_phy_ver_ok(tp, (struct fw_phy_ver *)block)) {
416 + dev_err(&tp->intf->dev, "check PHY version failed\n");
417 + goto fail;
418 + }
419 + __set_bit(FW_FLAGS_VER, &fw_flags);
420 break;
421 default:
422 dev_warn(&tp->intf->dev, "Unknown type %u is found\n",
423 @@ -4392,6 +4759,143 @@ fail:
424 return ret;
425 }
426
427 +static void rtl_ram_code_speed_up(struct r8152 *tp, struct fw_phy_speed_up *phy, bool wait)
428 +{
429 + u32 len;
430 + u8 *data;
431 +
432 + if (sram_read(tp, SRAM_GPHY_FW_VER) >= __le16_to_cpu(phy->version)) {
433 + dev_dbg(&tp->intf->dev, "PHY firmware has been the newest\n");
434 + return;
435 + }
436 +
437 + len = __le32_to_cpu(phy->blk_hdr.length);
438 + len -= __le16_to_cpu(phy->fw_offset);
439 + data = (u8 *)phy + __le16_to_cpu(phy->fw_offset);
440 +
441 + if (rtl_phy_patch_request(tp, true, wait))
442 + return;
443 +
444 + while (len) {
445 + u32 ocp_data, size;
446 + int i;
447 +
448 + if (len < 2048)
449 + size = len;
450 + else
451 + size = 2048;
452 +
453 + ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_GPHY_CTRL);
454 + ocp_data |= GPHY_PATCH_DONE | BACKUP_RESTRORE;
455 + ocp_write_word(tp, MCU_TYPE_USB, USB_GPHY_CTRL, ocp_data);
456 +
457 + generic_ocp_write(tp, __le16_to_cpu(phy->fw_reg), 0xff, size, data, MCU_TYPE_USB);
458 +
459 + data += size;
460 + len -= size;
461 +
462 + ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_POL_GPIO_CTRL);
463 + ocp_data |= POL_GPHY_PATCH;
464 + ocp_write_word(tp, MCU_TYPE_PLA, PLA_POL_GPIO_CTRL, ocp_data);
465 +
466 + for (i = 0; i < 1000; i++) {
467 + if (!(ocp_read_word(tp, MCU_TYPE_PLA, PLA_POL_GPIO_CTRL) & POL_GPHY_PATCH))
468 + break;
469 + }
470 +
471 + if (i == 1000) {
472 + dev_err(&tp->intf->dev, "ram code speedup mode timeout\n");
473 + return;
474 + }
475 + }
476 +
477 + ocp_write_word(tp, MCU_TYPE_PLA, PLA_OCP_GPHY_BASE, tp->ocp_base);
478 + rtl_phy_patch_request(tp, false, wait);
479 +
480 + if (sram_read(tp, SRAM_GPHY_FW_VER) == __le16_to_cpu(phy->version))
481 + dev_dbg(&tp->intf->dev, "successfully applied %s\n", phy->info);
482 + else
483 + dev_err(&tp->intf->dev, "ram code speedup mode fail\n");
484 +}
485 +
486 +static int rtl8152_fw_phy_ver(struct r8152 *tp, struct fw_phy_ver *phy_ver)
487 +{
488 + u16 ver_addr, ver;
489 +
490 + ver_addr = __le16_to_cpu(phy_ver->ver.addr);
491 + ver = __le16_to_cpu(phy_ver->ver.data);
492 +
493 + if (sram_read(tp, ver_addr) >= ver) {
494 + dev_dbg(&tp->intf->dev, "PHY firmware has been the newest\n");
495 + return 0;
496 + }
497 +
498 + sram_write(tp, ver_addr, ver);
499 +
500 + dev_dbg(&tp->intf->dev, "PHY firmware version %x\n", ver);
501 +
502 + return ver;
503 +}
504 +
505 +static void rtl8152_fw_phy_fixup(struct r8152 *tp, struct fw_phy_fixup *fix)
506 +{
507 + u16 addr, data;
508 +
509 + addr = __le16_to_cpu(fix->setting.addr);
510 + data = ocp_reg_read(tp, addr);
511 +
512 + switch (__le16_to_cpu(fix->bit_cmd)) {
513 + case FW_FIXUP_AND:
514 + data &= __le16_to_cpu(fix->setting.data);
515 + break;
516 + case FW_FIXUP_OR:
517 + data |= __le16_to_cpu(fix->setting.data);
518 + break;
519 + case FW_FIXUP_NOT:
520 + data &= ~__le16_to_cpu(fix->setting.data);
521 + break;
522 + case FW_FIXUP_XOR:
523 + data ^= __le16_to_cpu(fix->setting.data);
524 + break;
525 + default:
526 + return;
527 + }
528 +
529 + ocp_reg_write(tp, addr, data);
530 +
531 + dev_dbg(&tp->intf->dev, "applied ocp %x %x\n", addr, data);
532 +}
533 +
534 +static void rtl8152_fw_phy_union_apply(struct r8152 *tp, struct fw_phy_union *phy)
535 +{
536 + __le16 *data;
537 + u32 length;
538 + int i, num;
539 +
540 + num = phy->pre_num;
541 + for (i = 0; i < num; i++)
542 + sram_write(tp, __le16_to_cpu(phy->pre_set[i].addr),
543 + __le16_to_cpu(phy->pre_set[i].data));
544 +
545 + length = __le32_to_cpu(phy->blk_hdr.length);
546 + length -= __le16_to_cpu(phy->fw_offset);
547 + num = length / 2;
548 + data = (__le16 *)((u8 *)phy + __le16_to_cpu(phy->fw_offset));
549 +
550 + ocp_reg_write(tp, OCP_SRAM_ADDR, __le16_to_cpu(phy->fw_reg));
551 + for (i = 0; i < num; i++)
552 + ocp_reg_write(tp, OCP_SRAM_DATA, __le16_to_cpu(data[i]));
553 +
554 + num = phy->bp_num;
555 + for (i = 0; i < num; i++)
556 + sram_write(tp, __le16_to_cpu(phy->bp[i].addr), __le16_to_cpu(phy->bp[i].data));
557 +
558 + if (phy->bp_num && phy->bp_en.addr)
559 + sram_write(tp, __le16_to_cpu(phy->bp_en.addr), __le16_to_cpu(phy->bp_en.data));
560 +
561 + dev_dbg(&tp->intf->dev, "successfully applied %s\n", phy->info);
562 +}
563 +
564 static void rtl8152_fw_phy_nc_apply(struct r8152 *tp, struct fw_phy_nc *phy)
565 {
566 u16 mode_reg, bp_index;
567 @@ -4445,6 +4949,12 @@ static void rtl8152_fw_mac_apply(struct
568 return;
569 }
570
571 + fw_ver_reg = __le16_to_cpu(mac->fw_ver_reg);
572 + if (fw_ver_reg && ocp_read_byte(tp, MCU_TYPE_USB, fw_ver_reg) >= mac->fw_ver_data) {
573 + dev_dbg(&tp->intf->dev, "%s firmware has been the newest\n", type ? "PLA" : "USB");
574 + return;
575 + }
576 +
577 rtl_clear_bp(tp, type);
578
579 /* Enable backup/restore of MACDBG. This is required after clearing PLA
580 @@ -4480,7 +4990,6 @@ static void rtl8152_fw_mac_apply(struct
581 ocp_write_word(tp, type, bp_en_addr,
582 __le16_to_cpu(mac->bp_en_value));
583
584 - fw_ver_reg = __le16_to_cpu(mac->fw_ver_reg);
585 if (fw_ver_reg)
586 ocp_write_byte(tp, MCU_TYPE_USB, fw_ver_reg,
587 mac->fw_ver_data);
588 @@ -4495,7 +5004,7 @@ static void rtl8152_apply_firmware(struc
589 struct fw_header *fw_hdr;
590 struct fw_phy_patch_key *key;
591 u16 key_addr = 0;
592 - int i;
593 + int i, patch_phy = 1;
594
595 if (IS_ERR_OR_NULL(rtl_fw->fw))
596 return;
597 @@ -4517,17 +5026,40 @@ static void rtl8152_apply_firmware(struc
598 rtl8152_fw_mac_apply(tp, (struct fw_mac *)block);
599 break;
600 case RTL_FW_PHY_START:
601 + if (!patch_phy)
602 + break;
603 key = (struct fw_phy_patch_key *)block;
604 key_addr = __le16_to_cpu(key->key_reg);
605 rtl_pre_ram_code(tp, key_addr, __le16_to_cpu(key->key_data), !power_cut);
606 break;
607 case RTL_FW_PHY_STOP:
608 + if (!patch_phy)
609 + break;
610 WARN_ON(!key_addr);
611 rtl_post_ram_code(tp, key_addr, !power_cut);
612 break;
613 case RTL_FW_PHY_NC:
614 rtl8152_fw_phy_nc_apply(tp, (struct fw_phy_nc *)block);
615 break;
616 + case RTL_FW_PHY_VER:
617 + patch_phy = rtl8152_fw_phy_ver(tp, (struct fw_phy_ver *)block);
618 + break;
619 + case RTL_FW_PHY_UNION_NC:
620 + case RTL_FW_PHY_UNION_NC1:
621 + case RTL_FW_PHY_UNION_NC2:
622 + case RTL_FW_PHY_UNION_UC2:
623 + case RTL_FW_PHY_UNION_UC:
624 + case RTL_FW_PHY_UNION_MISC:
625 + if (patch_phy)
626 + rtl8152_fw_phy_union_apply(tp, (struct fw_phy_union *)block);
627 + break;
628 + case RTL_FW_PHY_FIXUP:
629 + if (patch_phy)
630 + rtl8152_fw_phy_fixup(tp, (struct fw_phy_fixup *)block);
631 + break;
632 + case RTL_FW_PHY_SPEED_UP:
633 + rtl_ram_code_speed_up(tp, (struct fw_phy_speed_up *)block, !power_cut);
634 + break;
635 default:
636 break;
637 }
638 @@ -5035,6 +5567,21 @@ static int r8153c_post_firmware_1(struct
639 return 0;
640 }
641
642 +static int r8156a_post_firmware_1(struct r8152 *tp)
643 +{
644 + u32 ocp_data;
645 +
646 + ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_FW_FIX_EN1);
647 + ocp_data |= FW_IP_RESET_EN;
648 + ocp_write_word(tp, MCU_TYPE_USB, USB_FW_FIX_EN1, ocp_data);
649 +
650 + /* Modify U3PHY parameter for compatibility issue */
651 + ocp_write_dword(tp, MCU_TYPE_USB, USB_UPHY3_MDCMDIO, 0x4026840e);
652 + ocp_write_dword(tp, MCU_TYPE_USB, USB_UPHY3_MDCMDIO, 0x4001acc9);
653 +
654 + return 0;
655 +}
656 +
657 static void r8153_aldps_en(struct r8152 *tp, bool enable)
658 {
659 u16 data;
660 @@ -8653,12 +9200,16 @@ static int rtl_ops_init(struct r8152 *tp
661 #define FIRMWARE_8153A_4 "rtl_nic/rtl8153a-4.fw"
662 #define FIRMWARE_8153B_2 "rtl_nic/rtl8153b-2.fw"
663 #define FIRMWARE_8153C_1 "rtl_nic/rtl8153c-1.fw"
664 +#define FIRMWARE_8156A_2 "rtl_nic/rtl8156a-2.fw"
665 +#define FIRMWARE_8156B_2 "rtl_nic/rtl8156b-2.fw"
666
667 MODULE_FIRMWARE(FIRMWARE_8153A_2);
668 MODULE_FIRMWARE(FIRMWARE_8153A_3);
669 MODULE_FIRMWARE(FIRMWARE_8153A_4);
670 MODULE_FIRMWARE(FIRMWARE_8153B_2);
671 MODULE_FIRMWARE(FIRMWARE_8153C_1);
672 +MODULE_FIRMWARE(FIRMWARE_8156A_2);
673 +MODULE_FIRMWARE(FIRMWARE_8156B_2);
674
675 static int rtl_fw_init(struct r8152 *tp)
676 {
677 @@ -8684,6 +9235,14 @@ static int rtl_fw_init(struct r8152 *tp)
678 rtl_fw->pre_fw = r8153b_pre_firmware_1;
679 rtl_fw->post_fw = r8153b_post_firmware_1;
680 break;
681 + case RTL_VER_11:
682 + rtl_fw->fw_name = FIRMWARE_8156A_2;
683 + rtl_fw->post_fw = r8156a_post_firmware_1;
684 + break;
685 + case RTL_VER_13:
686 + case RTL_VER_15:
687 + rtl_fw->fw_name = FIRMWARE_8156B_2;
688 + break;
689 case RTL_VER_14:
690 rtl_fw->fw_name = FIRMWARE_8153C_1;
691 rtl_fw->pre_fw = r8153b_pre_firmware_1;
Staging tree of Zoltan Herpai