target/linux/generic/backport-5.4/800-v5.5-iio-imu-Add-support-for-the-FXOS8700-IMU.patch

   1 From 84e5ddd5c46ea3bf0cad670da32028994cad5936 Mon Sep 17 00:00:00 2001
   2 From: Robert Jones <rjones@gateworks.com>
   3 Date: Mon, 14 Oct 2019 11:49:21 -0700
   4 Subject: [PATCH] iio: imu: Add support for the FXOS8700 IMU
   5 MIME-Version: 1.0
   6 Content-Type: text/plain; charset=UTF-8
   7 Content-Transfer-Encoding: 8bit
   8
   9 FXOS8700CQ is a small, low-power, 3-axis linear accelerometer and 3-axis
  10 magnetometer combined into a single package. The device features a
  11 selectable I2C or point-to-point SPI serial interface with 14-bit
  12 accelerometer and 16-bit magnetometer ADC resolution along with
  13 smart-embedded functions.
  14
  15 FXOS8700CQ has dynamically selectable accelerationfull-scale ranges of
  16 ±2 g/±4 g/±8 g and a fixed magnetic measurement range of ±1200 μT.
  17 Output data rates (ODR) from 1.563 Hz to 800 Hz are selectable by the user
  18 for each sensor. Interleaved magnetic and acceleration data is available
  19 at ODR rates of up to 400 Hz. FXOS8700CQ is available in a plastic QFN
  20 package and it is guaranteed to operate over the extended temperature
  21 range of –40 °C to +85 °C.
  22
  23 TODO: Trigger and IRQ configuration support
  24
  25 Datasheet:
  26   http://cache.freescale.com/files/sensors/doc/data_sheet/FXOS8700CQ.pdf
  27
  28 Signed-off-by: Robert Jones <rjones@gateworks.com>
  29 Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
  30 ---
  31  drivers/iio/imu/Kconfig         |  27 ++
  32  drivers/iio/imu/Makefile        |   5 +
  33  drivers/iio/imu/fxos8700.h      |  10 +
  34  drivers/iio/imu/fxos8700_core.c | 649 ++++++++++++++++++++++++++++++++++++++++
  35  drivers/iio/imu/fxos8700_i2c.c  |  71 +++++
  36  drivers/iio/imu/fxos8700_spi.c  |  59 ++++
  37  6 files changed, 821 insertions(+)
  38  create mode 100644 drivers/iio/imu/fxos8700.h
  39  create mode 100644 drivers/iio/imu/fxos8700_core.c
  40  create mode 100644 drivers/iio/imu/fxos8700_i2c.c
  41  create mode 100644 drivers/iio/imu/fxos8700_spi.c
  42
  43 --- a/drivers/iio/imu/Kconfig
  44 +++ b/drivers/iio/imu/Kconfig
  45 @@ -40,6 +40,33 @@ config ADIS16480
  46
  47  source "drivers/iio/imu/bmi160/Kconfig"
  48
  49 +config FXOS8700
  50 +       tristate
  51 +
  52 +config FXOS8700_I2C
  53 +       tristate "NXP FXOS8700 I2C driver"
  54 +       depends on I2C
  55 +       select FXOS8700
  56 +       select REGMAP_I2C
  57 +       help
  58 +         Say yes here to build support for the NXP FXOS8700 m+g combo
  59 +         sensor on I2C.
  60 +
  61 +         This driver can also be built as a module. If so, the module will be
  62 +         called fxos8700_i2c.
  63 +
  64 +config FXOS8700_SPI
  65 +       tristate "NXP FXOS8700 SPI driver"
  66 +       depends on SPI
  67 +       select FXOS8700
  68 +       select REGMAP_SPI
  69 +       help
  70 +         Say yes here to build support for the NXP FXOS8700 m+g combo
  71 +         sensor on SPI.
  72 +
  73 +         This driver can also be built as a module. If so, the module will be
  74 +         called fxos8700_spi.
  75 +
  76  config KMX61
  77         tristate "Kionix KMX61 6-axis accelerometer and magnetometer"
  78         depends on I2C
  79 --- a/drivers/iio/imu/Makefile
  80 +++ b/drivers/iio/imu/Makefile
  81 @@ -14,6 +14,11 @@ adis_lib-$(CONFIG_IIO_ADIS_LIB_BUFFER) +
  82  obj-$(CONFIG_IIO_ADIS_LIB) += adis_lib.o
  83
  84  obj-y += bmi160/
  85 +
  86 +obj-$(CONFIG_FXOS8700) += fxos8700_core.o
  87 +obj-$(CONFIG_FXOS8700_I2C) += fxos8700_i2c.o
  88 +obj-$(CONFIG_FXOS8700_SPI) += fxos8700_spi.o
  89 +
  90  obj-y += inv_mpu6050/
  91
  92  obj-$(CONFIG_KMX61) += kmx61.o
  93 --- /dev/null
  94 +++ b/drivers/iio/imu/fxos8700.h
  95 @@ -0,0 +1,10 @@
  96 +/* SPDX-License-Identifier: GPL-2.0 */
  97 +#ifndef FXOS8700_H_
  98 +#define FXOS8700_H_
  99 +
 100 +extern const struct regmap_config fxos8700_regmap_config;
 101 +
 102 +int fxos8700_core_probe(struct device *dev, struct regmap *regmap,
 103 +                       const char *name, bool use_spi);
 104 +
 105 +#endif  /* FXOS8700_H_ */
 106 --- /dev/null
 107 +++ b/drivers/iio/imu/fxos8700_core.c
 108 @@ -0,0 +1,649 @@
 109 +// SPDX-License-Identifier: GPL-2.0
 110 +/*
 111 + * FXOS8700 - NXP IMU (accelerometer plus magnetometer)
 112 + *
 113 + * IIO core driver for FXOS8700, with support for I2C/SPI busses
 114 + *
 115 + * TODO: Buffer, trigger, and IRQ support
 116 + */
 117 +#include <linux/module.h>
 118 +#include <linux/regmap.h>
 119 +#include <linux/acpi.h>
 120 +#include <linux/bitops.h>
 121 +
 122 +#include <linux/iio/iio.h>
 123 +#include <linux/iio/sysfs.h>
 124 +
 125 +#include "fxos8700.h"
 126 +
 127 +/* Register Definitions */
 128 +#define FXOS8700_STATUS             0x00
 129 +#define FXOS8700_OUT_X_MSB          0x01
 130 +#define FXOS8700_OUT_X_LSB          0x02
 131 +#define FXOS8700_OUT_Y_MSB          0x03
 132 +#define FXOS8700_OUT_Y_LSB          0x04
 133 +#define FXOS8700_OUT_Z_MSB          0x05
 134 +#define FXOS8700_OUT_Z_LSB          0x06
 135 +#define FXOS8700_F_SETUP            0x09
 136 +#define FXOS8700_TRIG_CFG           0x0a
 137 +#define FXOS8700_SYSMOD             0x0b
 138 +#define FXOS8700_INT_SOURCE         0x0c
 139 +#define FXOS8700_WHO_AM_I           0x0d
 140 +#define FXOS8700_XYZ_DATA_CFG       0x0e
 141 +#define FXOS8700_HP_FILTER_CUTOFF   0x0f
 142 +#define FXOS8700_PL_STATUS          0x10
 143 +#define FXOS8700_PL_CFG             0x11
 144 +#define FXOS8700_PL_COUNT           0x12
 145 +#define FXOS8700_PL_BF_ZCOMP        0x13
 146 +#define FXOS8700_PL_THS_REG         0x14
 147 +#define FXOS8700_A_FFMT_CFG         0x15
 148 +#define FXOS8700_A_FFMT_SRC         0x16
 149 +#define FXOS8700_A_FFMT_THS         0x17
 150 +#define FXOS8700_A_FFMT_COUNT       0x18
 151 +#define FXOS8700_TRANSIENT_CFG      0x1d
 152 +#define FXOS8700_TRANSIENT_SRC      0x1e
 153 +#define FXOS8700_TRANSIENT_THS      0x1f
 154 +#define FXOS8700_TRANSIENT_COUNT    0x20
 155 +#define FXOS8700_PULSE_CFG          0x21
 156 +#define FXOS8700_PULSE_SRC          0x22
 157 +#define FXOS8700_PULSE_THSX         0x23
 158 +#define FXOS8700_PULSE_THSY         0x24
 159 +#define FXOS8700_PULSE_THSZ         0x25
 160 +#define FXOS8700_PULSE_TMLT         0x26
 161 +#define FXOS8700_PULSE_LTCY         0x27
 162 +#define FXOS8700_PULSE_WIND         0x28
 163 +#define FXOS8700_ASLP_COUNT         0x29
 164 +#define FXOS8700_CTRL_REG1          0x2a
 165 +#define FXOS8700_CTRL_REG2          0x2b
 166 +#define FXOS8700_CTRL_REG3          0x2c
 167 +#define FXOS8700_CTRL_REG4          0x2d
 168 +#define FXOS8700_CTRL_REG5          0x2e
 169 +#define FXOS8700_OFF_X              0x2f
 170 +#define FXOS8700_OFF_Y              0x30
 171 +#define FXOS8700_OFF_Z              0x31
 172 +#define FXOS8700_M_DR_STATUS        0x32
 173 +#define FXOS8700_M_OUT_X_MSB        0x33
 174 +#define FXOS8700_M_OUT_X_LSB        0x34
 175 +#define FXOS8700_M_OUT_Y_MSB        0x35
 176 +#define FXOS8700_M_OUT_Y_LSB        0x36
 177 +#define FXOS8700_M_OUT_Z_MSB        0x37
 178 +#define FXOS8700_M_OUT_Z_LSB        0x38
 179 +#define FXOS8700_CMP_X_MSB          0x39
 180 +#define FXOS8700_CMP_X_LSB          0x3a
 181 +#define FXOS8700_CMP_Y_MSB          0x3b
 182 +#define FXOS8700_CMP_Y_LSB          0x3c
 183 +#define FXOS8700_CMP_Z_MSB          0x3d
 184 +#define FXOS8700_CMP_Z_LSB          0x3e
 185 +#define FXOS8700_M_OFF_X_MSB        0x3f
 186 +#define FXOS8700_M_OFF_X_LSB        0x40
 187 +#define FXOS8700_M_OFF_Y_MSB        0x41
 188 +#define FXOS8700_M_OFF_Y_LSB        0x42
 189 +#define FXOS8700_M_OFF_Z_MSB        0x43
 190 +#define FXOS8700_M_OFF_Z_LSB        0x44
 191 +#define FXOS8700_MAX_X_MSB          0x45
 192 +#define FXOS8700_MAX_X_LSB          0x46
 193 +#define FXOS8700_MAX_Y_MSB          0x47
 194 +#define FXOS8700_MAX_Y_LSB          0x48
 195 +#define FXOS8700_MAX_Z_MSB          0x49
 196 +#define FXOS8700_MAX_Z_LSB          0x4a
 197 +#define FXOS8700_MIN_X_MSB          0x4b
 198 +#define FXOS8700_MIN_X_LSB          0x4c
 199 +#define FXOS8700_MIN_Y_MSB          0x4d
 200 +#define FXOS8700_MIN_Y_LSB          0x4e
 201 +#define FXOS8700_MIN_Z_MSB          0x4f
 202 +#define FXOS8700_MIN_Z_LSB          0x50
 203 +#define FXOS8700_TEMP               0x51
 204 +#define FXOS8700_M_THS_CFG          0x52
 205 +#define FXOS8700_M_THS_SRC          0x53
 206 +#define FXOS8700_M_THS_X_MSB        0x54
 207 +#define FXOS8700_M_THS_X_LSB        0x55
 208 +#define FXOS8700_M_THS_Y_MSB        0x56
 209 +#define FXOS8700_M_THS_Y_LSB        0x57
 210 +#define FXOS8700_M_THS_Z_MSB        0x58
 211 +#define FXOS8700_M_THS_Z_LSB        0x59
 212 +#define FXOS8700_M_THS_COUNT        0x5a
 213 +#define FXOS8700_M_CTRL_REG1        0x5b
 214 +#define FXOS8700_M_CTRL_REG2        0x5c
 215 +#define FXOS8700_M_CTRL_REG3        0x5d
 216 +#define FXOS8700_M_INT_SRC          0x5e
 217 +#define FXOS8700_A_VECM_CFG         0x5f
 218 +#define FXOS8700_A_VECM_THS_MSB     0x60
 219 +#define FXOS8700_A_VECM_THS_LSB     0x61
 220 +#define FXOS8700_A_VECM_CNT         0x62
 221 +#define FXOS8700_A_VECM_INITX_MSB   0x63
 222 +#define FXOS8700_A_VECM_INITX_LSB   0x64
 223 +#define FXOS8700_A_VECM_INITY_MSB   0x65
 224 +#define FXOS8700_A_VECM_INITY_LSB   0x66
 225 +#define FXOS8700_A_VECM_INITZ_MSB   0x67
 226 +#define FXOS8700_A_VECM_INITZ_LSB   0x68
 227 +#define FXOS8700_M_VECM_CFG         0x69
 228 +#define FXOS8700_M_VECM_THS_MSB     0x6a
 229 +#define FXOS8700_M_VECM_THS_LSB     0x6b
 230 +#define FXOS8700_M_VECM_CNT         0x6c
 231 +#define FXOS8700_M_VECM_INITX_MSB   0x6d
 232 +#define FXOS8700_M_VECM_INITX_LSB   0x6e
 233 +#define FXOS8700_M_VECM_INITY_MSB   0x6f
 234 +#define FXOS8700_M_VECM_INITY_LSB   0x70
 235 +#define FXOS8700_M_VECM_INITZ_MSB   0x71
 236 +#define FXOS8700_M_VECM_INITZ_LSB   0x72
 237 +#define FXOS8700_A_FFMT_THS_X_MSB   0x73
 238 +#define FXOS8700_A_FFMT_THS_X_LSB   0x74
 239 +#define FXOS8700_A_FFMT_THS_Y_MSB   0x75
 240 +#define FXOS8700_A_FFMT_THS_Y_LSB   0x76
 241 +#define FXOS8700_A_FFMT_THS_Z_MSB   0x77
 242 +#define FXOS8700_A_FFMT_THS_Z_LSB   0x78
 243 +#define FXOS8700_A_TRAN_INIT_MSB    0x79
 244 +#define FXOS8700_A_TRAN_INIT_LSB_X  0x7a
 245 +#define FXOS8700_A_TRAN_INIT_LSB_Y  0x7b
 246 +#define FXOS8700_A_TRAN_INIT_LSB_Z  0x7d
 247 +#define FXOS8700_TM_NVM_LOCK        0x7e
 248 +#define FXOS8700_NVM_DATA0_35       0x80
 249 +#define FXOS8700_NVM_DATA_BNK3      0xa4
 250 +#define FXOS8700_NVM_DATA_BNK2      0xa5
 251 +#define FXOS8700_NVM_DATA_BNK1      0xa6
 252 +#define FXOS8700_NVM_DATA_BNK0      0xa7
 253 +
 254 +/* Bit definitions for FXOS8700_CTRL_REG1 */
 255 +#define FXOS8700_CTRL_ODR_MSK       0x38
 256 +#define FXOS8700_CTRL_ODR_MAX       0x00
 257 +#define FXOS8700_CTRL_ODR_MIN       GENMASK(4, 3)
 258 +
 259 +/* Bit definitions for FXOS8700_M_CTRL_REG1 */
 260 +#define FXOS8700_HMS_MASK           GENMASK(1, 0)
 261 +#define FXOS8700_OS_MASK            GENMASK(4, 2)
 262 +
 263 +/* Bit definitions for FXOS8700_M_CTRL_REG2 */
 264 +#define FXOS8700_MAXMIN_RST         BIT(2)
 265 +#define FXOS8700_MAXMIN_DIS_THS     BIT(3)
 266 +#define FXOS8700_MAXMIN_DIS         BIT(4)
 267 +
 268 +#define FXOS8700_ACTIVE             0x01
 269 +#define FXOS8700_ACTIVE_MIN_USLEEP  4000 /* from table 6 in datasheet */
 270 +
 271 +#define FXOS8700_DEVICE_ID          0xC7
 272 +#define FXOS8700_PRE_DEVICE_ID      0xC4
 273 +#define FXOS8700_DATA_BUF_SIZE      3
 274 +
 275 +struct fxos8700_data {
 276 +       struct regmap *regmap;
 277 +       struct iio_trigger *trig;
 278 +       __be16 buf[FXOS8700_DATA_BUF_SIZE] ____cacheline_aligned;
 279 +};
 280 +
 281 +/* Regmap info */
 282 +static const struct regmap_range read_range[] = {
 283 +       {
 284 +               .range_min = FXOS8700_STATUS,
 285 +               .range_max = FXOS8700_A_FFMT_COUNT,
 286 +       }, {
 287 +               .range_min = FXOS8700_TRANSIENT_CFG,
 288 +               .range_max = FXOS8700_A_FFMT_THS_Z_LSB,
 289 +       },
 290 +};
 291 +
 292 +static const struct regmap_range write_range[] = {
 293 +       {
 294 +               .range_min = FXOS8700_F_SETUP,
 295 +               .range_max = FXOS8700_TRIG_CFG,
 296 +       }, {
 297 +               .range_min = FXOS8700_XYZ_DATA_CFG,
 298 +               .range_max = FXOS8700_HP_FILTER_CUTOFF,
 299 +       }, {
 300 +               .range_min = FXOS8700_PL_CFG,
 301 +               .range_max = FXOS8700_A_FFMT_CFG,
 302 +       }, {
 303 +               .range_min = FXOS8700_A_FFMT_THS,
 304 +               .range_max = FXOS8700_TRANSIENT_CFG,
 305 +       }, {
 306 +               .range_min = FXOS8700_TRANSIENT_THS,
 307 +               .range_max = FXOS8700_PULSE_CFG,
 308 +       }, {
 309 +               .range_min = FXOS8700_PULSE_THSX,
 310 +               .range_max = FXOS8700_OFF_Z,
 311 +       }, {
 312 +               .range_min = FXOS8700_M_OFF_X_MSB,
 313 +               .range_max = FXOS8700_M_OFF_Z_LSB,
 314 +       }, {
 315 +               .range_min = FXOS8700_M_THS_CFG,
 316 +               .range_max = FXOS8700_M_THS_CFG,
 317 +       }, {
 318 +               .range_min = FXOS8700_M_THS_X_MSB,
 319 +               .range_max = FXOS8700_M_CTRL_REG3,
 320 +       }, {
 321 +               .range_min = FXOS8700_A_VECM_CFG,
 322 +               .range_max = FXOS8700_A_FFMT_THS_Z_LSB,
 323 +       },
 324 +};
 325 +
 326 +static const struct regmap_access_table driver_read_table = {
 327 +       .yes_ranges =   read_range,
 328 +       .n_yes_ranges = ARRAY_SIZE(read_range),
 329 +};
 330 +
 331 +static const struct regmap_access_table driver_write_table = {
 332 +       .yes_ranges =   write_range,
 333 +       .n_yes_ranges = ARRAY_SIZE(write_range),
 334 +};
 335 +
 336 +const struct regmap_config fxos8700_regmap_config = {
 337 +       .reg_bits = 8,
 338 +       .val_bits = 8,
 339 +       .max_register = FXOS8700_NVM_DATA_BNK0,
 340 +       .rd_table = &driver_read_table,
 341 +       .wr_table = &driver_write_table,
 342 +};
 343 +EXPORT_SYMBOL(fxos8700_regmap_config);
 344 +
 345 +#define FXOS8700_CHANNEL(_type, _axis) {                       \
 346 +       .type = _type,                                          \
 347 +       .modified = 1,                                          \
 348 +       .channel2 = IIO_MOD_##_axis,                            \
 349 +       .info_mask_separate = BIT(IIO_CHAN_INFO_RAW),           \
 350 +       .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) |  \
 351 +               BIT(IIO_CHAN_INFO_SAMP_FREQ),                   \
 352 +}
 353 +
 354 +enum fxos8700_accel_scale_bits {
 355 +       MODE_2G = 0,
 356 +       MODE_4G,
 357 +       MODE_8G,
 358 +};
 359 +
 360 +/* scan indexes follow DATA register order */
 361 +enum fxos8700_scan_axis {
 362 +       FXOS8700_SCAN_ACCEL_X = 0,
 363 +       FXOS8700_SCAN_ACCEL_Y,
 364 +       FXOS8700_SCAN_ACCEL_Z,
 365 +       FXOS8700_SCAN_MAGN_X,
 366 +       FXOS8700_SCAN_MAGN_Y,
 367 +       FXOS8700_SCAN_MAGN_Z,
 368 +       FXOS8700_SCAN_RHALL,
 369 +       FXOS8700_SCAN_TIMESTAMP,
 370 +};
 371 +
 372 +enum fxos8700_sensor {
 373 +       FXOS8700_ACCEL  = 0,
 374 +       FXOS8700_MAGN,
 375 +       FXOS8700_NUM_SENSORS /* must be last */
 376 +};
 377 +
 378 +enum fxos8700_int_pin {
 379 +       FXOS8700_PIN_INT1,
 380 +       FXOS8700_PIN_INT2
 381 +};
 382 +
 383 +struct fxos8700_scale {
 384 +       u8 bits;
 385 +       int uscale;
 386 +};
 387 +
 388 +struct fxos8700_odr {
 389 +       u8 bits;
 390 +       int odr;
 391 +       int uodr;
 392 +};
 393 +
 394 +static const struct fxos8700_scale fxos8700_accel_scale[] = {
 395 +       { MODE_2G, 244},
 396 +       { MODE_4G, 488},
 397 +       { MODE_8G, 976},
 398 +};
 399 +
 400 +/*
 401 + * Accellerometer and magnetometer have the same ODR options, set in the
 402 + * CTRL_REG1 register. ODR is halved when using both sensors at once in
 403 + * hybrid mode.
 404 + */
 405 +static const struct fxos8700_odr fxos8700_odr[] = {
 406 +       {0x00, 800, 0},
 407 +       {0x01, 400, 0},
 408 +       {0x02, 200, 0},
 409 +       {0x03, 100, 0},
 410 +       {0x04, 50, 0},
 411 +       {0x05, 12, 500000},
 412 +       {0x06, 6, 250000},
 413 +       {0x07, 1, 562500},
 414 +};
 415 +
 416 +static const struct iio_chan_spec fxos8700_channels[] = {
 417 +       FXOS8700_CHANNEL(IIO_ACCEL, X),
 418 +       FXOS8700_CHANNEL(IIO_ACCEL, Y),
 419 +       FXOS8700_CHANNEL(IIO_ACCEL, Z),
 420 +       FXOS8700_CHANNEL(IIO_MAGN, X),
 421 +       FXOS8700_CHANNEL(IIO_MAGN, Y),
 422 +       FXOS8700_CHANNEL(IIO_MAGN, Z),
 423 +       IIO_CHAN_SOFT_TIMESTAMP(FXOS8700_SCAN_TIMESTAMP),
 424 +};
 425 +
 426 +static enum fxos8700_sensor fxos8700_to_sensor(enum iio_chan_type iio_type)
 427 +{
 428 +       switch (iio_type) {
 429 +       case IIO_ACCEL:
 430 +               return FXOS8700_ACCEL;
 431 +       case IIO_ANGL_VEL:
 432 +               return FXOS8700_MAGN;
 433 +       default:
 434 +               return -EINVAL;
 435 +       }
 436 +}
 437 +
 438 +static int fxos8700_set_active_mode(struct fxos8700_data *data,
 439 +                                   enum fxos8700_sensor t, bool mode)
 440 +{
 441 +       int ret;
 442 +
 443 +       ret = regmap_write(data->regmap, FXOS8700_CTRL_REG1, mode);
 444 +       if (ret)
 445 +               return ret;
 446 +
 447 +       usleep_range(FXOS8700_ACTIVE_MIN_USLEEP,
 448 +                    FXOS8700_ACTIVE_MIN_USLEEP + 1000);
 449 +
 450 +       return 0;
 451 +}
 452 +
 453 +static int fxos8700_set_scale(struct fxos8700_data *data,
 454 +                             enum fxos8700_sensor t, int uscale)
 455 +{
 456 +       int i;
 457 +       static const int scale_num = ARRAY_SIZE(fxos8700_accel_scale);
 458 +       struct device *dev = regmap_get_device(data->regmap);
 459 +
 460 +       if (t == FXOS8700_MAGN) {
 461 +               dev_err(dev, "Magnetometer scale is locked at 1200uT\n");
 462 +               return -EINVAL;
 463 +       }
 464 +
 465 +       for (i = 0; i < scale_num; i++)
 466 +               if (fxos8700_accel_scale[i].uscale == uscale)
 467 +                       break;
 468 +
 469 +       if (i == scale_num)
 470 +               return -EINVAL;
 471 +
 472 +       return regmap_write(data->regmap, FXOS8700_XYZ_DATA_CFG,
 473 +                           fxos8700_accel_scale[i].bits);
 474 +}
 475 +
 476 +static int fxos8700_get_scale(struct fxos8700_data *data,
 477 +                             enum fxos8700_sensor t, int *uscale)
 478 +{
 479 +       int i, ret, val;
 480 +       static const int scale_num = ARRAY_SIZE(fxos8700_accel_scale);
 481 +
 482 +       if (t == FXOS8700_MAGN) {
 483 +               *uscale = 1200; /* Magnetometer is locked at 1200uT */
 484 +               return 0;
 485 +       }
 486 +
 487 +       ret = regmap_read(data->regmap, FXOS8700_XYZ_DATA_CFG, &val);
 488 +       if (ret)
 489 +               return ret;
 490 +
 491 +       for (i = 0; i < scale_num; i++) {
 492 +               if (fxos8700_accel_scale[i].bits == (val & 0x3)) {
 493 +                       *uscale = fxos8700_accel_scale[i].uscale;
 494 +                       return 0;
 495 +               }
 496 +       }
 497 +
 498 +       return -EINVAL;
 499 +}
 500 +
 501 +static int fxos8700_get_data(struct fxos8700_data *data, int chan_type,
 502 +                            int axis, int *val)
 503 +{
 504 +       u8 base, reg;
 505 +       int ret;
 506 +       enum fxos8700_sensor type = fxos8700_to_sensor(chan_type);
 507 +
 508 +       base = type ? FXOS8700_OUT_X_MSB : FXOS8700_M_OUT_X_MSB;
 509 +
 510 +       /* Block read 6 bytes of device output registers to avoid data loss */
 511 +       ret = regmap_bulk_read(data->regmap, base, data->buf,
 512 +                              FXOS8700_DATA_BUF_SIZE);
 513 +       if (ret)
 514 +               return ret;
 515 +
 516 +       /* Convert axis to buffer index */
 517 +       reg = axis - IIO_MOD_X;
 518 +
 519 +       /* Convert to native endianness */
 520 +       *val = sign_extend32(be16_to_cpu(data->buf[reg]), 15);
 521 +
 522 +       return 0;
 523 +}
 524 +
 525 +static int fxos8700_set_odr(struct fxos8700_data *data, enum fxos8700_sensor t,
 526 +                           int odr, int uodr)
 527 +{
 528 +       int i, ret, val;
 529 +       bool active_mode;
 530 +       static const int odr_num = ARRAY_SIZE(fxos8700_odr);
 531 +
 532 +       ret = regmap_read(data->regmap, FXOS8700_CTRL_REG1, &val);
 533 +       if (ret)
 534 +               return ret;
 535 +
 536 +       active_mode = val & FXOS8700_ACTIVE;
 537 +
 538 +       if (active_mode) {
 539 +               /*
 540 +                * The device must be in standby mode to change any of the
 541 +                * other fields within CTRL_REG1
 542 +                */
 543 +               ret = regmap_write(data->regmap, FXOS8700_CTRL_REG1,
 544 +                                  val & ~FXOS8700_ACTIVE);
 545 +               if (ret)
 546 +                       return ret;
 547 +       }
 548 +
 549 +       for (i = 0; i < odr_num; i++)
 550 +               if (fxos8700_odr[i].odr == odr && fxos8700_odr[i].uodr == uodr)
 551 +                       break;
 552 +
 553 +       if (i >= odr_num)
 554 +               return -EINVAL;
 555 +
 556 +       return regmap_update_bits(data->regmap,
 557 +                                 FXOS8700_CTRL_REG1,
 558 +                                 FXOS8700_CTRL_ODR_MSK + FXOS8700_ACTIVE,
 559 +                                 fxos8700_odr[i].bits << 3 | active_mode);
 560 +}
 561 +
 562 +static int fxos8700_get_odr(struct fxos8700_data *data, enum fxos8700_sensor t,
 563 +                           int *odr, int *uodr)
 564 +{
 565 +       int i, val, ret;
 566 +       static const int odr_num = ARRAY_SIZE(fxos8700_odr);
 567 +
 568 +       ret = regmap_read(data->regmap, FXOS8700_CTRL_REG1, &val);
 569 +       if (ret)
 570 +               return ret;
 571 +
 572 +       val &= FXOS8700_CTRL_ODR_MSK;
 573 +
 574 +       for (i = 0; i < odr_num; i++)
 575 +               if (val == fxos8700_odr[i].bits)
 576 +                       break;
 577 +
 578 +       if (i >= odr_num)
 579 +               return -EINVAL;
 580 +
 581 +       *odr = fxos8700_odr[i].odr;
 582 +       *uodr = fxos8700_odr[i].uodr;
 583 +
 584 +       return 0;
 585 +}
 586 +
 587 +static int fxos8700_read_raw(struct iio_dev *indio_dev,
 588 +                            struct iio_chan_spec const *chan,
 589 +                            int *val, int *val2, long mask)
 590 +{
 591 +       int ret;
 592 +       struct fxos8700_data *data = iio_priv(indio_dev);
 593 +
 594 +       switch (mask) {
 595 +       case IIO_CHAN_INFO_RAW:
 596 +               ret = fxos8700_get_data(data, chan->type, chan->channel2, val);
 597 +               if (ret)
 598 +                       return ret;
 599 +               return IIO_VAL_INT;
 600 +       case IIO_CHAN_INFO_SCALE:
 601 +               *val = 0;
 602 +               ret = fxos8700_get_scale(data, fxos8700_to_sensor(chan->type),
 603 +                                        val2);
 604 +               return ret ? ret : IIO_VAL_INT_PLUS_MICRO;
 605 +       case IIO_CHAN_INFO_SAMP_FREQ:
 606 +               ret = fxos8700_get_odr(data, fxos8700_to_sensor(chan->type),
 607 +                                      val, val2);
 608 +               return ret ? ret : IIO_VAL_INT_PLUS_MICRO;
 609 +       default:
 610 +               return -EINVAL;
 611 +       }
 612 +}
 613 +
 614 +static int fxos8700_write_raw(struct iio_dev *indio_dev,
 615 +                             struct iio_chan_spec const *chan,
 616 +                             int val, int val2, long mask)
 617 +{
 618 +       struct fxos8700_data *data = iio_priv(indio_dev);
 619 +
 620 +       switch (mask) {
 621 +       case IIO_CHAN_INFO_SCALE:
 622 +               return fxos8700_set_scale(data, fxos8700_to_sensor(chan->type),
 623 +                                         val2);
 624 +       case IIO_CHAN_INFO_SAMP_FREQ:
 625 +               return fxos8700_set_odr(data, fxos8700_to_sensor(chan->type),
 626 +                                       val, val2);
 627 +       default:
 628 +               return -EINVAL;
 629 +       }
 630 +}
 631 +
 632 +static IIO_CONST_ATTR(in_accel_sampling_frequency_available,
 633 +                     "1.5625 6.25 12.5 50 100 200 400 800");
 634 +static IIO_CONST_ATTR(in_magn_sampling_frequency_available,
 635 +                     "1.5625 6.25 12.5 50 100 200 400 800");
 636 +static IIO_CONST_ATTR(in_accel_scale_available, "0.000244 0.000488 0.000976");
 637 +static IIO_CONST_ATTR(in_magn_scale_available, "0.000001200");
 638 +
 639 +static struct attribute *fxos8700_attrs[] = {
 640 +       &iio_const_attr_in_accel_sampling_frequency_available.dev_attr.attr,
 641 +       &iio_const_attr_in_magn_sampling_frequency_available.dev_attr.attr,
 642 +       &iio_const_attr_in_accel_scale_available.dev_attr.attr,
 643 +       &iio_const_attr_in_magn_scale_available.dev_attr.attr,
 644 +       NULL,
 645 +};
 646 +
 647 +static const struct attribute_group fxos8700_attrs_group = {
 648 +       .attrs = fxos8700_attrs,
 649 +};
 650 +
 651 +static const struct iio_info fxos8700_info = {
 652 +       .read_raw = fxos8700_read_raw,
 653 +       .write_raw = fxos8700_write_raw,
 654 +       .attrs = &fxos8700_attrs_group,
 655 +};
 656 +
 657 +static int fxos8700_chip_init(struct fxos8700_data *data, bool use_spi)
 658 +{
 659 +       int ret;
 660 +       unsigned int val;
 661 +       struct device *dev = regmap_get_device(data->regmap);
 662 +
 663 +       ret = regmap_read(data->regmap, FXOS8700_WHO_AM_I, &val);
 664 +       if (ret) {
 665 +               dev_err(dev, "Error reading chip id\n");
 666 +               return ret;
 667 +       }
 668 +       if (val != FXOS8700_DEVICE_ID && val != FXOS8700_PRE_DEVICE_ID) {
 669 +               dev_err(dev, "Wrong chip id, got %x expected %x or %x\n",
 670 +                       val, FXOS8700_DEVICE_ID, FXOS8700_PRE_DEVICE_ID);
 671 +               return -ENODEV;
 672 +       }
 673 +
 674 +       ret = fxos8700_set_active_mode(data, FXOS8700_ACCEL, true);
 675 +       if (ret)
 676 +               return ret;
 677 +
 678 +       ret = fxos8700_set_active_mode(data, FXOS8700_MAGN, true);
 679 +       if (ret)
 680 +               return ret;
 681 +
 682 +       /*
 683 +        * The device must be in standby mode to change any of the other fields
 684 +        * within CTRL_REG1
 685 +        */
 686 +       ret = regmap_write(data->regmap, FXOS8700_CTRL_REG1, 0x00);
 687 +       if (ret)
 688 +               return ret;
 689 +
 690 +       /* Set max oversample ratio (OSR) and both devices active */
 691 +       ret = regmap_write(data->regmap, FXOS8700_M_CTRL_REG1,
 692 +                          FXOS8700_HMS_MASK | FXOS8700_OS_MASK);
 693 +       if (ret)
 694 +               return ret;
 695 +
 696 +       /* Disable and rst min/max measurements & threshold */
 697 +       ret = regmap_write(data->regmap, FXOS8700_M_CTRL_REG2,
 698 +                          FXOS8700_MAXMIN_RST | FXOS8700_MAXMIN_DIS_THS |
 699 +                          FXOS8700_MAXMIN_DIS);
 700 +       if (ret)
 701 +               return ret;
 702 +
 703 +       /* Max ODR (800Hz individual or 400Hz hybrid), active mode */
 704 +       ret = regmap_write(data->regmap, FXOS8700_CTRL_REG1,
 705 +                          FXOS8700_CTRL_ODR_MAX | FXOS8700_ACTIVE);
 706 +       if (ret)
 707 +               return ret;
 708 +
 709 +       /* Set for max full-scale range (+/-8G) */
 710 +       return regmap_write(data->regmap, FXOS8700_XYZ_DATA_CFG, MODE_8G);
 711 +}
 712 +
 713 +static void fxos8700_chip_uninit(void *data)
 714 +{
 715 +       struct fxos8700_data *fxos8700_data = data;
 716 +
 717 +       fxos8700_set_active_mode(fxos8700_data, FXOS8700_ACCEL, false);
 718 +       fxos8700_set_active_mode(fxos8700_data, FXOS8700_MAGN, false);
 719 +}
 720 +
 721 +int fxos8700_core_probe(struct device *dev, struct regmap *regmap,
 722 +                       const char *name, bool use_spi)
 723 +{
 724 +       struct iio_dev *indio_dev;
 725 +       struct fxos8700_data *data;
 726 +       int ret;
 727 +
 728 +       indio_dev = devm_iio_device_alloc(dev, sizeof(*data));
 729 +       if (!indio_dev)
 730 +               return -ENOMEM;
 731 +
 732 +       data = iio_priv(indio_dev);
 733 +       dev_set_drvdata(dev, indio_dev);
 734 +       data->regmap = regmap;
 735 +
 736 +       ret = fxos8700_chip_init(data, use_spi);
 737 +       if (ret)
 738 +               return ret;
 739 +
 740 +       ret = devm_add_action_or_reset(dev, fxos8700_chip_uninit, data);
 741 +       if (ret)
 742 +               return ret;
 743 +
 744 +       indio_dev->dev.parent = dev;
 745 +       indio_dev->channels = fxos8700_channels;
 746 +       indio_dev->num_channels = ARRAY_SIZE(fxos8700_channels);
 747 +       indio_dev->name = name ? name : "fxos8700";
 748 +       indio_dev->modes = INDIO_DIRECT_MODE;
 749 +       indio_dev->info = &fxos8700_info;
 750 +
 751 +       return devm_iio_device_register(dev, indio_dev);
 752 +}
 753 +EXPORT_SYMBOL_GPL(fxos8700_core_probe);
 754 +
 755 +MODULE_AUTHOR("Robert Jones <rjones@gateworks.com>");
 756 +MODULE_DESCRIPTION("FXOS8700 6-Axis Acc and Mag Combo Sensor driver");
 757 +MODULE_LICENSE("GPL v2");
 758 --- /dev/null
 759 +++ b/drivers/iio/imu/fxos8700_i2c.c
 760 @@ -0,0 +1,71 @@
 761 +// SPDX-License-Identifier: GPL-2.0
 762 +/*
 763 + * FXOS8700 - NXP IMU, I2C bits
 764 + *
 765 + * 7-bit I2C slave address determined by SA1 and SA0 logic level
 766 + * inputs represented in the following table:
 767 + *      SA1  |  SA0  |  Slave Address
 768 + *      0    |  0    |  0x1E
 769 + *      0    |  1    |  0x1D
 770 + *      1    |  0    |  0x1C
 771 + *      1    |  1    |  0x1F
 772 + */
 773 +#include <linux/acpi.h>
 774 +#include <linux/i2c.h>
 775 +#include <linux/module.h>
 776 +#include <linux/mod_devicetable.h>
 777 +#include <linux/regmap.h>
 778 +
 779 +#include "fxos8700.h"
 780 +
 781 +static int fxos8700_i2c_probe(struct i2c_client *client,
 782 +                             const struct i2c_device_id *id)
 783 +{
 784 +       struct regmap *regmap;
 785 +       const char *name = NULL;
 786 +
 787 +       regmap = devm_regmap_init_i2c(client, &fxos8700_regmap_config);
 788 +       if (IS_ERR(regmap)) {
 789 +               dev_err(&client->dev, "Failed to register i2c regmap %d\n",
 790 +                       (int)PTR_ERR(regmap));
 791 +               return PTR_ERR(regmap);
 792 +       }
 793 +
 794 +       if (id)
 795 +               name = id->name;
 796 +
 797 +       return fxos8700_core_probe(&client->dev, regmap, name, false);
 798 +}
 799 +
 800 +static const struct i2c_device_id fxos8700_i2c_id[] = {
 801 +       {"fxos8700", 0},
 802 +       { }
 803 +};
 804 +MODULE_DEVICE_TABLE(i2c, fxos8700_i2c_id);
 805 +
 806 +static const struct acpi_device_id fxos8700_acpi_match[] = {
 807 +       {"FXOS8700", 0},
 808 +       { }
 809 +};
 810 +MODULE_DEVICE_TABLE(acpi, fxos8700_acpi_match);
 811 +
 812 +static const struct of_device_id fxos8700_of_match[] = {
 813 +       { .compatible = "nxp,fxos8700" },
 814 +       { }
 815 +};
 816 +MODULE_DEVICE_TABLE(of, fxos8700_of_match);
 817 +
 818 +static struct i2c_driver fxos8700_i2c_driver = {
 819 +       .driver = {
 820 +               .name                   = "fxos8700_i2c",
 821 +               .acpi_match_table       = ACPI_PTR(fxos8700_acpi_match),
 822 +               .of_match_table         = fxos8700_of_match,
 823 +       },
 824 +       .probe          = fxos8700_i2c_probe,
 825 +       .id_table       = fxos8700_i2c_id,
 826 +};
 827 +module_i2c_driver(fxos8700_i2c_driver);
 828 +
 829 +MODULE_AUTHOR("Robert Jones <rjones@gateworks.com>");
 830 +MODULE_DESCRIPTION("FXOS8700 I2C driver");
 831 +MODULE_LICENSE("GPL v2");
 832 --- /dev/null
 833 +++ b/drivers/iio/imu/fxos8700_spi.c
 834 @@ -0,0 +1,59 @@
 835 +// SPDX-License-Identifier: GPL-2.0
 836 +/*
 837 + * FXOS8700 - NXP IMU, SPI bits
 838 + */
 839 +#include <linux/acpi.h>
 840 +#include <linux/module.h>
 841 +#include <linux/mod_devicetable.h>
 842 +#include <linux/regmap.h>
 843 +#include <linux/spi/spi.h>
 844 +
 845 +#include "fxos8700.h"
 846 +
 847 +static int fxos8700_spi_probe(struct spi_device *spi)
 848 +{
 849 +       struct regmap *regmap;
 850 +       const struct spi_device_id *id = spi_get_device_id(spi);
 851 +
 852 +       regmap = devm_regmap_init_spi(spi, &fxos8700_regmap_config);
 853 +       if (IS_ERR(regmap)) {
 854 +               dev_err(&spi->dev, "Failed to register spi regmap %d\n",
 855 +                       (int)PTR_ERR(regmap));
 856 +               return PTR_ERR(regmap);
 857 +       }
 858 +
 859 +       return fxos8700_core_probe(&spi->dev, regmap, id->name, true);
 860 +}
 861 +
 862 +static const struct spi_device_id fxos8700_spi_id[] = {
 863 +       {"fxos8700", 0},
 864 +       { }
 865 +};
 866 +MODULE_DEVICE_TABLE(spi, fxos8700_spi_id);
 867 +
 868 +static const struct acpi_device_id fxos8700_acpi_match[] = {
 869 +       {"FXOS8700", 0},
 870 +       { }
 871 +};
 872 +MODULE_DEVICE_TABLE(acpi, fxos8700_acpi_match);
 873 +
 874 +static const struct of_device_id fxos8700_of_match[] = {
 875 +       { .compatible = "nxp,fxos8700" },
 876 +       { }
 877 +};
 878 +MODULE_DEVICE_TABLE(of, fxos8700_of_match);
 879 +
 880 +static struct spi_driver fxos8700_spi_driver = {
 881 +       .probe          = fxos8700_spi_probe,
 882 +       .id_table       = fxos8700_spi_id,
 883 +       .driver = {
 884 +               .acpi_match_table       = ACPI_PTR(fxos8700_acpi_match),
 885 +               .of_match_table         = fxos8700_of_match,
 886 +               .name                   = "fxos8700_spi",
 887 +       },
 888 +};
 889 +module_spi_driver(fxos8700_spi_driver);
 890 +
 891 +MODULE_AUTHOR("Robert Jones <rjones@gateworks.com>");
 892 +MODULE_DESCRIPTION("FXOS8700 SPI driver");
 893 +MODULE_LICENSE("GPL v2");