target/linux/lantiq/files/arch/mips/boot/dts/lantiq/vr9_arcadyan_vg3503j.dts

   1 #include "vr9.dtsi"
   2
   3 #include <dt-bindings/input/input.h>
   4 #include <dt-bindings/mips/lantiq_rcu_gphy.h>
   5
   6 / {
   7         compatible = "arcadyan,vg3503j", "lantiq,xway", "lantiq,vr9";
   8         model = "BT OpenReach VDSL Modem";
   9
  10         chosen {
  11                 bootargs = "console=ttyLTQ0,115200";
  12         };
  13
  14         aliases {
  15                 led-boot = &power_green;
  16                 led-failsafe = &power_red;
  17                 led-running = &power_green;
  18                 led-upgrade = &power_green;
  19
  20                 led-dsl = &dsl;
  21         };
  22
  23         memory@0 {
  24                 device_type = "memory";
  25                 reg = <0x0 0x2000000>;
  26         };
  27
  28         keys {
  29                 compatible = "gpio-keys-polled";
  30                 poll-interval = <100>;
  31                 reset {
  32                         label = "reset";
  33                         gpios = <&gpio 6 GPIO_ACTIVE_LOW>;
  34                         linux,code = <KEY_RESTART>;
  35                 };
  36         };
  37
  38         leds {
  39                 compatible = "gpio-leds";
  40
  41                 power_red: power2 {
  42                         label = "red:power";
  43                         gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
  44                 };
  45                 dsl: dsl {
  46                         label = "green:dsl";
  47                         gpios = <&gpio 19 GPIO_ACTIVE_LOW>;
  48                 };
  49                 power_green: power {
  50                         label = "green:power";
  51                         gpios = <&gpio 28 GPIO_ACTIVE_LOW>;
  52                         default-state = "keep";
  53                 };
  54         };
  55 };
  56
  57 &eth0 {
  58         pinctrl-0 = <&mdio_pins>,
  59                     <&gphy0_led0_pins>, <&gphy0_led1_pins>, <&gphy0_led2_pins>,
  60                     <&gphy1_led0_pins>, <&gphy1_led1_pins>, <&gphy1_led2_pins>;
  61
  62         interface@0 {
  63                 compatible = "lantiq,xrx200-pdi";
  64                 #address-cells = <1>;
  65                 #size-cells = <0>;
  66                 reg = <0>;
  67
  68                 lantiq,switch;
  69                 ethernet@2 {
  70                         compatible = "lantiq,xrx200-pdi-port";
  71                         reg = <2>;
  72                         phy-mode = "mii";
  73                         phy-handle = <&phy11>;
  74                 };
  75                 ethernet@4 {
  76                         compatible = "lantiq,xrx200-pdi-port";
  77                         reg = <4>;
  78                         phy-mode = "mii";
  79                         phy-handle = <&phy13>;
  80                 };
  81         };
  82
  83         mdio {
  84                 #address-cells = <1>;
  85                 #size-cells = <0>;
  86                 compatible = "lantiq,xrx200-mdio";
  87
  88                 phy11: ethernet-phy@11 {
  89                         reg = <0x11>;
  90                         compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
  91                         lantiq,led1h = <0x70>;
  92                         lantiq,led1l = <0x00>;
  93                         lantiq,led2h = <0x00>;
  94                         lantiq,led2l = <0x03>;
  95                 };
  96                 phy13: ethernet-phy@13 {
  97                         reg = <0x13>;
  98                         compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
  99                         lantiq,led1h = <0x70>;
 100                         lantiq,led1l = <0x00>;
 101                         lantiq,led2h = <0x00>;
 102                         lantiq,led2l = <0x03>;
 103                 };
 104         };
 105 };
 106
 107 &gphy0 {
 108         lantiq,gphy-mode = <GPHY_MODE_GE>;
 109 };
 110
 111 &gphy1 {
 112         lantiq,gphy-mode = <GPHY_MODE_GE>;
 113 };
 114
 115 &localbus {
 116         flash@0 {
 117                 compatible = "lantiq,nor";
 118                 bank-width = <2>;
 119                 reg = <0 0x0 0x2000000>;
 120
 121                 partitions {
 122                         compatible = "fixed-partitions";
 123                         #address-cells = <1>;
 124                         #size-cells = <1>;
 125
 126                         partition@0 {
 127                                 label = "uboot";
 128                                 reg = <0x00000 0x20000>;
 129                         };
 130
 131                         partition@20000 {
 132                                 label = "firmware";
 133                                 reg = <0x20000 0x7d0000>;
 134                         };
 135
 136                         partition@7f0000 {
 137                                 label = "u-boot-env";
 138                                 reg = <0x7f0000 0x10000>;
 139                         };
 140                 };
 141         };
 142 };