c7e600aace204767d730d4ed17facab049228bd3
[openwrt/staging/wigyori.git] / target / linux / lantiq / files / arch / mips / boot / dts / lantiq / vr9_avm_fritz736x.dtsi
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2
3 #include "vr9.dtsi"
4
5 #include <dt-bindings/input/input.h>
6 #include <dt-bindings/mips/lantiq_rcu_gphy.h>
7
8 / {
9 compatible = "avm,fritz736x", "lantiq,xway", "lantiq,vr9";
10
11 chosen {
12 bootargs = "console=ttyLTQ0,115200";
13 };
14
15 aliases {
16 led-boot = &led_power_green;
17 led-failsafe = &led_power_red;
18 led-running = &led_power_green;
19 led-upgrade = &led_power_red;
20
21 led-dsl = &led_info_green;
22 led-wifi = &led_wifi;
23 };
24
25 memory@0 {
26 device_type = "memory";
27 reg = <0x0 0x8000000>;
28 };
29
30 keys {
31 compatible = "gpio-keys-polled";
32 poll-interval = <100>;
33
34 dect {
35 label = "dect";
36 gpios = <&gpio 1 GPIO_ACTIVE_HIGH>;
37 linux,code = <KEY_PHONE>;
38 };
39
40 wifi {
41 label = "wifi";
42 gpios = <&gpio 29 GPIO_ACTIVE_HIGH>;
43 linux,code = <KEY_RFKILL>;
44 };
45 };
46
47 leds: leds {
48 compatible = "gpio-leds";
49
50 led_power_green: power_green {
51 label = "green:power";
52 gpios = <&gpio 32 GPIO_ACTIVE_LOW>;
53 default-state = "keep";
54 };
55
56 led_power_red: power_red {
57 label = "red:power";
58 gpios = <&gpio 33 GPIO_ACTIVE_LOW>;
59 };
60
61 led_info_green: info_green {
62 label = "green:info";
63 gpios = <&gpio 47 GPIO_ACTIVE_LOW>;
64 };
65
66 led_wifi: wifi {
67 label = "green:wlan";
68 gpios = <&gpio 36 GPIO_ACTIVE_LOW>;
69 };
70
71 info_red {
72 label = "red:info";
73 gpios = <&gpio 34 GPIO_ACTIVE_LOW>;
74 };
75
76 dect {
77 label = "green:dect";
78 gpios = <&gpio 35 GPIO_ACTIVE_LOW>;
79 };
80 };
81 };
82
83 &eth0 {
84 interface@0 {
85 compatible = "lantiq,xrx200-pdi";
86 #address-cells = <1>;
87 #size-cells = <0>;
88 reg = <0>;
89 mtd-mac-address = <&urlader 0xa91>;
90 mtd-mac-address-increment = <(-2)>;
91 lantiq,switch;
92
93 ethernet@0 {
94 compatible = "lantiq,xrx200-pdi-port";
95 reg = <0>;
96 phy-mode = "rmii";
97 phy-handle = <&phy0>;
98 };
99
100 ethernet@1 {
101 compatible = "lantiq,xrx200-pdi-port";
102 reg = <1>;
103 phy-mode = "rmii";
104 phy-handle = <&phy1>;
105 };
106
107 ethernet@2 {
108 compatible = "lantiq,xrx200-pdi-port";
109 reg = <2>;
110 phy-mode = "gmii";
111 phy-handle = <&phy11>;
112 };
113
114 ethernet@4 {
115 compatible = "lantiq,xrx200-pdi-port";
116 reg = <4>;
117 phy-mode = "gmii";
118 phy-handle = <&phy13>;
119 };
120 };
121
122 mdio {
123 #address-cells = <1>;
124 #size-cells = <0>;
125 compatible = "lantiq,xrx200-mdio";
126
127 phy0: ethernet-phy@0 {
128 reg = <0x00>;
129 compatible = "ethernet-phy-ieee802.3-c22";
130 reset-gpios = <&gpio 37 GPIO_ACTIVE_LOW>;
131 };
132
133 phy1: ethernet-phy@1 {
134 reg = <0x01>;
135 compatible = "ethernet-phy-ieee802.3-c22";
136 reset-gpios = <&gpio 44 GPIO_ACTIVE_LOW>;
137 };
138
139 phy11: ethernet-phy@11 {
140 reg = <0x11>;
141 compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
142 };
143
144 phy13: ethernet-phy@13 {
145 reg = <0x13>;
146 compatible = "lantiq,phy11g", "ethernet-phy-ieee802.3-c22";
147 };
148 };
149 };
150
151 &gphy0 {
152 lantiq,gphy-mode = <GPHY_MODE_GE>;
153 };
154
155 &gphy1 {
156 lantiq,gphy-mode = <GPHY_MODE_GE>;
157 };
158
159 &gpio {
160 pinctrl-names = "default";
161 pinctrl-0 = <&state_default>;
162
163 state_default: pinmux {
164 phy-rst {
165 lantiq,pins = "io37", "io44";
166 lantiq,pull = <0>;
167 lantiq,open-drain;
168 lantiq,output = <1>;
169 };
170 };
171
172 };
173
174 &pcie0 {
175 status = "okay";
176
177 pcie@0 {
178 reg = <0 0 0 0 0>;
179 #interrupt-cells = <1>;
180 #size-cells = <1>;
181 #address-cells = <2>;
182 device_type = "pci";
183
184 wifi@168c,002e {
185 compatible = "pci168c,002e";
186 reg = <0 0 0 0 0>;
187 qca,no-eeprom; /* load from ath9k-eeprom-pci-0000:01:00.0.bin */
188 };
189 };
190 };
191
192 &usb_phy0 {
193 status = "okay";
194 };
195
196 &usb_phy1 {
197 status = "okay";
198 };
199
200 &usb0 {
201 status = "okay";
202 };
203
204 &usb1 {
205 status = "okay";
206 };