target/linux/lantiq/patches-5.10/0024-MIPS-lantiq-revert-DSA-switch-driver-PMU-clock-chang.patch

   1 From d0ee51bbb7ce9880749a3d4794ec1fbbcda0f381 Mon Sep 17 00:00:00 2001
   2 From: Mathias Kresin <dev@kresin.me>
   3 Date: Sun, 7 Jul 2019 21:45:51 +0200
   4 Subject: [PATCH] MIPS: lantiq revert DSA switch driver PMU/clock changes
   5
   6 Switch back to the former used names, to make the legacy switch driver
   7 happy.
   8
   9 Signed-off-by: Mathias Kresin <dev@kresin.me>
  10 ---
  11  arch/mips/lantiq/xway/sysctrl.c | 18 +++++++++---------
  12  1 file changed, 9 insertions(+), 9 deletions(-)
  13
  14 --- a/arch/mips/lantiq/xway/sysctrl.c
  15 +++ b/arch/mips/lantiq/xway/sysctrl.c
  16 @@ -469,9 +469,9 @@ void __init ltq_soc_init(void)
  17
  18         if (of_machine_is_compatible("lantiq,grx390") ||
  19             of_machine_is_compatible("lantiq,ar10")) {
  20 -               clkdev_add_pmu("1e108000.switch", "gphy0", 0, 0, PMU_GPHY0);
  21 -               clkdev_add_pmu("1e108000.switch", "gphy1", 0, 0, PMU_GPHY1);
  22 -               clkdev_add_pmu("1e108000.switch", "gphy2", 0, 0, PMU_GPHY2);
  23 +               clkdev_add_pmu("1f203020.gphy", NULL, 1, 0, PMU_GPHY0);
  24 +               clkdev_add_pmu("1f203068.gphy", NULL, 1, 0, PMU_GPHY1);
  25 +               clkdev_add_pmu("1f2030ac.gphy", NULL, 1, 0, PMU_GPHY2);
  26                 clkdev_add_pmu("1f203018.usb2-phy", "phy", 1, 2, PMU_ANALOG_USB0_P);
  27                 clkdev_add_pmu("1f203034.usb2-phy", "phy", 1, 2, PMU_ANALOG_USB1_P);
  28                 /* rc 0 */
  29 @@ -503,7 +503,7 @@ void __init ltq_soc_init(void)
  30         } else if (of_machine_is_compatible("lantiq,grx390")) {
  31                 clkdev_add_static(ltq_grx390_cpu_hz(), ltq_grx390_fpi_hz(),
  32                                   ltq_grx390_fpi_hz(), ltq_grx390_pp32_hz());
  33 -               clkdev_add_pmu("1e108000.switch", "gphy3", 0, 0, PMU_GPHY3);
  34 +               clkdev_add_pmu("1f203264.gphy", NULL, 1, 0, PMU_GPHY3);
  35                 clkdev_add_pmu("1e101000.usb", "otg", 1, 0, PMU_USB0);
  36                 clkdev_add_pmu("1e106000.usb", "otg", 1, 0, PMU_USB1);
  37                 /* rc 2 */
  38 @@ -511,7 +511,7 @@ void __init ltq_soc_init(void)
  39                 clkdev_add_pmu("1a800000.pcie", "msi", 1, 1, PMU1_PCIE2_MSI);
  40                 clkdev_add_pmu("1f106a00.pcie", "pdi", 1, 1, PMU1_PCIE2_PDI);
  41                 clkdev_add_pmu("1a800000.pcie", "ctl", 1, 1, PMU1_PCIE2_CTL);
  42 -               clkdev_add_pmu("1e10b308.eth", NULL, 0, 0, PMU_SWITCH | PMU_PPE_DP);
  43 +               clkdev_add_pmu("1e108000.eth", NULL, 0, 0, PMU_SWITCH | PMU_PPE_DP);
  44                 clkdev_add_pmu("1da00000.usif", "NULL", 1, 0, PMU_USIF);
  45                 clkdev_add_pmu("1e103100.deu", NULL, 1, 0, PMU_DEU);
  46         } else if (of_machine_is_compatible("lantiq,ar10")) {
  47 @@ -519,7 +519,7 @@ void __init ltq_soc_init(void)
  48                                   ltq_ar10_fpi_hz(), ltq_ar10_pp32_hz());
  49                 clkdev_add_pmu("1e101000.usb", "otg", 1, 0, PMU_USB0);
  50                 clkdev_add_pmu("1e106000.usb", "otg", 1, 0, PMU_USB1);
  51 -               clkdev_add_pmu("1e10b308.eth", NULL, 0, 0, PMU_SWITCH |
  52 +               clkdev_add_pmu("1e108000.eth", NULL, 0, 0, PMU_SWITCH |
  53                                PMU_PPE_DP | PMU_PPE_TC);
  54                 clkdev_add_pmu("1da00000.usif", "NULL", 1, 0, PMU_USIF);
  55                 clkdev_add_pmu("1e103100.deu", NULL, 1, 0, PMU_DEU);
  56 @@ -540,12 +540,12 @@ void __init ltq_soc_init(void)
  57                 clkdev_add_pmu(NULL, "ahb", 1, 0, PMU_AHBM | PMU_AHBS);
  58
  59                 clkdev_add_pmu("1da00000.usif", "NULL", 1, 0, PMU_USIF);
  60 -               clkdev_add_pmu("1e10b308.eth", NULL, 0, 0,
  61 +               clkdev_add_pmu("1e108000.eth", NULL, 0, 0,
  62                                 PMU_SWITCH | PMU_PPE_DPLUS | PMU_PPE_DPLUM |
  63                                 PMU_PPE_EMA | PMU_PPE_TC | PMU_PPE_SLL01 |
  64                                 PMU_PPE_QSB | PMU_PPE_TOP);
  65 -               clkdev_add_pmu("1e108000.switch", "gphy0", 0, 0, PMU_GPHY);
  66 -               clkdev_add_pmu("1e108000.switch", "gphy1", 0, 0, PMU_GPHY);
  67 +               clkdev_add_pmu("1f203020.gphy", NULL, 0, 0, PMU_GPHY);
  68 +               clkdev_add_pmu("1f203068.gphy", NULL, 0, 0, PMU_GPHY);
  69                 clkdev_add_pmu("1e103000.sdio", NULL, 1, 0, PMU_SDIO);
  70                 clkdev_add_pmu("1e103100.deu", NULL, 1, 0, PMU_DEU);
  71                 clkdev_add_pmu("1e116000.mei", "dfe", 1, 0, PMU_DFE);