3b3ffe964710183776a8a39602a2a0d489190fb3
[openwrt/staging/wigyori.git] / target / linux / layerscape / patches-4.14 / 705-dpaa2-rtc-support-layerscape.patch
1 From 802238feea29ddfb765fc0c162e0de34920cd58d Mon Sep 17 00:00:00 2001
2 From: Biwen Li <biwen.li@nxp.com>
3 Date: Wed, 17 Apr 2019 18:58:31 +0800
4 Subject: [PATCH] dpaa2-rtc: support layerscape
5
6 This is an integrated patch of dpaa2-rtc for layerscape
7
8 Signed-off-by: Biwen Li <biwen.li@nxp.com>
9 Signed-off-by: Catalin Horghidan <catalin.horghidan@nxp.com>
10 Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
11 Signed-off-by: Yangbo Lu <yangbo.lu@nxp.com>
12 ---
13 drivers/staging/fsl-dpaa2/rtc/Makefile | 10 +
14 drivers/staging/fsl-dpaa2/rtc/dprtc-cmd.h | 160 +++++
15 drivers/staging/fsl-dpaa2/rtc/dprtc.c | 746 ++++++++++++++++++++++
16 drivers/staging/fsl-dpaa2/rtc/dprtc.h | 172 +++++
17 drivers/staging/fsl-dpaa2/rtc/rtc.c | 240 +++++++
18 drivers/staging/fsl-dpaa2/rtc/rtc.h | 14 +
19 6 files changed, 1342 insertions(+)
20 create mode 100644 drivers/staging/fsl-dpaa2/rtc/Makefile
21 create mode 100644 drivers/staging/fsl-dpaa2/rtc/dprtc-cmd.h
22 create mode 100644 drivers/staging/fsl-dpaa2/rtc/dprtc.c
23 create mode 100644 drivers/staging/fsl-dpaa2/rtc/dprtc.h
24 create mode 100644 drivers/staging/fsl-dpaa2/rtc/rtc.c
25 create mode 100644 drivers/staging/fsl-dpaa2/rtc/rtc.h
26
27 --- /dev/null
28 +++ b/drivers/staging/fsl-dpaa2/rtc/Makefile
29 @@ -0,0 +1,10 @@
30 +
31 +obj-$(CONFIG_FSL_DPAA2_PTP_CLOCK) += dpaa2-rtc.o
32 +
33 +dpaa2-rtc-objs := rtc.o dprtc.o
34 +
35 +all:
36 + make -C /lib/modules/$(shell uname -r)/build M=$(PWD) modules
37 +
38 +clean:
39 + make -C /lib/modules/$(shell uname -r)/build M=$(PWD) clean
40 --- /dev/null
41 +++ b/drivers/staging/fsl-dpaa2/rtc/dprtc-cmd.h
42 @@ -0,0 +1,160 @@
43 +/* Copyright 2013-2016 Freescale Semiconductor Inc.
44 + *
45 + * Redistribution and use in source and binary forms, with or without
46 + * modification, are permitted provided that the following conditions are met:
47 + * * Redistributions of source code must retain the above copyright
48 + * notice, this list of conditions and the following disclaimer.
49 + * * Redistributions in binary form must reproduce the above copyright
50 + * notice, this list of conditions and the following disclaimer in the
51 + * documentation and/or other materials provided with the distribution.
52 + * * Neither the name of the above-listed copyright holders nor the
53 + * names of any contributors may be used to endorse or promote products
54 + * derived from this software without specific prior written permission.
55 + *
56 + *
57 + * ALTERNATIVELY, this software may be distributed under the terms of the
58 + * GNU General Public License ("GPL") as published by the Free Software
59 + * Foundation, either version 2 of that License or (at your option) any
60 + * later version.
61 + *
62 + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
63 + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
64 + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
65 + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
66 + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
67 + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
68 + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
69 + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
70 + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
71 + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
72 + * POSSIBILITY OF SUCH DAMAGE.
73 + */
74 +#ifndef _FSL_DPRTC_CMD_H
75 +#define _FSL_DPRTC_CMD_H
76 +
77 +/* DPRTC Version */
78 +#define DPRTC_VER_MAJOR 2
79 +#define DPRTC_VER_MINOR 0
80 +
81 +/* Command versioning */
82 +#define DPRTC_CMD_BASE_VERSION 1
83 +#define DPRTC_CMD_ID_OFFSET 4
84 +
85 +#define DPRTC_CMD(id) (((id) << DPRTC_CMD_ID_OFFSET) | DPRTC_CMD_BASE_VERSION)
86 +
87 +/* Command IDs */
88 +#define DPRTC_CMDID_CLOSE DPRTC_CMD(0x800)
89 +#define DPRTC_CMDID_OPEN DPRTC_CMD(0x810)
90 +#define DPRTC_CMDID_CREATE DPRTC_CMD(0x910)
91 +#define DPRTC_CMDID_DESTROY DPRTC_CMD(0x990)
92 +#define DPRTC_CMDID_GET_API_VERSION DPRTC_CMD(0xa10)
93 +
94 +#define DPRTC_CMDID_ENABLE DPRTC_CMD(0x002)
95 +#define DPRTC_CMDID_DISABLE DPRTC_CMD(0x003)
96 +#define DPRTC_CMDID_GET_ATTR DPRTC_CMD(0x004)
97 +#define DPRTC_CMDID_RESET DPRTC_CMD(0x005)
98 +#define DPRTC_CMDID_IS_ENABLED DPRTC_CMD(0x006)
99 +
100 +#define DPRTC_CMDID_SET_IRQ_ENABLE DPRTC_CMD(0x012)
101 +#define DPRTC_CMDID_GET_IRQ_ENABLE DPRTC_CMD(0x013)
102 +#define DPRTC_CMDID_SET_IRQ_MASK DPRTC_CMD(0x014)
103 +#define DPRTC_CMDID_GET_IRQ_MASK DPRTC_CMD(0x015)
104 +#define DPRTC_CMDID_GET_IRQ_STATUS DPRTC_CMD(0x016)
105 +#define DPRTC_CMDID_CLEAR_IRQ_STATUS DPRTC_CMD(0x017)
106 +
107 +#define DPRTC_CMDID_SET_CLOCK_OFFSET DPRTC_CMD(0x1d0)
108 +#define DPRTC_CMDID_SET_FREQ_COMPENSATION DPRTC_CMD(0x1d1)
109 +#define DPRTC_CMDID_GET_FREQ_COMPENSATION DPRTC_CMD(0x1d2)
110 +#define DPRTC_CMDID_GET_TIME DPRTC_CMD(0x1d3)
111 +#define DPRTC_CMDID_SET_TIME DPRTC_CMD(0x1d4)
112 +#define DPRTC_CMDID_SET_ALARM DPRTC_CMD(0x1d5)
113 +#define DPRTC_CMDID_SET_PERIODIC_PULSE DPRTC_CMD(0x1d6)
114 +#define DPRTC_CMDID_CLEAR_PERIODIC_PULSE DPRTC_CMD(0x1d7)
115 +#define DPRTC_CMDID_SET_EXT_TRIGGER DPRTC_CMD(0x1d8)
116 +#define DPRTC_CMDID_CLEAR_EXT_TRIGGER DPRTC_CMD(0x1d9)
117 +#define DPRTC_CMDID_GET_EXT_TRIGGER_TIMESTAMP DPRTC_CMD(0x1dA)
118 +
119 +/* Macros for accessing command fields smaller than 1byte */
120 +#define DPRTC_MASK(field) \
121 + GENMASK(DPRTC_##field##_SHIFT + DPRTC_##field##_SIZE - 1, \
122 + DPRTC_##field##_SHIFT)
123 +#define dprtc_get_field(var, field) \
124 + (((var) & DPRTC_MASK(field)) >> DPRTC_##field##_SHIFT)
125 +
126 +#pragma pack(push, 1)
127 +struct dprtc_cmd_open {
128 + uint32_t dprtc_id;
129 +};
130 +
131 +struct dprtc_cmd_destroy {
132 + uint32_t object_id;
133 +};
134 +
135 +#define DPRTC_ENABLE_SHIFT 0
136 +#define DPRTC_ENABLE_SIZE 1
137 +
138 +struct dprtc_rsp_is_enabled {
139 + uint8_t en;
140 +};
141 +
142 +struct dprtc_cmd_get_irq {
143 + uint32_t pad;
144 + uint8_t irq_index;
145 +};
146 +
147 +struct dprtc_cmd_set_irq_enable {
148 + uint8_t en;
149 + uint8_t pad[3];
150 + uint8_t irq_index;
151 +};
152 +
153 +struct dprtc_rsp_get_irq_enable {
154 + uint8_t en;
155 +};
156 +
157 +struct dprtc_cmd_set_irq_mask {
158 + uint32_t mask;
159 + uint8_t irq_index;
160 +};
161 +
162 +struct dprtc_rsp_get_irq_mask {
163 + uint32_t mask;
164 +};
165 +
166 +struct dprtc_cmd_get_irq_status {
167 + uint32_t status;
168 + uint8_t irq_index;
169 +};
170 +
171 +struct dprtc_rsp_get_irq_status {
172 + uint32_t status;
173 +};
174 +
175 +struct dprtc_cmd_clear_irq_status {
176 + uint32_t status;
177 + uint8_t irq_index;
178 +};
179 +
180 +struct dprtc_rsp_get_attributes {
181 + uint32_t pad;
182 + uint32_t id;
183 +};
184 +
185 +struct dprtc_cmd_set_clock_offset {
186 + uint64_t offset;
187 +};
188 +
189 +struct dprtc_get_freq_compensation {
190 + uint32_t freq_compensation;
191 +};
192 +
193 +struct dprtc_time {
194 + uint64_t time;
195 +};
196 +
197 +struct dprtc_rsp_get_api_version {
198 + uint16_t major;
199 + uint16_t minor;
200 +};
201 +#pragma pack(pop)
202 +#endif /* _FSL_DPRTC_CMD_H */
203 --- /dev/null
204 +++ b/drivers/staging/fsl-dpaa2/rtc/dprtc.c
205 @@ -0,0 +1,746 @@
206 +/* Copyright 2013-2016 Freescale Semiconductor Inc.
207 + *
208 + * Redistribution and use in source and binary forms, with or without
209 + * modification, are permitted provided that the following conditions are met:
210 + * * Redistributions of source code must retain the above copyright
211 + * notice, this list of conditions and the following disclaimer.
212 + * * Redistributions in binary form must reproduce the above copyright
213 + * notice, this list of conditions and the following disclaimer in the
214 + * documentation and/or other materials provided with the distribution.
215 + * * Neither the name of the above-listed copyright holders nor the
216 + * names of any contributors may be used to endorse or promote products
217 + * derived from this software without specific prior written permission.
218 + *
219 + *
220 + * ALTERNATIVELY, this software may be distributed under the terms of the
221 + * GNU General Public License ("GPL") as published by the Free Software
222 + * Foundation, either version 2 of that License or (at your option) any
223 + * later version.
224 + *
225 + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
226 + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
227 + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
228 + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
229 + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
230 + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
231 + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
232 + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
233 + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
234 + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
235 + * POSSIBILITY OF SUCH DAMAGE.
236 + */
237 +#include <linux/fsl/mc.h>
238 +
239 +#include "dprtc.h"
240 +#include "dprtc-cmd.h"
241 +
242 +/**
243 + * dprtc_open() - Open a control session for the specified object.
244 + * @mc_io: Pointer to MC portal's I/O object
245 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
246 + * @dprtc_id: DPRTC unique ID
247 + * @token: Returned token; use in subsequent API calls
248 + *
249 + * This function can be used to open a control session for an
250 + * already created object; an object may have been declared in
251 + * the DPL or by calling the dprtc_create function.
252 + * This function returns a unique authentication token,
253 + * associated with the specific object ID and the specific MC
254 + * portal; this token must be used in all subsequent commands for
255 + * this specific object
256 + *
257 + * Return: '0' on Success; Error code otherwise.
258 + */
259 +int dprtc_open(struct fsl_mc_io *mc_io,
260 + uint32_t cmd_flags,
261 + int dprtc_id,
262 + uint16_t *token)
263 +{
264 + struct dprtc_cmd_open *cmd_params;
265 + struct fsl_mc_command cmd = { 0 };
266 + int err;
267 +
268 + /* prepare command */
269 + cmd.header = mc_encode_cmd_header(DPRTC_CMDID_OPEN,
270 + cmd_flags,
271 + 0);
272 + cmd_params = (struct dprtc_cmd_open *)cmd.params;
273 + cmd_params->dprtc_id = cpu_to_le32(dprtc_id);
274 +
275 + /* send command to mc*/
276 + err = mc_send_command(mc_io, &cmd);
277 + if (err)
278 + return err;
279 +
280 + /* retrieve response parameters */
281 + *token = mc_cmd_hdr_read_token(&cmd);
282 +
283 + return err;
284 +}
285 +
286 +/**
287 + * dprtc_close() - Close the control session of the object
288 + * @mc_io: Pointer to MC portal's I/O object
289 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
290 + * @token: Token of DPRTC object
291 + *
292 + * After this function is called, no further operations are
293 + * allowed on the object without opening a new control session.
294 + *
295 + * Return: '0' on Success; Error code otherwise.
296 + */
297 +int dprtc_close(struct fsl_mc_io *mc_io,
298 + uint32_t cmd_flags,
299 + uint16_t token)
300 +{
301 + struct fsl_mc_command cmd = { 0 };
302 +
303 + /* prepare command */
304 + cmd.header = mc_encode_cmd_header(DPRTC_CMDID_CLOSE, cmd_flags,
305 + token);
306 +
307 + /* send command to mc*/
308 + return mc_send_command(mc_io, &cmd);
309 +}
310 +
311 +/**
312 + * dprtc_create() - Create the DPRTC object.
313 + * @mc_io: Pointer to MC portal's I/O object
314 + * @dprc_token: Parent container token; '0' for default container
315 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
316 + * @cfg: Configuration structure
317 + * @obj_id: Returned object id
318 + *
319 + * Create the DPRTC object, allocate required resources and
320 + * perform required initialization.
321 + *
322 + * The function accepts an authentication token of a parent
323 + * container that this object should be assigned to. The token
324 + * can be '0' so the object will be assigned to the default container.
325 + * The newly created object can be opened with the returned
326 + * object id and using the container's associated tokens and MC portals.
327 + *
328 + * Return: '0' on Success; Error code otherwise.
329 + */
330 +int dprtc_create(struct fsl_mc_io *mc_io,
331 + uint16_t dprc_token,
332 + uint32_t cmd_flags,
333 + const struct dprtc_cfg *cfg,
334 + uint32_t *obj_id)
335 +{
336 + struct fsl_mc_command cmd = { 0 };
337 + int err;
338 +
339 + (void)(cfg); /* unused */
340 +
341 + /* prepare command */
342 + cmd.header = mc_encode_cmd_header(DPRTC_CMDID_CREATE,
343 + cmd_flags,
344 + dprc_token);
345 +
346 + /* send command to mc*/
347 + err = mc_send_command(mc_io, &cmd);
348 + if (err)
349 + return err;
350 +
351 + /* retrieve response parameters */
352 + *obj_id = mc_cmd_read_object_id(&cmd);
353 +
354 + return 0;
355 +}
356 +
357 +/**
358 + * dprtc_destroy() - Destroy the DPRTC object and release all its resources.
359 + * @mc_io: Pointer to MC portal's I/O object
360 + * @dprc_token: Parent container token; '0' for default container
361 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
362 + * @object_id: The object id; it must be a valid id within the container that
363 + * created this object;
364 + *
365 + * The function accepts the authentication token of the parent container that
366 + * created the object (not the one that currently owns the object). The object
367 + * is searched within parent using the provided 'object_id'.
368 + * All tokens to the object must be closed before calling destroy.
369 + *
370 + * Return: '0' on Success; error code otherwise.
371 + */
372 +int dprtc_destroy(struct fsl_mc_io *mc_io,
373 + uint16_t dprc_token,
374 + uint32_t cmd_flags,
375 + uint32_t object_id)
376 +{
377 + struct dprtc_cmd_destroy *cmd_params;
378 + struct fsl_mc_command cmd = { 0 };
379 +
380 + /* prepare command */
381 + cmd.header = mc_encode_cmd_header(DPRTC_CMDID_DESTROY,
382 + cmd_flags,
383 + dprc_token);
384 + cmd_params = (struct dprtc_cmd_destroy *)cmd.params;
385 + cmd_params->object_id = cpu_to_le32(object_id);
386 +
387 + /* send command to mc*/
388 + return mc_send_command(mc_io, &cmd);
389 +}
390 +
391 +int dprtc_enable(struct fsl_mc_io *mc_io,
392 + uint32_t cmd_flags,
393 + uint16_t token)
394 +{
395 + struct fsl_mc_command cmd = { 0 };
396 +
397 + /* prepare command */
398 + cmd.header = mc_encode_cmd_header(DPRTC_CMDID_ENABLE, cmd_flags,
399 + token);
400 +
401 + /* send command to mc*/
402 + return mc_send_command(mc_io, &cmd);
403 +}
404 +
405 +int dprtc_disable(struct fsl_mc_io *mc_io,
406 + uint32_t cmd_flags,
407 + uint16_t token)
408 +{
409 + struct fsl_mc_command cmd = { 0 };
410 +
411 + /* prepare command */
412 + cmd.header = mc_encode_cmd_header(DPRTC_CMDID_DISABLE,
413 + cmd_flags,
414 + token);
415 +
416 + /* send command to mc*/
417 + return mc_send_command(mc_io, &cmd);
418 +}
419 +
420 +int dprtc_is_enabled(struct fsl_mc_io *mc_io,
421 + uint32_t cmd_flags,
422 + uint16_t token,
423 + int *en)
424 +{
425 + struct dprtc_rsp_is_enabled *rsp_params;
426 + struct fsl_mc_command cmd = { 0 };
427 + int err;
428 +
429 + /* prepare command */
430 + cmd.header = mc_encode_cmd_header(DPRTC_CMDID_IS_ENABLED, cmd_flags,
431 + token);
432 +
433 + /* send command to mc*/
434 + err = mc_send_command(mc_io, &cmd);
435 + if (err)
436 + return err;
437 +
438 + /* retrieve response parameters */
439 + rsp_params = (struct dprtc_rsp_is_enabled *)cmd.params;
440 + *en = dprtc_get_field(rsp_params->en, ENABLE);
441 +
442 + return 0;
443 +}
444 +
445 +int dprtc_reset(struct fsl_mc_io *mc_io,
446 + uint32_t cmd_flags,
447 + uint16_t token)
448 +{
449 + struct fsl_mc_command cmd = { 0 };
450 +
451 + /* prepare command */
452 + cmd.header = mc_encode_cmd_header(DPRTC_CMDID_RESET,
453 + cmd_flags,
454 + token);
455 +
456 + /* send command to mc*/
457 + return mc_send_command(mc_io, &cmd);
458 +}
459 +
460 +/**
461 + * dprtc_set_irq_enable() - Set overall interrupt state.
462 + * @mc_io: Pointer to MC portal's I/O object
463 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
464 + * @token: Token of DPRTC object
465 + * @irq_index: The interrupt index to configure
466 + * @en: Interrupt state - enable = 1, disable = 0
467 + *
468 + * Allows GPP software to control when interrupts are generated.
469 + * Each interrupt can have up to 32 causes. The enable/disable control's the
470 + * overall interrupt state. if the interrupt is disabled no causes will cause
471 + * an interrupt.
472 + *
473 + * Return: '0' on Success; Error code otherwise.
474 + */
475 +int dprtc_set_irq_enable(struct fsl_mc_io *mc_io,
476 + uint32_t cmd_flags,
477 + uint16_t token,
478 + uint8_t irq_index,
479 + uint8_t en)
480 +{
481 + struct dprtc_cmd_set_irq_enable *cmd_params;
482 + struct fsl_mc_command cmd = { 0 };
483 +
484 + /* prepare command */
485 + cmd.header = mc_encode_cmd_header(DPRTC_CMDID_SET_IRQ_ENABLE,
486 + cmd_flags,
487 + token);
488 + cmd_params = (struct dprtc_cmd_set_irq_enable *)cmd.params;
489 + cmd_params->irq_index = irq_index;
490 + cmd_params->en = en;
491 +
492 + /* send command to mc*/
493 + return mc_send_command(mc_io, &cmd);
494 +}
495 +
496 +/**
497 + * dprtc_get_irq_enable() - Get overall interrupt state
498 + * @mc_io: Pointer to MC portal's I/O object
499 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
500 + * @token: Token of DPRTC object
501 + * @irq_index: The interrupt index to configure
502 + * @en: Returned interrupt state - enable = 1, disable = 0
503 + *
504 + * Return: '0' on Success; Error code otherwise.
505 + */
506 +int dprtc_get_irq_enable(struct fsl_mc_io *mc_io,
507 + uint32_t cmd_flags,
508 + uint16_t token,
509 + uint8_t irq_index,
510 + uint8_t *en)
511 +{
512 + struct dprtc_rsp_get_irq_enable *rsp_params;
513 + struct dprtc_cmd_get_irq *cmd_params;
514 + struct fsl_mc_command cmd = { 0 };
515 + int err;
516 +
517 + /* prepare command */
518 + cmd.header = mc_encode_cmd_header(DPRTC_CMDID_GET_IRQ_ENABLE,
519 + cmd_flags,
520 + token);
521 + cmd_params = (struct dprtc_cmd_get_irq *)cmd.params;
522 + cmd_params->irq_index = irq_index;
523 +
524 + /* send command to mc*/
525 + err = mc_send_command(mc_io, &cmd);
526 + if (err)
527 + return err;
528 +
529 + /* retrieve response parameters */
530 + rsp_params = (struct dprtc_rsp_get_irq_enable *)cmd.params;
531 + *en = rsp_params->en;
532 +
533 + return 0;
534 +}
535 +
536 +/**
537 + * dprtc_set_irq_mask() - Set interrupt mask.
538 + * @mc_io: Pointer to MC portal's I/O object
539 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
540 + * @token: Token of DPRTC object
541 + * @irq_index: The interrupt index to configure
542 + * @mask: Event mask to trigger interrupt;
543 + * each bit:
544 + * 0 = ignore event
545 + * 1 = consider event for asserting IRQ
546 + *
547 + * Every interrupt can have up to 32 causes and the interrupt model supports
548 + * masking/unmasking each cause independently
549 + *
550 + * Return: '0' on Success; Error code otherwise.
551 + */
552 +int dprtc_set_irq_mask(struct fsl_mc_io *mc_io,
553 + uint32_t cmd_flags,
554 + uint16_t token,
555 + uint8_t irq_index,
556 + uint32_t mask)
557 +{
558 + struct dprtc_cmd_set_irq_mask *cmd_params;
559 + struct fsl_mc_command cmd = { 0 };
560 +
561 + /* prepare command */
562 + cmd.header = mc_encode_cmd_header(DPRTC_CMDID_SET_IRQ_MASK,
563 + cmd_flags,
564 + token);
565 + cmd_params = (struct dprtc_cmd_set_irq_mask *)cmd.params;
566 + cmd_params->mask = cpu_to_le32(mask);
567 + cmd_params->irq_index = irq_index;
568 +
569 + /* send command to mc*/
570 + return mc_send_command(mc_io, &cmd);
571 +}
572 +
573 +/**
574 + * dprtc_get_irq_mask() - Get interrupt mask.
575 + * @mc_io: Pointer to MC portal's I/O object
576 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
577 + * @token: Token of DPRTC object
578 + * @irq_index: The interrupt index to configure
579 + * @mask: Returned event mask to trigger interrupt
580 + *
581 + * Every interrupt can have up to 32 causes and the interrupt model supports
582 + * masking/unmasking each cause independently
583 + *
584 + * Return: '0' on Success; Error code otherwise.
585 + */
586 +int dprtc_get_irq_mask(struct fsl_mc_io *mc_io,
587 + uint32_t cmd_flags,
588 + uint16_t token,
589 + uint8_t irq_index,
590 + uint32_t *mask)
591 +{
592 + struct dprtc_rsp_get_irq_mask *rsp_params;
593 + struct dprtc_cmd_get_irq *cmd_params;
594 + struct fsl_mc_command cmd = { 0 };
595 + int err;
596 +
597 + /* prepare command */
598 + cmd.header = mc_encode_cmd_header(DPRTC_CMDID_GET_IRQ_MASK,
599 + cmd_flags,
600 + token);
601 + cmd_params = (struct dprtc_cmd_get_irq *)cmd.params;
602 + cmd_params->irq_index = irq_index;
603 +
604 + /* send command to mc*/
605 + err = mc_send_command(mc_io, &cmd);
606 + if (err)
607 + return err;
608 +
609 + /* retrieve response parameters */
610 + rsp_params = (struct dprtc_rsp_get_irq_mask *)cmd.params;
611 + *mask = le32_to_cpu(rsp_params->mask);
612 +
613 + return 0;
614 +}
615 +
616 +/**
617 + * dprtc_get_irq_status() - Get the current status of any pending interrupts.
618 + *
619 + * @mc_io: Pointer to MC portal's I/O object
620 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
621 + * @token: Token of DPRTC object
622 + * @irq_index: The interrupt index to configure
623 + * @status: Returned interrupts status - one bit per cause:
624 + * 0 = no interrupt pending
625 + * 1 = interrupt pending
626 + *
627 + * Return: '0' on Success; Error code otherwise.
628 + */
629 +int dprtc_get_irq_status(struct fsl_mc_io *mc_io,
630 + uint32_t cmd_flags,
631 + uint16_t token,
632 + uint8_t irq_index,
633 + uint32_t *status)
634 +{
635 + struct dprtc_cmd_get_irq_status *cmd_params;
636 + struct dprtc_rsp_get_irq_status *rsp_params;
637 + struct fsl_mc_command cmd = { 0 };
638 + int err;
639 +
640 + /* prepare command */
641 + cmd.header = mc_encode_cmd_header(DPRTC_CMDID_GET_IRQ_STATUS,
642 + cmd_flags,
643 + token);
644 + cmd_params = (struct dprtc_cmd_get_irq_status *)cmd.params;
645 + cmd_params->status = cpu_to_le32(*status);
646 + cmd_params->irq_index = irq_index;
647 +
648 + /* send command to mc*/
649 + err = mc_send_command(mc_io, &cmd);
650 + if (err)
651 + return err;
652 +
653 + /* retrieve response parameters */
654 + rsp_params = (struct dprtc_rsp_get_irq_status *)cmd.params;
655 + *status = rsp_params->status;
656 +
657 + return 0;
658 +}
659 +
660 +/**
661 + * dprtc_clear_irq_status() - Clear a pending interrupt's status
662 + *
663 + * @mc_io: Pointer to MC portal's I/O object
664 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
665 + * @token: Token of DPRTC object
666 + * @irq_index: The interrupt index to configure
667 + * @status: Bits to clear (W1C) - one bit per cause:
668 + * 0 = don't change
669 + * 1 = clear status bit
670 + *
671 + * Return: '0' on Success; Error code otherwise.
672 + */
673 +int dprtc_clear_irq_status(struct fsl_mc_io *mc_io,
674 + uint32_t cmd_flags,
675 + uint16_t token,
676 + uint8_t irq_index,
677 + uint32_t status)
678 +{
679 + struct dprtc_cmd_clear_irq_status *cmd_params;
680 + struct fsl_mc_command cmd = { 0 };
681 +
682 + /* prepare command */
683 + cmd.header = mc_encode_cmd_header(DPRTC_CMDID_CLEAR_IRQ_STATUS,
684 + cmd_flags,
685 + token);
686 + cmd_params = (struct dprtc_cmd_clear_irq_status *)cmd.params;
687 + cmd_params->irq_index = irq_index;
688 + cmd_params->status = cpu_to_le32(status);
689 +
690 + /* send command to mc*/
691 + return mc_send_command(mc_io, &cmd);
692 +}
693 +
694 +/**
695 + * dprtc_get_attributes - Retrieve DPRTC attributes.
696 + *
697 + * @mc_io: Pointer to MC portal's I/O object
698 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
699 + * @token: Token of DPRTC object
700 + * @attr: Returned object's attributes
701 + *
702 + * Return: '0' on Success; Error code otherwise.
703 + */
704 +int dprtc_get_attributes(struct fsl_mc_io *mc_io,
705 + uint32_t cmd_flags,
706 + uint16_t token,
707 + struct dprtc_attr *attr)
708 +{
709 + struct dprtc_rsp_get_attributes *rsp_params;
710 + struct fsl_mc_command cmd = { 0 };
711 + int err;
712 +
713 + /* prepare command */
714 + cmd.header = mc_encode_cmd_header(DPRTC_CMDID_GET_ATTR,
715 + cmd_flags,
716 + token);
717 +
718 + /* send command to mc*/
719 + err = mc_send_command(mc_io, &cmd);
720 + if (err)
721 + return err;
722 +
723 + /* retrieve response parameters */
724 + rsp_params = (struct dprtc_rsp_get_attributes *)cmd.params;
725 + attr->id = le32_to_cpu(rsp_params->id);
726 +
727 + return 0;
728 +}
729 +
730 +/**
731 + * dprtc_set_clock_offset() - Sets the clock's offset
732 + * (usually relative to another clock).
733 + *
734 + * @mc_io: Pointer to MC portal's I/O object
735 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
736 + * @token: Token of DPRTC object
737 + * @offset: New clock offset (in nanoseconds).
738 + *
739 + * Return: '0' on Success; Error code otherwise.
740 + */
741 +int dprtc_set_clock_offset(struct fsl_mc_io *mc_io,
742 + uint32_t cmd_flags,
743 + uint16_t token,
744 + int64_t offset)
745 +{
746 + struct dprtc_cmd_set_clock_offset *cmd_params;
747 + struct fsl_mc_command cmd = { 0 };
748 +
749 + /* prepare command */
750 + cmd.header = mc_encode_cmd_header(DPRTC_CMDID_SET_CLOCK_OFFSET,
751 + cmd_flags,
752 + token);
753 + cmd_params = (struct dprtc_cmd_set_clock_offset *)cmd.params;
754 + cmd_params->offset = cpu_to_le64(offset);
755 +
756 + /* send command to mc*/
757 + return mc_send_command(mc_io, &cmd);
758 +}
759 +
760 +/**
761 + * dprtc_set_freq_compensation() - Sets a new frequency compensation value.
762 + *
763 + * @mc_io: Pointer to MC portal's I/O object
764 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
765 + * @token: Token of DPRTC object
766 + * @freq_compensation: The new frequency compensation value to set.
767 + *
768 + * Return: '0' on Success; Error code otherwise.
769 + */
770 +int dprtc_set_freq_compensation(struct fsl_mc_io *mc_io,
771 + uint32_t cmd_flags,
772 + uint16_t token,
773 + uint32_t freq_compensation)
774 +{
775 + struct dprtc_get_freq_compensation *cmd_params;
776 + struct fsl_mc_command cmd = { 0 };
777 +
778 + /* prepare command */
779 + cmd.header = mc_encode_cmd_header(DPRTC_CMDID_SET_FREQ_COMPENSATION,
780 + cmd_flags,
781 + token);
782 + cmd_params = (struct dprtc_get_freq_compensation *)cmd.params;
783 + cmd_params->freq_compensation = cpu_to_le32(freq_compensation);
784 +
785 + /* send command to mc*/
786 + return mc_send_command(mc_io, &cmd);
787 +}
788 +
789 +/**
790 + * dprtc_get_freq_compensation() - Retrieves the frequency compensation value
791 + *
792 + * @mc_io: Pointer to MC portal's I/O object
793 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
794 + * @token: Token of DPRTC object
795 + * @freq_compensation: Frequency compensation value
796 + *
797 + * Return: '0' on Success; Error code otherwise.
798 + */
799 +int dprtc_get_freq_compensation(struct fsl_mc_io *mc_io,
800 + uint32_t cmd_flags,
801 + uint16_t token,
802 + uint32_t *freq_compensation)
803 +{
804 + struct dprtc_get_freq_compensation *rsp_params;
805 + struct fsl_mc_command cmd = { 0 };
806 + int err;
807 +
808 + /* prepare command */
809 + cmd.header = mc_encode_cmd_header(DPRTC_CMDID_GET_FREQ_COMPENSATION,
810 + cmd_flags,
811 + token);
812 +
813 + /* send command to mc*/
814 + err = mc_send_command(mc_io, &cmd);
815 + if (err)
816 + return err;
817 +
818 + /* retrieve response parameters */
819 + rsp_params = (struct dprtc_get_freq_compensation *)cmd.params;
820 + *freq_compensation = le32_to_cpu(rsp_params->freq_compensation);
821 +
822 + return 0;
823 +}
824 +
825 +/**
826 + * dprtc_get_time() - Returns the current RTC time.
827 + *
828 + * @mc_io: Pointer to MC portal's I/O object
829 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
830 + * @token: Token of DPRTC object
831 + * @time: Current RTC time.
832 + *
833 + * Return: '0' on Success; Error code otherwise.
834 + */
835 +int dprtc_get_time(struct fsl_mc_io *mc_io,
836 + uint32_t cmd_flags,
837 + uint16_t token,
838 + uint64_t *time)
839 +{
840 + struct dprtc_time *rsp_params;
841 + struct fsl_mc_command cmd = { 0 };
842 + int err;
843 +
844 + /* prepare command */
845 + cmd.header = mc_encode_cmd_header(DPRTC_CMDID_GET_TIME,
846 + cmd_flags,
847 + token);
848 +
849 + /* send command to mc*/
850 + err = mc_send_command(mc_io, &cmd);
851 + if (err)
852 + return err;
853 +
854 + /* retrieve response parameters */
855 + rsp_params = (struct dprtc_time *)cmd.params;
856 + *time = le64_to_cpu(rsp_params->time);
857 +
858 + return 0;
859 +}
860 +
861 +/**
862 + * dprtc_set_time() - Updates current RTC time.
863 + *
864 + * @mc_io: Pointer to MC portal's I/O object
865 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
866 + * @token: Token of DPRTC object
867 + * @time: New RTC time.
868 + *
869 + * Return: '0' on Success; Error code otherwise.
870 + */
871 +int dprtc_set_time(struct fsl_mc_io *mc_io,
872 + uint32_t cmd_flags,
873 + uint16_t token,
874 + uint64_t time)
875 +{
876 + struct dprtc_time *cmd_params;
877 + struct fsl_mc_command cmd = { 0 };
878 +
879 + /* prepare command */
880 + cmd.header = mc_encode_cmd_header(DPRTC_CMDID_SET_TIME,
881 + cmd_flags,
882 + token);
883 + cmd_params = (struct dprtc_time *)cmd.params;
884 + cmd_params->time = cpu_to_le64(time);
885 +
886 + /* send command to mc*/
887 + return mc_send_command(mc_io, &cmd);
888 +}
889 +
890 +/**
891 + * dprtc_set_alarm() - Defines and sets alarm.
892 + *
893 + * @mc_io: Pointer to MC portal's I/O object
894 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
895 + * @token: Token of DPRTC object
896 + * @time: In nanoseconds, the time when the alarm
897 + * should go off - must be a multiple of
898 + * 1 microsecond
899 + *
900 + * Return: '0' on Success; Error code otherwise.
901 + */
902 +int dprtc_set_alarm(struct fsl_mc_io *mc_io,
903 + uint32_t cmd_flags,
904 + uint16_t token, uint64_t time)
905 +{
906 + struct dprtc_time *cmd_params;
907 + struct fsl_mc_command cmd = { 0 };
908 +
909 + /* prepare command */
910 + cmd.header = mc_encode_cmd_header(DPRTC_CMDID_SET_ALARM,
911 + cmd_flags,
912 + token);
913 + cmd_params = (struct dprtc_time *)cmd.params;
914 + cmd_params->time = cpu_to_le64(time);
915 +
916 + /* send command to mc*/
917 + return mc_send_command(mc_io, &cmd);
918 +}
919 +
920 +/**
921 + * dprtc_get_api_version() - Get Data Path Real Time Counter API version
922 + * @mc_io: Pointer to MC portal's I/O object
923 + * @cmd_flags: Command flags; one or more of 'MC_CMD_FLAG_'
924 + * @major_ver: Major version of data path real time counter API
925 + * @minor_ver: Minor version of data path real time counter API
926 + *
927 + * Return: '0' on Success; Error code otherwise.
928 + */
929 +int dprtc_get_api_version(struct fsl_mc_io *mc_io,
930 + uint32_t cmd_flags,
931 + uint16_t *major_ver,
932 + uint16_t *minor_ver)
933 +{
934 + struct dprtc_rsp_get_api_version *rsp_params;
935 + struct fsl_mc_command cmd = { 0 };
936 + int err;
937 +
938 + cmd.header = mc_encode_cmd_header(DPRTC_CMDID_GET_API_VERSION,
939 + cmd_flags,
940 + 0);
941 +
942 + err = mc_send_command(mc_io, &cmd);
943 + if (err)
944 + return err;
945 +
946 + rsp_params = (struct dprtc_rsp_get_api_version *)cmd.params;
947 + *major_ver = le16_to_cpu(rsp_params->major);
948 + *minor_ver = le16_to_cpu(rsp_params->minor);
949 +
950 + return 0;
951 +}
952 --- /dev/null
953 +++ b/drivers/staging/fsl-dpaa2/rtc/dprtc.h
954 @@ -0,0 +1,172 @@
955 +/* Copyright 2013-2016 Freescale Semiconductor Inc.
956 + *
957 + * Redistribution and use in source and binary forms, with or without
958 + * modification, are permitted provided that the following conditions are met:
959 + * * Redistributions of source code must retain the above copyright
960 + * notice, this list of conditions and the following disclaimer.
961 + * * Redistributions in binary form must reproduce the above copyright
962 + * notice, this list of conditions and the following disclaimer in the
963 + * documentation and/or other materials provided with the distribution.
964 + * * Neither the name of the above-listed copyright holders nor the
965 + * names of any contributors may be used to endorse or promote products
966 + * derived from this software without specific prior written permission.
967 + *
968 + *
969 + * ALTERNATIVELY, this software may be distributed under the terms of the
970 + * GNU General Public License ("GPL") as published by the Free Software
971 + * Foundation, either version 2 of that License or (at your option) any
972 + * later version.
973 + *
974 + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
975 + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
976 + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
977 + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
978 + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
979 + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
980 + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
981 + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
982 + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
983 + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
984 + * POSSIBILITY OF SUCH DAMAGE.
985 + */
986 +#ifndef __FSL_DPRTC_H
987 +#define __FSL_DPRTC_H
988 +
989 +/* Data Path Real Time Counter API
990 + * Contains initialization APIs and runtime control APIs for RTC
991 + */
992 +
993 +struct fsl_mc_io;
994 +
995 +/**
996 + * Number of irq's
997 + */
998 +#define DPRTC_MAX_IRQ_NUM 1
999 +#define DPRTC_IRQ_INDEX 0
1000 +
1001 +/**
1002 + * Interrupt event masks:
1003 + */
1004 +
1005 +/**
1006 + * Interrupt event mask indicating alarm event had occurred
1007 + */
1008 +#define DPRTC_EVENT_ALARM 0x40000000
1009 +/**
1010 + * Interrupt event mask indicating periodic pulse event had occurred
1011 + */
1012 +#define DPRTC_EVENT_PPS 0x08000000
1013 +
1014 +int dprtc_open(struct fsl_mc_io *mc_io,
1015 + uint32_t cmd_flags,
1016 + int dprtc_id,
1017 + uint16_t *token);
1018 +
1019 +int dprtc_close(struct fsl_mc_io *mc_io,
1020 + uint32_t cmd_flags,
1021 + uint16_t token);
1022 +
1023 +/**
1024 + * struct dprtc_cfg - Structure representing DPRTC configuration
1025 + * @options: place holder
1026 + */
1027 +struct dprtc_cfg {
1028 + uint32_t options;
1029 +};
1030 +
1031 +int dprtc_create(struct fsl_mc_io *mc_io,
1032 + uint16_t dprc_token,
1033 + uint32_t cmd_flags,
1034 + const struct dprtc_cfg *cfg,
1035 + uint32_t *obj_id);
1036 +
1037 +int dprtc_destroy(struct fsl_mc_io *mc_io,
1038 + uint16_t dprc_token,
1039 + uint32_t cmd_flags,
1040 + uint32_t object_id);
1041 +
1042 +int dprtc_set_clock_offset(struct fsl_mc_io *mc_io,
1043 + uint32_t cmd_flags,
1044 + uint16_t token,
1045 + int64_t offset);
1046 +
1047 +int dprtc_set_freq_compensation(struct fsl_mc_io *mc_io,
1048 + uint32_t cmd_flags,
1049 + uint16_t token,
1050 + uint32_t freq_compensation);
1051 +
1052 +int dprtc_get_freq_compensation(struct fsl_mc_io *mc_io,
1053 + uint32_t cmd_flags,
1054 + uint16_t token,
1055 + uint32_t *freq_compensation);
1056 +
1057 +int dprtc_get_time(struct fsl_mc_io *mc_io,
1058 + uint32_t cmd_flags,
1059 + uint16_t token,
1060 + uint64_t *time);
1061 +
1062 +int dprtc_set_time(struct fsl_mc_io *mc_io,
1063 + uint32_t cmd_flags,
1064 + uint16_t token,
1065 + uint64_t time);
1066 +
1067 +int dprtc_set_alarm(struct fsl_mc_io *mc_io,
1068 + uint32_t cmd_flags,
1069 + uint16_t token,
1070 + uint64_t time);
1071 +
1072 +int dprtc_set_irq_enable(struct fsl_mc_io *mc_io,
1073 + uint32_t cmd_flags,
1074 + uint16_t token,
1075 + uint8_t irq_index,
1076 + uint8_t en);
1077 +
1078 +int dprtc_get_irq_enable(struct fsl_mc_io *mc_io,
1079 + uint32_t cmd_flags,
1080 + uint16_t token,
1081 + uint8_t irq_index,
1082 + uint8_t *en);
1083 +
1084 +int dprtc_set_irq_mask(struct fsl_mc_io *mc_io,
1085 + uint32_t cmd_flags,
1086 + uint16_t token,
1087 + uint8_t irq_index,
1088 + uint32_t mask);
1089 +
1090 +int dprtc_get_irq_mask(struct fsl_mc_io *mc_io,
1091 + uint32_t cmd_flags,
1092 + uint16_t token,
1093 + uint8_t irq_index,
1094 + uint32_t *mask);
1095 +
1096 +int dprtc_get_irq_status(struct fsl_mc_io *mc_io,
1097 + uint32_t cmd_flags,
1098 + uint16_t token,
1099 + uint8_t irq_index,
1100 + uint32_t *status);
1101 +
1102 +int dprtc_clear_irq_status(struct fsl_mc_io *mc_io,
1103 + uint32_t cmd_flags,
1104 + uint16_t token,
1105 + uint8_t irq_index,
1106 + uint32_t status);
1107 +
1108 +/**
1109 + * struct dprtc_attr - Structure representing DPRTC attributes
1110 + * @id: DPRTC object ID
1111 + */
1112 +struct dprtc_attr {
1113 + int id;
1114 +};
1115 +
1116 +int dprtc_get_attributes(struct fsl_mc_io *mc_io,
1117 + uint32_t cmd_flags,
1118 + uint16_t token,
1119 + struct dprtc_attr *attr);
1120 +
1121 +int dprtc_get_api_version(struct fsl_mc_io *mc_io,
1122 + uint32_t cmd_flags,
1123 + uint16_t *major_ver,
1124 + uint16_t *minor_ver);
1125 +
1126 +#endif /* __FSL_DPRTC_H */
1127 --- /dev/null
1128 +++ b/drivers/staging/fsl-dpaa2/rtc/rtc.c
1129 @@ -0,0 +1,240 @@
1130 +/* Copyright 2013-2015 Freescale Semiconductor Inc.
1131 + *
1132 + * Redistribution and use in source and binary forms, with or without
1133 + * modification, are permitted provided that the following conditions are met:
1134 + * * Redistributions of source code must retain the above copyright
1135 + * notice, this list of conditions and the following disclaimer.
1136 + * * Redistributions in binary form must reproduce the above copyright
1137 + * notice, this list of conditions and the following disclaimer in the
1138 + * documentation and/or other materials provided with the distribution.
1139 + * * Neither the name of the above-listed copyright holders nor the
1140 + * names of any contributors may be used to endorse or promote products
1141 + * derived from this software without specific prior written permission.
1142 + *
1143 + *
1144 + * ALTERNATIVELY, this software may be distributed under the terms of the
1145 + * GNU General Public License ("GPL") as published by the Free Software
1146 + * Foundation, either version 2 of that License or (at your option) any
1147 + * later version.
1148 + *
1149 + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
1150 + * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
1151 + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
1152 + * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE
1153 + * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
1154 + * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
1155 + * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
1156 + * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
1157 + * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
1158 + * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
1159 + * POSSIBILITY OF SUCH DAMAGE.
1160 + */
1161 +
1162 +#include <linux/module.h>
1163 +#include <linux/ptp_clock_kernel.h>
1164 +
1165 +#include <linux/fsl/mc.h>
1166 +
1167 +#include "rtc.h"
1168 +
1169 +#define N_EXT_TS 2
1170 +
1171 +struct ptp_clock *clock;
1172 +struct fsl_mc_device *rtc_mc_dev;
1173 +u32 freqCompensation;
1174 +
1175 +/* PTP clock operations */
1176 +static int ptp_dpaa2_adjfreq(struct ptp_clock_info *ptp, s32 ppb)
1177 +{
1178 + u64 adj;
1179 + u32 diff, tmr_add;
1180 + int neg_adj = 0;
1181 + int err = 0;
1182 + struct fsl_mc_device *mc_dev = rtc_mc_dev;
1183 + struct device *dev = &mc_dev->dev;
1184 +
1185 + if (ppb < 0) {
1186 + neg_adj = 1;
1187 + ppb = -ppb;
1188 + }
1189 +
1190 + tmr_add = freqCompensation;
1191 + adj = tmr_add;
1192 + adj *= ppb;
1193 + diff = div_u64(adj, 1000000000ULL);
1194 +
1195 + tmr_add = neg_adj ? tmr_add - diff : tmr_add + diff;
1196 +
1197 + err = dprtc_set_freq_compensation(mc_dev->mc_io, 0,
1198 + mc_dev->mc_handle, tmr_add);
1199 + if (err)
1200 + dev_err(dev, "dprtc_set_freq_compensation err %d\n", err);
1201 + return 0;
1202 +}
1203 +
1204 +static int ptp_dpaa2_adjtime(struct ptp_clock_info *ptp, s64 delta)
1205 +{
1206 + s64 now;
1207 + int err = 0;
1208 + struct fsl_mc_device *mc_dev = rtc_mc_dev;
1209 + struct device *dev = &mc_dev->dev;
1210 +
1211 + err = dprtc_get_time(mc_dev->mc_io, 0, mc_dev->mc_handle, &now);
1212 + if (err) {
1213 + dev_err(dev, "dprtc_get_time err %d\n", err);
1214 + return 0;
1215 + }
1216 +
1217 + now += delta;
1218 +
1219 + err = dprtc_set_time(mc_dev->mc_io, 0, mc_dev->mc_handle, now);
1220 + if (err) {
1221 + dev_err(dev, "dprtc_set_time err %d\n", err);
1222 + return 0;
1223 + }
1224 + return 0;
1225 +}
1226 +
1227 +static int ptp_dpaa2_gettime(struct ptp_clock_info *ptp, struct timespec *ts)
1228 +{
1229 + u64 ns;
1230 + u32 remainder;
1231 + int err = 0;
1232 + struct fsl_mc_device *mc_dev = rtc_mc_dev;
1233 + struct device *dev = &mc_dev->dev;
1234 +
1235 + err = dprtc_get_time(mc_dev->mc_io, 0, mc_dev->mc_handle, &ns);
1236 + if (err) {
1237 + dev_err(dev, "dprtc_get_time err %d\n", err);
1238 + return 0;
1239 + }
1240 +
1241 + ts->tv_sec = div_u64_rem(ns, 1000000000, &remainder);
1242 + ts->tv_nsec = remainder;
1243 + return 0;
1244 +}
1245 +
1246 +static int ptp_dpaa2_settime(struct ptp_clock_info *ptp,
1247 + const struct timespec *ts)
1248 +{
1249 + u64 ns;
1250 + int err = 0;
1251 + struct fsl_mc_device *mc_dev = rtc_mc_dev;
1252 + struct device *dev = &mc_dev->dev;
1253 +
1254 + ns = ts->tv_sec * 1000000000ULL;
1255 + ns += ts->tv_nsec;
1256 +
1257 + err = dprtc_set_time(mc_dev->mc_io, 0, mc_dev->mc_handle, ns);
1258 + if (err)
1259 + dev_err(dev, "dprtc_set_time err %d\n", err);
1260 + return 0;
1261 +}
1262 +
1263 +static struct ptp_clock_info ptp_dpaa2_caps = {
1264 + .owner = THIS_MODULE,
1265 + .name = "dpaa2 clock",
1266 + .max_adj = 512000,
1267 + .n_alarm = 0,
1268 + .n_ext_ts = N_EXT_TS,
1269 + .n_per_out = 0,
1270 + .n_pins = 0,
1271 + .pps = 1,
1272 + .adjfreq = ptp_dpaa2_adjfreq,
1273 + .adjtime = ptp_dpaa2_adjtime,
1274 + .gettime64 = ptp_dpaa2_gettime,
1275 + .settime64 = ptp_dpaa2_settime,
1276 +};
1277 +
1278 +static int rtc_probe(struct fsl_mc_device *mc_dev)
1279 +{
1280 + struct device *dev;
1281 + int err = 0;
1282 + u32 tmr_add = 0;
1283 +
1284 + if (!mc_dev)
1285 + return -EFAULT;
1286 +
1287 + dev = &mc_dev->dev;
1288 +
1289 + err = fsl_mc_portal_allocate(mc_dev, 0, &mc_dev->mc_io);
1290 + if (unlikely(err)) {
1291 + dev_err(dev, "fsl_mc_portal_allocate err %d\n", err);
1292 + goto err_exit;
1293 + }
1294 + if (!mc_dev->mc_io) {
1295 + dev_err(dev,
1296 + "fsl_mc_portal_allocate returned null handle but no error\n");
1297 + err = -EFAULT;
1298 + goto err_exit;
1299 + }
1300 +
1301 + err = dprtc_open(mc_dev->mc_io, 0, mc_dev->obj_desc.id,
1302 + &mc_dev->mc_handle);
1303 + if (err) {
1304 + dev_err(dev, "dprtc_open err %d\n", err);
1305 + goto err_free_mcp;
1306 + }
1307 + if (!mc_dev->mc_handle) {
1308 + dev_err(dev, "dprtc_open returned null handle but no error\n");
1309 + err = -EFAULT;
1310 + goto err_free_mcp;
1311 + }
1312 +
1313 + rtc_mc_dev = mc_dev;
1314 +
1315 + err = dprtc_get_freq_compensation(mc_dev->mc_io, 0,
1316 + mc_dev->mc_handle, &tmr_add);
1317 + if (err) {
1318 + dev_err(dev, "dprtc_get_freq_compensation err %d\n", err);
1319 + goto err_close;
1320 + }
1321 + freqCompensation = tmr_add;
1322 +
1323 + clock = ptp_clock_register(&ptp_dpaa2_caps, dev);
1324 + if (IS_ERR(clock)) {
1325 + err = PTR_ERR(clock);
1326 + goto err_close;
1327 + }
1328 + dpaa2_phc_index = ptp_clock_index(clock);
1329 +
1330 + return 0;
1331 +err_close:
1332 + dprtc_close(mc_dev->mc_io, 0, mc_dev->mc_handle);
1333 +err_free_mcp:
1334 + fsl_mc_portal_free(mc_dev->mc_io);
1335 +err_exit:
1336 + return err;
1337 +}
1338 +
1339 +static int rtc_remove(struct fsl_mc_device *mc_dev)
1340 +{
1341 + ptp_clock_unregister(clock);
1342 + dprtc_close(mc_dev->mc_io, 0, mc_dev->mc_handle);
1343 + fsl_mc_portal_free(mc_dev->mc_io);
1344 +
1345 + return 0;
1346 +}
1347 +
1348 +static const struct fsl_mc_device_id rtc_match_id_table[] = {
1349 + {
1350 + .vendor = FSL_MC_VENDOR_FREESCALE,
1351 + .obj_type = "dprtc",
1352 + },
1353 + {}
1354 +};
1355 +
1356 +static struct fsl_mc_driver rtc_drv = {
1357 + .driver = {
1358 + .name = KBUILD_MODNAME,
1359 + .owner = THIS_MODULE,
1360 + },
1361 + .probe = rtc_probe,
1362 + .remove = rtc_remove,
1363 + .match_id_table = rtc_match_id_table,
1364 +};
1365 +
1366 +module_fsl_mc_driver(rtc_drv);
1367 +
1368 +MODULE_LICENSE("GPL");
1369 +MODULE_DESCRIPTION("DPAA2 RTC (PTP 1588 clock) driver (prototype)");
1370 --- /dev/null
1371 +++ b/drivers/staging/fsl-dpaa2/rtc/rtc.h
1372 @@ -0,0 +1,14 @@
1373 +// SPDX-License-Identifier: GPL-2.0
1374 +/*
1375 + * Copyright 2018 NXP
1376 + */
1377 +
1378 +#ifndef __RTC_H
1379 +#define __RTC_H
1380 +
1381 +#include "dprtc.h"
1382 +#include "dprtc-cmd.h"
1383 +
1384 +extern int dpaa2_phc_index;
1385 +
1386 +#endif