4db3b1f636eb362e630f9c4c98d675d00d3213ee
[openwrt/staging/wigyori.git] / target / linux / ramips / dts / PBR-M1.dts
1 /dts-v1/;
2
3 #include "mt7621.dtsi"
4
5 #include <dt-bindings/gpio/gpio.h>
6 #include <dt-bindings/input/input.h>
7
8 / {
9 compatible = "d-team,pbr-m1", "mediatek,mt7621-soc";
10 model = "PBR-M1";
11
12 aliases {
13 led-status = &led_power;
14 };
15
16 memory@0 {
17 device_type = "memory";
18 reg = <0x0 0x10000000>;
19 };
20
21 chosen {
22 bootargs = "console=ttyS0,115200";
23 };
24
25 palmbus: palmbus@1E000000 {
26 i2c: i2c@900 {
27 status = "okay";
28
29 pcf8563: rtc@51 {
30 status = "okay";
31 compatible = "nxp,pcf8563";
32 reg = <0x51>;
33 };
34 };
35 };
36
37 gpio-leds {
38 compatible = "gpio-leds";
39
40 led_power: power {
41 label = "pbr-m1:blue:power";
42 gpios = <&gpio0 31 GPIO_ACTIVE_LOW>;
43 };
44
45 sys {
46 label = "pbr-m1:blue:sys";
47 gpios = <&gpio1 0 GPIO_ACTIVE_LOW>;
48 };
49
50 internet {
51 label = "pbr-m1:blue:internet";
52 gpios = <&gpio0 29 GPIO_ACTIVE_LOW>;
53 };
54
55 wlan2g {
56 label = "pbr-m1:blue:wlan2g";
57 gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
58 };
59
60 wlan5g {
61 label = "pbr-m1:blue:wlan5g";
62 gpios = <&gpio0 28 GPIO_ACTIVE_LOW>;
63 };
64 };
65
66 gpio-keys-polled {
67 compatible = "gpio-keys-polled";
68 #address-cells = <1>;
69 #size-cells = <0>;
70 poll-interval = <20>;
71
72 reset {
73 label = "reset";
74 gpios = <&gpio0 18 GPIO_ACTIVE_LOW>;
75 linux,code = <KEY_RESTART>;
76 };
77 };
78
79 gpio_export {
80 compatible = "gpio-export";
81 #size-cells = <0>;
82
83 power_usb2 {
84 gpio-export,name = "power_usb2";
85 gpio-export,output = <1>;
86 gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>;
87 };
88
89 power_usb3 {
90 gpio-export,name = "power_usb3";
91 gpio-export,output = <1>;
92 gpios = <&gpio0 25 GPIO_ACTIVE_HIGH>;
93 };
94
95 power_sata {
96 gpio-export,name = "power_sata";
97 gpio-export,output = <1>;
98 gpios = <&gpio0 27 GPIO_ACTIVE_HIGH>;
99 };
100 };
101
102 beeper: beeper {
103 compatible = "gpio-beeper";
104 gpios = <&gpio0 26 GPIO_ACTIVE_LOW>;
105 };
106 };
107
108 &sdhci {
109 status = "okay";
110 pinctrl-names = "default";
111 pinctrl-0 = <&sdhci_pins>;
112 };
113
114 &spi0 {
115 status = "okay";
116
117 m25p80@0 {
118 #address-cells = <1>;
119 #size-cells = <1>;
120 compatible = "jedec,spi-nor";
121 reg = <0>;
122 spi-max-frequency = <10000000>;
123 m25p,chunked-io = <32>;
124
125 partition@0 {
126 label = "u-boot";
127 reg = <0x0 0x30000>;
128 read-only;
129 };
130
131 partition@30000 {
132 label = "u-boot-env";
133 reg = <0x30000 0x10000>;
134 read-only;
135 };
136
137 factory: partition@40000 {
138 label = "factory";
139 reg = <0x40000 0x10000>;
140 read-only;
141 };
142
143 partition@50000 {
144 label = "firmware";
145 reg = <0x50000 0xfb0000>;
146 };
147 };
148 };
149
150 &pcie {
151 status = "okay";
152 };
153
154 &pcie0 {
155 mt76@0,0 {
156 reg = <0x0000 0 0 0 0>;
157 mediatek,mtd-eeprom = <&factory 0x8000>;
158 ieee80211-freq-limit = <5000000 6000000>;
159 };
160 };
161
162 &pcie1 {
163 mt76@0,0 {
164 reg = <0x0000 0 0 0 0>;
165 mediatek,mtd-eeprom = <&factory 0x0000>;
166 };
167 };
168
169 &ethernet {
170 mtd-mac-address = <&factory 0xe000>;
171 };
172
173 &pinctrl {
174 state_default: pinctrl0 {
175 gpio {
176 ralink,group = "wdt", "rgmii2", "jtag", "mdio";
177 ralink,function = "gpio";
178 };
179 };
180 };