target/linux/ramips/dts/mt7620a_linksys_e1700.dts

   1 // SPDX-License-Identifier: GPL-2.0-only
   2 /*
   3  * Copyright (C) 2014 Imre Kaloz <kaloz@openwrt.org>
   4  */
   5
   6 #include "mt7620a.dtsi"
   7
   8 #include <dt-bindings/gpio/gpio.h>
   9 #include <dt-bindings/input/input.h>
  10
  11 / {
  12         compatible = "linksys,e1700", "ralink,mt7620a-soc";
  13         model = "Linksys E1700";
  14
  15         aliases {
  16                 led-boot = &led_power;
  17                 led-failsafe = &led_power;
  18                 led-running = &led_power;
  19                 led-upgrade = &led_power;
  20         };
  21
  22         keys {
  23                 compatible = "gpio-keys";
  24
  25                 reset {
  26                         label = "reset";
  27                         gpios = <&gpio0 1 GPIO_ACTIVE_HIGH>;
  28                         linux,code = <KEY_RESTART>;
  29                 };
  30
  31                 wps {
  32                         label = "wps";
  33                         gpios = <&gpio0 2 GPIO_ACTIVE_HIGH>;
  34                         linux,code = <KEY_WPS_BUTTON>;
  35                 };
  36         };
  37
  38         leds {
  39                 compatible = "gpio-leds";
  40
  41                 led_power: power {
  42                         label = "green:power";
  43                         gpios = <&gpio0 10 GPIO_ACTIVE_LOW>;
  44                 };
  45
  46                 wan {
  47                         label = "green:wps";
  48                         gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
  49                 };
  50         };
  51 };
  52
  53 &spi0 {
  54         status = "okay";
  55
  56         flash@0 {
  57                 compatible = "jedec,spi-nor";
  58                 reg = <0>;
  59                 spi-max-frequency = <10000000>;
  60
  61                 partitions {
  62                         compatible = "fixed-partitions";
  63                         #address-cells = <1>;
  64                         #size-cells = <1>;
  65
  66                         partition@0 {
  67                                 label = "u-boot";
  68                                 reg = <0x0 0x30000>;
  69                                 read-only;
  70                         };
  71
  72                         partition@30000 {
  73                                 label = "config";
  74                                 reg = <0x30000 0x10000>;
  75                                 read-only;
  76                         };
  77
  78                         factory: partition@40000 {
  79                                 label = "factory";
  80                                 reg = <0x40000 0x10000>;
  81                                 read-only;
  82                         };
  83
  84                         partition@50000 {
  85                                 compatible = "denx,uimage";
  86                                 label = "firmware";
  87                                 reg = <0x50000 0x7b0000>;
  88                         };
  89                 };
  90         };
  91 };
  92
  93 &state_default {
  94         gpio {
  95                 groups = "i2c", "uartf";
  96                 function = "gpio";
  97         };
  98 };
  99
 100 &ethernet {
 101         pinctrl-names = "default";
 102         pinctrl-0 = <&rgmii1_pins &rgmii2_pins &mdio_pins>;
 103
 104         nvmem-cells = <&macaddr_factory_28>;
 105         nvmem-cell-names = "mac-address";
 106
 107         port@5 {
 108                 status = "okay";
 109                 mediatek,fixed-link = <1000 1 1 1>;
 110                 phy-mode = "rgmii";
 111         };
 112
 113         mdio-bus {
 114                 status = "okay";
 115
 116                 phy0: ethernet-phy@0 {
 117                         reg = <0>;
 118                         phy-mode = "rgmii";
 119                 };
 120
 121                 phy1: ethernet-phy@1 {
 122                         reg = <1>;
 123                         phy-mode = "rgmii";
 124                 };
 125
 126                 phy2: ethernet-phy@2 {
 127                         reg = <2>;
 128                         phy-mode = "rgmii";
 129                 };
 130
 131                 phy3: ethernet-phy@3 {
 132                         reg = <3>;
 133                         phy-mode = "rgmii";
 134                 };
 135
 136                 phy4: ethernet-phy@4 {
 137                         reg = <4>;
 138                         phy-mode = "rgmii";
 139                 };
 140
 141                 phy1f: ethernet-phy@1f {
 142                         reg = <0x1f>;
 143                         phy-mode = "rgmii";
 144                 };
 145         };
 146 };
 147
 148 &gsw {
 149         mediatek,ephy-base = /bits/ 8 <12>;
 150 };
 151
 152 &wmac {
 153         ralink,mtd-eeprom = <&factory 0x0>;
 154 };
 155
 156 &factory {
 157         compatible = "nvmem-cells";
 158         #address-cells = <1>;
 159         #size-cells = <1>;
 160
 161         macaddr_factory_28: macaddr@28 {
 162                 reg = <0x28 0x6>;
 163         };
 164 };