target/linux/ramips/dts/mt7620a_ralink_mt7620a-v22sg-evb.dts

   1 #include "mt7620a.dtsi"
   2
   3 #include <dt-bindings/gpio/gpio.h>
   4 #include <dt-bindings/input/input.h>
   5
   6 / {
   7         compatible = "ralink,mt7620a-v22sg-evb", "ralink,mt7620a-soc";
   8         model = "Ralink MT7620a V22SG High Power evaluation board";
   9
  10         keys {
  11                 compatible = "gpio-keys";
  12
  13                 reset {
  14                         label = "reset";
  15                         gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
  16                         linux,code = <KEY_RESTART>;
  17                 };
  18
  19                 aoss {
  20                         label = "aoss";
  21                         gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
  22                         linux,code = <KEY_WPS_BUTTON>;
  23                 };
  24         };
  25
  26         nand {
  27                 compatible = "mtk,mt7620-nand";
  28
  29                 partitions {
  30                         compatible = "fixed-partitions";
  31                         #address-cells = <1>;
  32                         #size-cells = <1>;
  33
  34                         partition@0 {
  35                                 label = "u-boot";
  36                                 reg = <0x0 0x40000>;
  37                                 read-only;
  38                         };
  39
  40                         partition@40000 {
  41                                 label = "u-boot-env";
  42                                 reg = <0x40000 0x20000>;
  43                                 read-only;
  44                         };
  45
  46                         factory: partition@60000 {
  47                                 label = "factory";
  48                                 reg = <0x60000 0x20000>;
  49                                 read-only;
  50                         };
  51
  52                         partition@80000 {
  53                                 compatible = "denx,uimage";
  54                                 label = "firmware";
  55                                 reg = <0x80000 0x7f80000>;
  56                         };
  57                 };
  58         };
  59 };
  60
  61 &state_default {
  62         gpio {
  63                 groups = "i2c", "uartf", "spi";
  64                 function = "gpio";
  65         };
  66 };
  67
  68 &ethernet {
  69         pinctrl-names = "default";
  70         pinctrl-0 = <&rgmii1_pins &rgmii2_pins &mdio_pins>;
  71
  72         mediatek,portmap = "llllw";
  73
  74         port@4 {
  75                 status = "okay";
  76                 phy-handle = <&phy4>;
  77                 phy-mode = "rgmii";
  78         };
  79
  80         port@5 {
  81                 status = "okay";
  82                 phy-handle = <&phy5>;
  83                 phy-mode = "rgmii";
  84         };
  85
  86         mdio-bus {
  87                 status = "okay";
  88
  89                 phy4: ethernet-phy@4 {
  90                         reg = <4>;
  91                         phy-mode = "rgmii";
  92                 };
  93
  94                 phy5: ethernet-phy@5 {
  95                         reg = <5>;
  96                         phy-mode = "rgmii";
  97                 };
  98         };
  99 };
 100
 101 &gsw {
 102         mediatek,port4-gmac;
 103 };
 104
 105 &pcie {
 106         status = "okay";
 107 };
 108
 109 &ehci {
 110         status = "okay";
 111 };
 112
 113 &ohci {
 114         status = "okay";
 115 };