target/linux/ramips/dts/mt7621_firefly_firewrt.dts

   1 #include "mt7621.dtsi"
   2
   3 #include <dt-bindings/gpio/gpio.h>
   4 #include <dt-bindings/input/input.h>
   5 #include <dt-bindings/leds/common.h>
   6
   7 / {
   8         compatible = "firefly,firewrt", "mediatek,mt7621-soc";
   9         model = "Firefly FireWRT";
  10
  11         aliases {
  12                 led-boot = &led_power;
  13                 led-failsafe = &led_power;
  14                 led-running = &led_power;
  15                 led-upgrade = &led_power;
  16         };
  17
  18         leds {
  19                 compatible = "gpio-leds";
  20
  21                 led_power: power {
  22                         function = LED_FUNCTION_POWER;
  23                         color = <LED_COLOR_ID_GREEN>;
  24                         gpios = <&gpio 22 GPIO_ACTIVE_LOW>;
  25                 };
  26         };
  27
  28         keys {
  29                 compatible = "gpio-keys";
  30
  31                 wps {
  32                         label = "wps";
  33                         gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
  34                         linux,code = <KEY_WPS_BUTTON>;
  35                 };
  36
  37                 power {
  38                         label = "power";
  39                         gpios = <&gpio 23 GPIO_ACTIVE_LOW>;
  40                         linux,code = <KEY_POWER>;
  41                 };
  42         };
  43 };
  44
  45 &sdhci {
  46         status = "okay";
  47 };
  48
  49 &spi0 {
  50         status = "okay";
  51
  52         flash@0 {
  53                 compatible = "jedec,spi-nor";
  54                 reg = <0>;
  55                 spi-max-frequency = <10000000>;
  56
  57                 partitions {
  58                         compatible = "fixed-partitions";
  59                         #address-cells = <1>;
  60                         #size-cells = <1>;
  61
  62                         partition@0 {
  63                                 label = "u-boot";
  64                                 reg = <0x0 0x30000>;
  65                                 read-only;
  66                         };
  67
  68                         partition@30000 {
  69                                 label = "u-boot-env";
  70                                 reg = <0x30000 0x10000>;
  71                                 read-only;
  72                         };
  73
  74                         factory: partition@40000 {
  75                                 label = "factory";
  76                                 reg = <0x40000 0x10000>;
  77                                 read-only;
  78
  79                                 nvmem-layout {
  80                                         compatible = "fixed-layout";
  81                                         #address-cells = <1>;
  82                                         #size-cells = <1>;
  83
  84                                         eeprom_factory_0: eeprom@0 {
  85                                                 reg = <0x0 0x200>;
  86                                         };
  87
  88                                         eeprom_factory_8000: eeprom@8000 {
  89                                                 reg = <0x8000 0x200>;
  90                                         };
  91
  92                                         macaddr_factory_e000: macaddr@e000 {
  93                                                 compatible = "mac-base";
  94                                                 reg = <0xe000 0x6>;
  95                                                 #nvmem-cell-cells = <1>;
  96                                         };
  97                                 };
  98                         };
  99
 100                         partition@50000 {
 101                                 compatible = "denx,uimage";
 102                                 label = "firmware";
 103                                 reg = <0x50000 0xfb0000>;
 104                         };
 105                 };
 106         };
 107 };
 108
 109 &pcie {
 110         status = "okay";
 111 };
 112
 113 &pcie0 {
 114         mt76@0,0 {
 115                 reg = <0x0000 0 0 0 0>;
 116                 nvmem-cells = <&eeprom_factory_8000>;
 117                 nvmem-cell-names = "eeprom";
 118                 ieee80211-freq-limit = <5000000 6000000>;
 119         };
 120 };
 121
 122 &pcie1 {
 123         mt76@0,0 {
 124                 reg = <0x0000 0 0 0 0>;
 125                 nvmem-cells = <&eeprom_factory_0>;
 126                 nvmem-cell-names = "eeprom";
 127                 ieee80211-freq-limit = <2400000 2500000>;
 128         };
 129 };
 130
 131 &ethernet {
 132         pinctrl-0 = <&mdio_pins>, <&rgmii1_pins>;
 133 };
 134
 135 &gmac0 {
 136         nvmem-cells = <&macaddr_factory_e000 0>;
 137         nvmem-cell-names = "mac-address";
 138 };
 139
 140 &switch0 {
 141         ports {
 142                 port@0 {
 143                         status = "okay";
 144                         label = "lan1";
 145                 };
 146
 147                 port@1 {
 148                         status = "okay";
 149                         label = "lan2";
 150                 };
 151
 152                 port@2 {
 153                         status = "okay";
 154                         label = "lan3";
 155                 };
 156
 157                 port@3 {
 158                         status = "okay";
 159                         label = "lan4";
 160                 };
 161
 162                 port@4 {
 163                         status = "okay";
 164                         label = "wan";
 165                         nvmem-cells = <&macaddr_factory_e000 1>;
 166                         nvmem-cell-names = "mac-address";
 167                 };
 168         };
 169 };
 170
 171 &state_default {
 172         gpio {
 173                 groups = "wdt", "rgmii2";
 174                 function = "gpio";
 175         };
 176 };