158640bf925c5bc3a3c0429b1e4445fdffac67f8
[openwrt/staging/wigyori.git] / target / linux / ramips / dts / rt3883.dtsi
1 /dts-v1/;
2
3 / {
4 #address-cells = <1>;
5 #size-cells = <1>;
6 compatible = "ralink,rt3883-soc";
7
8 aliases {
9 spi0 = &spi0;
10 spi1 = &spi1;
11 serial0 = &uartlite;
12 };
13
14 cpus {
15 #address-cells = <1>;
16 #size-cells = <0>;
17
18 cpu@0 {
19 compatible = "mips,mips74Kc";
20 reg = <0>;
21 };
22 };
23
24 chosen {
25 bootargs = "console=ttyS0,57600";
26 };
27
28 cpuintc: cpuintc {
29 #address-cells = <0>;
30 #interrupt-cells = <1>;
31 interrupt-controller;
32 compatible = "mti,cpu-interrupt-controller";
33 };
34
35 palmbus: palmbus@10000000 {
36 compatible = "palmbus";
37 reg = <0x10000000 0x200000>;
38 ranges = <0x0 0x10000000 0x1FFFFF>;
39
40 #address-cells = <1>;
41 #size-cells = <1>;
42
43 sysc: sysc@0 {
44 compatible = "ralink,rt3883-sysc", "ralink,rt3050-sysc", "syscon";
45 reg = <0x0 0x100>;
46 };
47
48 timer: timer@100 {
49 compatible = "ralink,rt3883-timer", "ralink,rt2880-timer";
50 reg = <0x100 0x20>;
51
52 interrupt-parent = <&intc>;
53 interrupts = <1>;
54 };
55
56 watchdog: watchdog@120 {
57 compatible = "ralink,rt3883-wdt", "ralink,rt2880-wdt";
58 reg = <0x120 0x10>;
59
60 resets = <&rstctrl 8>;
61 reset-names = "wdt";
62
63 interrupt-parent = <&intc>;
64 interrupts = <1>;
65 };
66
67 intc: intc@200 {
68 compatible = "ralink,rt3883-intc", "ralink,rt2880-intc";
69 reg = <0x200 0x100>;
70
71 resets = <&rstctrl 19>;
72 reset-names = "intc";
73
74 interrupt-controller;
75 #interrupt-cells = <1>;
76
77 interrupt-parent = <&cpuintc>;
78 interrupts = <2>;
79 };
80
81 memc: memc@300 {
82 compatible = "ralink,rt3883-memc", "ralink,rt3050-memc";
83 reg = <0x300 0x100>;
84
85 resets = <&rstctrl 20>;
86 reset-names = "mc";
87
88 interrupt-parent = <&intc>;
89 interrupts = <3>;
90 };
91
92 uart: uart@500 {
93 compatible = "ralink,rt3883-uart", "ralink,rt2880-uart", "ns16550a";
94 reg = <0x500 0x100>;
95
96 resets = <&rstctrl 12>;
97 reset-names = "uart";
98
99 interrupt-parent = <&intc>;
100 interrupts = <5>;
101
102 reg-shift = <2>;
103
104 status = "disabled";
105 };
106
107 gpio0: gpio@600 {
108 compatible = "ralink,rt3883-gpio", "ralink,rt2880-gpio";
109 reg = <0x600 0x34>;
110
111 resets = <&rstctrl 13>;
112 reset-names = "pio";
113
114 interrupt-parent = <&intc>;
115 interrupts = <6>;
116
117 gpio-controller;
118 #gpio-cells = <2>;
119
120 ngpios = <24>;
121 ralink,gpio-base = <0>;
122 ralink,register-map = [ 00 04 08 0c
123 20 24 28 2c
124 30 34 ];
125 };
126
127 gpio1: gpio@638 {
128 compatible = "ralink,rt3883-gpio", "ralink,rt2880-gpio";
129 reg = <0x638 0x24>;
130
131 gpio-controller;
132 #gpio-cells = <2>;
133
134 ngpios = <16>;
135 ralink,gpio-base = <24>;
136 ralink,register-map = [ 00 04 08 0c
137 10 14 18 1c
138 20 24 ];
139
140 status = "disabled";
141 };
142
143 gpio2: gpio@660 {
144 compatible = "ralink,rt3883-gpio", "ralink,rt2880-gpio";
145 reg = <0x660 0x24>;
146
147 gpio-controller;
148 #gpio-cells = <2>;
149
150 ngpios = <32>;
151 ralink,gpio-base = <40>;
152 ralink,register-map = [ 00 04 08 0c
153 10 14 18 1c
154 20 24 ];
155
156 status = "disabled";
157 };
158
159 gpio3: gpio@688 {
160 compatible = "ralink,rt3883-gpio", "ralink,rt2880-gpio";
161 reg = <0x688 0x24>;
162
163 gpio-controller;
164 #gpio-cells = <2>;
165
166 ngpios = <24>;
167 ralink,gpio-base = <72>;
168 ralink,register-map = [ 00 04 08 0c
169 10 14 18 1c
170 20 24 ];
171
172 status = "disabled";
173 };
174
175 i2c@900 {
176 compatible = "ralink,rt2880-i2c";
177 reg = <0x900 0x100>;
178
179 resets = <&rstctrl 16>;
180 reset-names = "i2c";
181
182 #address-cells = <1>;
183 #size-cells = <0>;
184
185 status = "disabled";
186
187 pinctrl-names = "default";
188 pinctrl-0 = <&i2c_pins>;
189 };
190
191 i2s@a00 {
192 compatible = "ralink,rt3883-i2s";
193 reg = <0xa00 0x100>;
194
195 resets = <&rstctrl 17>;
196 reset-names = "i2s";
197
198 interrupt-parent = <&intc>;
199 interrupts = <10>;
200
201 txdma-req = <2>;
202 rxdma-req = <3>;
203
204 dmas = <&gdma 4>,
205 <&gdma 6>;
206 dma-names = "tx", "rx";
207
208 status = "disabled";
209 };
210
211 spi0: spi@b00 {
212 compatible = "ralink,rt3883-spi", "ralink,rt2880-spi";
213 reg = <0xb00 0x40>;
214 #address-cells = <1>;
215 #size-cells = <0>;
216
217 resets = <&rstctrl 18>;
218 reset-names = "spi";
219
220 pinctrl-names = "default";
221 pinctrl-0 = <&spi_pins>;
222
223 status = "disabled";
224 };
225
226 spi1: spi@b40 {
227 compatible = "ralink,rt3883-spi", "ralink,rt2880-spi";
228 reg = <0xb40 0x60>;
229 #address-cells = <1>;
230 #size-cells = <0>;
231
232 resets = <&rstctrl 18>;
233 reset-names = "spi";
234
235 pinctrl-names = "default";
236 pinctrl-0 = <&spi_cs1>;
237
238 status = "disabled";
239 };
240
241 uartlite: uartlite@c00 {
242 compatible = "ralink,rt3883-uart", "ralink,rt2880-uart", "ns16550a";
243 reg = <0xc00 0x100>;
244
245 resets = <&rstctrl 19>;
246 reset-names = "uartl";
247
248 interrupt-parent = <&intc>;
249 interrupts = <12>;
250
251 reg-shift = <2>;
252
253 pinctrl-names = "default";
254 pinctrl-0 = <&uartlite_pins>;
255 };
256
257 gdma: gdma@2800 {
258 compatible = "ralink,rt3883-gdma";
259 reg = <0x2800 0x800>;
260
261 resets = <&rstctrl 14>;
262 reset-names = "dma";
263
264 interrupt-parent = <&intc>;
265 interrupts = <7>;
266
267 #dma-cells = <1>;
268 #dma-channels = <16>;
269 #dma-requests = <16>;
270
271 status = "disabled";
272 };
273 };
274
275 pinctrl: pinctrl {
276 compatible = "ralink,rt2880-pinmux";
277
278 pinctrl-names = "default";
279 pinctrl-0 = <&state_default>;
280
281 state_default: pinctrl0 {
282 };
283
284 i2c_pins: i2c_pins {
285 i2c_pins {
286 groups = "i2c";
287 function = "i2c";
288 };
289 };
290
291 spi_pins: spi_pins {
292 spi_pins {
293 groups = "spi";
294 function = "spi";
295 };
296 };
297
298 spi_cs1: spi1 {
299 spi1 {
300 groups = "pci";
301 function = "pci-func";
302 };
303 };
304
305 uartlite_pins: uartlite {
306 uart {
307 groups = "uartlite";
308 function = "uartlite";
309 };
310 };
311
312 pci_pins: pci {
313 pci {
314 groups = "pci";
315 function = "pci-fnc";
316 };
317 };
318 };
319
320 ethernet: ethernet@10100000 {
321 compatible = "ralink,rt3883-eth";
322 #address-cells = <1>;
323 #size-cells = <0>;
324 reg = <0x10100000 0x10000>;
325
326 resets = <&rstctrl 21>;
327 reset-names = "fe";
328
329 interrupt-parent = <&cpuintc>;
330 interrupts = <5>;
331
332 port@0 {
333 compatible = "ralink,rt3883-port", "mediatek,eth-port";
334 reg = <0>;
335 };
336
337 mdio-bus {
338 #address-cells = <1>;
339 #size-cells = <0>;
340
341 status = "disabled";
342 };
343 };
344
345 rstctrl: rstctrl {
346 compatible = "ralink,rt3883-reset", "ralink,rt2880-reset";
347 #reset-cells = <1>;
348 };
349
350 clkctrl: clkctrl {
351 compatible = "ralink,rt2880-clock";
352 #clock-cells = <1>;
353 };
354
355 pci: pci@10140000 {
356 compatible = "ralink,rt3883-pci";
357 reg = <0x10140000 0x20000>;
358 #address-cells = <1>;
359 #size-cells = <1>;
360 ranges; /* direct mapping */
361
362 pinctrl-names = "default";
363 pinctrl-0 = <&pci_pins>;
364
365 status = "disabled";
366
367 pciintc: interrupt-controller {
368 interrupt-controller;
369 #address-cells = <0>;
370 #interrupt-cells = <1>;
371
372 interrupt-parent = <&cpuintc>;
373 interrupts = <4>;
374 };
375
376 pci@0 {
377 #address-cells = <3>;
378 #size-cells = <2>;
379 #interrupt-cells = <1>;
380
381 device_type = "pci";
382
383 bus-range = <0 255>;
384 ranges = <
385 0x02000000 0 0x00000000 0x20000000 0 0x10000000 /* pci memory */
386 0x01000000 0 0x00000000 0x10160000 0 0x00010000 /* io space */
387 >;
388
389 interrupt-map-mask = <0xf800 0 0 7>;
390 interrupt-map = <
391 /* IDSEL 17 */
392 0x8800 0 0 1 &pciintc 18
393 0x8800 0 0 2 &pciintc 18
394 0x8800 0 0 3 &pciintc 18
395 0x8800 0 0 4 &pciintc 18
396 /* IDSEL 18 */
397 0x9000 0 0 1 &pciintc 19
398 0x9000 0 0 2 &pciintc 19
399 0x9000 0 0 3 &pciintc 19
400 0x9000 0 0 4 &pciintc 19
401 >;
402
403 pci1: pci@1 {
404 reg = <0x0800 0 0 0 0>;
405 device_type = "pci";
406 #interrupt-cells = <1>;
407 #address-cells = <3>;
408 #size-cells = <2>;
409
410 status = "disabled";
411
412 interrupt-map-mask = <0x0 0 0 0>;
413 interrupt-map = <0x0 0 0 0 &pciintc 20>;
414
415 bus-range = <1 255>;
416 ranges;
417 };
418
419 pci17: pci@11,0 {
420 reg = <0x8800 0 0 0 0>;
421 #interrupt-cells = <1>;
422 #address-cells = <3>;
423 #size-cells = <2>;
424
425 status = "disabled";
426 };
427
428 pci18: pci@12,0 {
429 reg = <0x9000 0 0 0 0>;
430 #interrupt-cells = <1>;
431 #address-cells = <3>;
432 #size-cells = <2>;
433
434 status = "disabled";
435 };
436 };
437 };
438
439 usbphy: usbphy {
440 compatible = "ralink,rt3352-usbphy";
441 #phy-cells = <0>;
442
443 ralink,sysctl = <&sysc>;
444 resets = <&rstctrl 22 &rstctrl 25>;
445 reset-names = "host", "device";
446 clocks = <&clkctrl 22 &clkctrl 25>;
447 clock-names = "host", "device";
448 };
449
450 wmac: wmac@10180000 {
451 compatible = "ralink,rt3883-wmac", "ralink,rt2880-wmac";
452 reg = <0x10180000 0x40000>;
453
454 interrupt-parent = <&cpuintc>;
455 interrupts = <6>;
456
457 ralink,eeprom = "soc_wmac.eeprom";
458 };
459
460 ehci: ehci@101c0000 {
461 #address-cells = <1>;
462 #size-cells = <0>;
463 compatible = "generic-ehci";
464 reg = <0x101c0000 0x1000>;
465
466 phys = <&usbphy>;
467 phy-names = "usb";
468
469 interrupt-parent = <&intc>;
470 interrupts = <18>;
471
472 status = "disabled";
473
474 ehci_port1: port@1 {
475 reg = <1>;
476 #trigger-source-cells = <0>;
477 };
478 };
479
480 ohci: ohci@101c1000 {
481 #address-cells = <1>;
482 #size-cells = <0>;
483 compatible = "generic-ohci";
484 reg = <0x101c1000 0x1000>;
485
486 phys = <&usbphy>;
487 phy-names = "usb";
488
489 interrupt-parent = <&intc>;
490 interrupts = <18>;
491
492 status = "disabled";
493
494 ohci_port1: port@1 {
495 reg = <1>;
496 #trigger-source-cells = <0>;
497 };
498 };
499 };