target/linux/ramips/patches-3.8/0130-GPIO-MIPS-ralink-adds-ralink-gpio-support.patch

   1 From 007ab7fe49bfcaa220372260eedeb4eed51f1631 Mon Sep 17 00:00:00 2001
   2 From: John Crispin <blogic@openwrt.org>
   3 Date: Tue, 22 Jan 2013 18:24:34 +0100
   4 Subject: [PATCH 130/137] GPIO: MIPS: ralink: adds ralink gpio support
   5
   6 Add gpio driver for Ralink SoC. This driver makes the gpio core on
   7 RT2880, RT305x, rt3352, rt3662, rt3883, rt5350 and mt7620 work.
   8
   9 Signed-off-by: John Crispin <blogic@openwrt.org>
  10 ---
  11  arch/mips/Kconfig                        |    1 +
  12  arch/mips/include/asm/mach-ralink/gpio.h |   24 ++++
  13  drivers/gpio/Kconfig                     |    6 +
  14  drivers/gpio/Makefile                    |    1 +
  15  drivers/gpio/gpio-ralink.c               |  176 ++++++++++++++++++++++++++++++
  16  5 files changed, 208 insertions(+)
  17  create mode 100644 arch/mips/include/asm/mach-ralink/gpio.h
  18  create mode 100644 drivers/gpio/gpio-ralink.c
  19
  20 Index: linux-3.8.11/arch/mips/Kconfig
  21 ===================================================================
  22 --- linux-3.8.11.orig/arch/mips/Kconfig 2013-05-04 13:20:48.399042973 +0200
  23 +++ linux-3.8.11/arch/mips/Kconfig      2013-05-04 13:20:54.963043258 +0200
  24 @@ -449,6 +449,7 @@
  25         select SYS_HAS_EARLY_PRINTK
  26         select HAVE_MACH_CLKDEV
  27         select CLKDEV_LOOKUP
  28 +       select ARCH_REQUIRE_GPIOLIB
  29
  30  config SGI_IP22
  31         bool "SGI IP22 (Indy/Indigo2)"
  32 Index: linux-3.8.11/arch/mips/include/asm/mach-ralink/gpio.h
  33 ===================================================================
  34 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
  35 +++ linux-3.8.11/arch/mips/include/asm/mach-ralink/gpio.h       2013-05-04 13:20:54.963043258 +0200
  36 @@ -0,0 +1,24 @@
  37 +/*
  38 + *  Ralink SoC GPIO API support
  39 + *
  40 + *  Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org>
  41 + *  Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
  42 + *
  43 + *  This program is free software; you can redistribute it and/or modify it
  44 + *  under the terms of the GNU General Public License version 2 as published
  45 + *  by the Free Software Foundation.
  46 + *
  47 + */
  48 +
  49 +#ifndef __ASM_MACH_RALINK_GPIO_H
  50 +#define __ASM_MACH_RALINK_GPIO_H
  51 +
  52 +#define ARCH_NR_GPIOS  128
  53 +#include <asm-generic/gpio.h>
  54 +
  55 +#define gpio_get_value __gpio_get_value
  56 +#define gpio_set_value __gpio_set_value
  57 +#define gpio_cansleep  __gpio_cansleep
  58 +#define gpio_to_irq    __gpio_to_irq
  59 +
  60 +#endif /* __ASM_MACH_RALINK_GPIO_H */
  61 Index: linux-3.8.11/drivers/gpio/Kconfig
  62 ===================================================================
  63 --- linux-3.8.11.orig/drivers/gpio/Kconfig      2013-05-04 13:20:48.399042973 +0200
  64 +++ linux-3.8.11/drivers/gpio/Kconfig   2013-05-04 13:20:54.963043258 +0200
  65 @@ -201,6 +201,12 @@
  66         help
  67           Say yes here to support the PXA GPIO device
  68
  69 +config GPIO_RALINK
  70 +       bool "Ralink GPIO Support"
  71 +       depends on RALINK
  72 +       help
  73 +         Say yes here to support the Ralink SoC GPIO device
  74 +
  75  config GPIO_SPEAR_SPICS
  76         bool "ST SPEAr13xx SPI Chip Select as GPIO support"
  77         depends on PLAT_SPEAR
  78 Index: linux-3.8.11/drivers/gpio/Makefile
  79 ===================================================================
  80 --- linux-3.8.11.orig/drivers/gpio/Makefile     2013-05-04 13:20:48.399042973 +0200
  81 +++ linux-3.8.11/drivers/gpio/Makefile  2013-05-04 13:20:54.963043258 +0200
  82 @@ -54,6 +54,7 @@
  83  obj-$(CONFIG_GPIO_PCH)         += gpio-pch.o
  84  obj-$(CONFIG_GPIO_PL061)       += gpio-pl061.o
  85  obj-$(CONFIG_GPIO_PXA)         += gpio-pxa.o
  86 +obj-$(CONFIG_GPIO_RALINK)      += gpio-ralink.o
  87  obj-$(CONFIG_GPIO_RC5T583)     += gpio-rc5t583.o
  88  obj-$(CONFIG_GPIO_RDC321X)     += gpio-rdc321x.o
  89  obj-$(CONFIG_PLAT_SAMSUNG)     += gpio-samsung.o
  90 Index: linux-3.8.11/drivers/gpio/gpio-ralink.c
  91 ===================================================================
  92 --- /dev/null   1970-01-01 00:00:00.000000000 +0000
  93 +++ linux-3.8.11/drivers/gpio/gpio-ralink.c     2013-05-06 11:39:24.816485479 +0200
  94 @@ -0,0 +1,182 @@
  95 +/*
  96 + * This program is free software; you can redistribute it and/or modify it
  97 + * under the terms of the GNU General Public License version 2 as published
  98 + * by the Free Software Foundation.
  99 + *
 100 + * Copyright (C) 2009-2011 Gabor Juhos <juhosg@openwrt.org>
 101 + * Copyright (C) 2013 John Crispin <blogic@openwrt.org>
 102 + */
 103 +
 104 +#include <linux/module.h>
 105 +#include <linux/io.h>
 106 +#include <linux/gpio.h>
 107 +#include <linux/spinlock.h>
 108 +#include <linux/platform_device.h>
 109 +
 110 +enum ralink_gpio_reg {
 111 +       GPIO_REG_INT = 0,
 112 +       GPIO_REG_EDGE,
 113 +       GPIO_REG_RENA,
 114 +       GPIO_REG_FENA,
 115 +       GPIO_REG_DATA,
 116 +       GPIO_REG_DIR,
 117 +       GPIO_REG_POL,
 118 +       GPIO_REG_SET,
 119 +       GPIO_REG_RESET,
 120 +       GPIO_REG_TOGGLE,
 121 +       GPIO_REG_MAX
 122 +};
 123 +
 124 +struct ralink_gpio_chip {
 125 +       struct gpio_chip chip;
 126 +       u8 regs[GPIO_REG_MAX];
 127 +
 128 +       spinlock_t lock;
 129 +       void __iomem *membase;
 130 +};
 131 +
 132 +static inline struct ralink_gpio_chip *to_ralink_gpio(struct gpio_chip *chip)
 133 +{
 134 +       struct ralink_gpio_chip *rg;
 135 +
 136 +       rg = container_of(chip, struct ralink_gpio_chip, chip);
 137 +       return rg;
 138 +}
 139 +
 140 +static inline void rt_gpio_w32(struct ralink_gpio_chip *rg, u8 reg, u32 val)
 141 +{
 142 +       iowrite32(val, rg->membase + rg->regs[reg]);
 143 +}
 144 +
 145 +static inline u32 rt_gpio_r32(struct ralink_gpio_chip *rg, u8 reg)
 146 +{
 147 +       return ioread32(rg->membase + rg->regs[reg]);
 148 +}
 149 +
 150 +static void ralink_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
 151 +{
 152 +       struct ralink_gpio_chip *rg = to_ralink_gpio(chip);
 153 +
 154 +       rt_gpio_w32(rg, (value) ? GPIO_REG_SET : GPIO_REG_RESET, BIT(offset));
 155 +}
 156 +
 157 +static int ralink_gpio_get(struct gpio_chip *chip, unsigned offset)
 158 +{
 159 +       struct ralink_gpio_chip *rg = to_ralink_gpio(chip);
 160 +
 161 +       return !!(rt_gpio_r32(rg, GPIO_REG_DATA) & BIT(offset));
 162 +}
 163 +
 164 +static int ralink_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
 165 +{
 166 +       struct ralink_gpio_chip *rg = to_ralink_gpio(chip);
 167 +       unsigned long flags;
 168 +       u32 t;
 169 +
 170 +       spin_lock_irqsave(&rg->lock, flags);
 171 +       t = rt_gpio_r32(rg, GPIO_REG_DIR);
 172 +       t &= ~BIT(offset);
 173 +       rt_gpio_w32(rg, GPIO_REG_DIR, t);
 174 +       spin_unlock_irqrestore(&rg->lock, flags);
 175 +
 176 +       return 0;
 177 +}
 178 +
 179 +static int ralink_gpio_direction_output(struct gpio_chip *chip,
 180 +                                       unsigned offset, int value)
 181 +{
 182 +       struct ralink_gpio_chip *rg = to_ralink_gpio(chip);
 183 +       unsigned long flags;
 184 +       u32 t;
 185 +
 186 +       spin_lock_irqsave(&rg->lock, flags);
 187 +       ralink_gpio_set(chip, offset, value);
 188 +       t = rt_gpio_r32(rg, GPIO_REG_DIR);
 189 +       t |= BIT(offset);
 190 +       rt_gpio_w32(rg, GPIO_REG_DIR, t);
 191 +       spin_unlock_irqrestore(&rg->lock, flags);
 192 +
 193 +       return 0;
 194 +}
 195 +
 196 +static int ralink_gpio_probe(struct platform_device *pdev)
 197 +{
 198 +       struct device_node *np = pdev->dev.of_node;
 199 +       struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 200 +       struct ralink_gpio_chip *gc;
 201 +       const __be32 *ngpio;
 202 +       const __be32 *gpiobase;
 203 +
 204 +       if (!res) {
 205 +               dev_err(&pdev->dev, "failed to find resource\n");
 206 +               return -ENOMEM;
 207 +       }
 208 +
 209 +       gc = devm_kzalloc(&pdev->dev,
 210 +                               sizeof(struct ralink_gpio_chip), GFP_KERNEL);
 211 +       if (!gc)
 212 +               return -ENOMEM;
 213 +
 214 +       gc->membase = devm_request_and_ioremap(&pdev->dev, res);
 215 +       if (!gc->membase) {
 216 +               dev_err(&pdev->dev, "cannot remap I/O memory region\n");
 217 +               return -ENOMEM;
 218 +       }
 219 +
 220 +       if (of_property_read_u8_array(np, "ralink,register-map",
 221 +                       gc->regs, GPIO_REG_MAX)) {
 222 +               dev_err(&pdev->dev, "failed to read register definition\n");
 223 +               return -EINVAL;
 224 +       }
 225 +
 226 +       ngpio = of_get_property(np, "ralink,num-gpios", NULL);
 227 +       if (!ngpio) {
 228 +               dev_err(&pdev->dev, "failed to read number of pins\n");
 229 +               return -EINVAL;
 230 +       }
 231 +
 232 +       gpiobase = of_get_property(np, "ralink,gpio-base", NULL);
 233 +       if (gpiobase)
 234 +               gc->chip.base = be32_to_cpu(*gpiobase);
 235 +       else
 236 +               gc->chip.base = -1;
 237 +
 238 +       gc->chip.label = dev_name(&pdev->dev);
 239 +       gc->chip.of_node = np;
 240 +       gc->chip.ngpio = be32_to_cpu(*ngpio);
 241 +       gc->chip.direction_input = ralink_gpio_direction_input;
 242 +       gc->chip.direction_output = ralink_gpio_direction_output;
 243 +       gc->chip.get = ralink_gpio_get;
 244 +       gc->chip.set = ralink_gpio_set;
 245 +
 246 +       spin_lock_init(&gc->lock);
 247 +
 248 +       /* set polarity to low for all lines */
 249 +       rt_gpio_w32(gc, GPIO_REG_POL, 0);
 250 +
 251 +       dev_info(&pdev->dev, "registering %d gpios\n", gc->chip.ngpio);
 252 +
 253 +       return gpiochip_add(&gc->chip);
 254 +}
 255 +
 256 +static const struct of_device_id ralink_gpio_match[] = {
 257 +       { .compatible = "ralink,rt2880-gpio" },
 258 +       {},
 259 +};
 260 +MODULE_DEVICE_TABLE(of, ralink_gpio_match);
 261 +
 262 +static struct platform_driver ralink_gpio_driver = {
 263 +       .probe = ralink_gpio_probe,
 264 +       .driver = {
 265 +               .name = "rt2880_gpio",
 266 +               .owner = THIS_MODULE,
 267 +               .of_match_table = ralink_gpio_match,
 268 +       },
 269 +};
 270 +
 271 +static int __init ralink_gpio_init(void)
 272 +{
 273 +       return platform_driver_register(&ralink_gpio_driver);
 274 +}
 275 +
 276 +subsys_initcall(ralink_gpio_init);