target/linux/adm5120/files/arch/mips/adm5120/memory.c

   1 /*
   2  *  $Id$
   3  *
   4  *  Copyright (C) 2007 OpenWrt.org
   5  *  Copyright (C) 2007 Gabor Juhos <juhosg at openwrt.org>
   6  *
   7  *  This program is free software; you can redistribute it and/or modify it
   8  *  under the terms of the GNU General Public License version 2 as published
   9  *  by the Free Software Foundation.
  10  *
  11  */
  12
  13 #include <linux/init.h>
  14 #include <linux/types.h>
  15 #include <linux/kernel.h>
  16 #include <linux/io.h>
  17
  18 #include <asm/bootinfo.h>
  19 #include <asm/addrspace.h>
  20
  21 #include <adm5120_info.h>
  22 #include <adm5120_defs.h>
  23 #include <adm5120_switch.h>
  24 #include <adm5120_mpmc.h>
  25
  26 #ifdef DEBUG
  27 #  define mem_dbg(f, a...)      printk(KERN_INFO "mem_detect: " f, ## a)
  28 #else
  29 #  define mem_dbg(f, a...)
  30 #endif
  31
  32 unsigned long adm5120_memsize;
  33
  34 #define MEM_READL(a)            __raw_readl((void __iomem *)(a))
  35 #define MEM_WRITEL(a, v)        __raw_writel((v), (void __iomem *)(a))
  36
  37 static int __init mem_check_pattern(u8 *addr, unsigned long offs)
  38 {
  39         u32 *p1 = (u32 *)addr;
  40         u32 *p2 = (u32 *)(addr+offs);
  41         u32 t, u, v;
  42
  43         /* save original value */
  44         t = MEM_READL(p1);
  45
  46         u = MEM_READL(p2);
  47         if (t != u)
  48                 return 0;
  49
  50         v = 0x55555555;
  51         if (u == v)
  52                 v = 0xAAAAAAAA;
  53
  54         mem_dbg("write 0x%08X to 0x%08lX\n", v, (unsigned long)p1);
  55
  56         MEM_WRITEL(p1, v);
  57         adm5120_ndelay(1000);
  58         u = MEM_READL(p2);
  59
  60         mem_dbg("pattern at 0x%08lX is 0x%08X\n", (unsigned long)p2, u);
  61
  62         /* restore original value */
  63         MEM_WRITEL(p1, t);
  64
  65         return (v == u);
  66 }
  67
  68 static void __init adm5120_detect_memsize(void)
  69 {
  70         u32     memctrl;
  71         u32     size, maxsize;
  72         u8      *p;
  73
  74         memctrl = SW_READ_REG(SWITCH_REG_MEMCTRL);
  75         switch (memctrl & MEMCTRL_SDRS_MASK) {
  76         case MEMCTRL_SDRS_4M:
  77                 maxsize = 4 << 20;
  78                 break;
  79         case MEMCTRL_SDRS_8M:
  80                 maxsize = 8 << 20;
  81                 break;
  82         case MEMCTRL_SDRS_16M:
  83                 maxsize = 16 << 20;
  84                 break;
  85         default:
  86                 maxsize = 64 << 20;
  87                 break;
  88         }
  89
  90         mem_dbg("checking for %uMB chip in 1st bank\n", maxsize >> 20);
  91
  92         /* detect size of the 1st SDRAM bank */
  93         p = (u8 *)KSEG1ADDR(0);
  94         for (size = 2<<20; size <= (maxsize >> 1); size <<= 1) {
  95                 if (mem_check_pattern(p, size)) {
  96                         /* mirrored address */
  97                         mem_dbg("mirrored data found at offset 0x%08X\n", size);
  98                         break;
  99                 }
 100         }
 101
 102         mem_dbg("chip size in 1st bank is %uMB\n", size >> 20);
 103         adm5120_memsize = size;
 104
 105         if (size != maxsize)
 106                 /* 2nd bank is not supported */
 107                 goto out;
 108
 109         if ((memctrl & MEMCTRL_SDR1_ENABLE) == 0)
 110                 /* 2nd bank is disabled */
 111                 goto out;
 112
 113         /*
 114          * some bootloaders enable 2nd bank, even if the 2nd SDRAM chip
 115          * are missing.
 116          */
 117         mem_dbg("check presence of 2nd bank\n");
 118
 119         p = (u8 *)KSEG1ADDR(maxsize+size-4);
 120         if (mem_check_pattern(p, 0))
 121                 adm5120_memsize += size;
 122
 123         if (maxsize != size) {
 124                 /* adjusting MECTRL register */
 125                 memctrl &= ~(MEMCTRL_SDRS_MASK);
 126                 switch (size>>20) {
 127                 case 4:
 128                         memctrl |= MEMCTRL_SDRS_4M;
 129                         break;
 130                 case 8:
 131                         memctrl |= MEMCTRL_SDRS_8M;
 132                         break;
 133                 case 16:
 134                         memctrl |= MEMCTRL_SDRS_16M;
 135                         break;
 136                 default:
 137                         memctrl |= MEMCTRL_SDRS_64M;
 138                         break;
 139                 }
 140                 SW_WRITE_REG(SWITCH_REG_MEMCTRL, memctrl);
 141         }
 142
 143 out:
 144         mem_dbg("%dx%uMB memory found\n", (adm5120_memsize == size) ? 1 : 2 ,
 145                 size>>20);
 146 }
 147
 148 void __init adm5120_mem_init(void)
 149 {
 150         adm5120_detect_memsize();
 151         add_memory_region(0, adm5120_memsize, BOOT_MEM_RAM);
 152 }