2 * Platform driver for the Realtek RTL8366 ethernet switch
4 * Copyright (C) 2009 Gabor Juhos <juhosg@openwrt.org>
5 * Copyright (C) 2010 Antti Seppälä <a.seppala@gmail.com>
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published
9 * by the Free Software Foundation.
12 #include <linux/kernel.h>
13 #include <linux/module.h>
14 #include <linux/init.h>
15 #include <linux/platform_device.h>
16 #include <linux/delay.h>
17 #include <linux/gpio.h>
18 #include <linux/spinlock.h>
19 #include <linux/skbuff.h>
20 #include <linux/switch.h>
21 #include <linux/phy.h>
22 #include <linux/rtl8366_smi.h>
24 #ifdef CONFIG_RTL8366_SMI_DEBUG_FS
25 #include <linux/debugfs.h>
28 #define RTL8366_SMI_DRIVER_NAME "rtl8366-smi"
29 #define RTL8366_SMI_DRIVER_DESC "Realtek RTL8366 switch driver"
30 #define RTL8366_SMI_DRIVER_VER "0.1.1"
32 #define RTL8366S_PHY_NO_MAX 4
33 #define RTL8366S_PHY_PAGE_MAX 7
34 #define RTL8366S_PHY_ADDR_MAX 31
36 #define RTL8366_CHIP_GLOBAL_CTRL_REG 0x0000
37 #define RTL8366_CHIP_CTRL_VLAN (1 << 13)
39 #define RTL8366_RESET_CTRL_REG 0x0100
40 #define RTL8366_CHIP_CTRL_RESET_HW 1
41 #define RTL8366_CHIP_CTRL_RESET_SW (1 << 1)
43 #define RTL8366S_CHIP_VERSION_CTRL_REG 0x0104
44 #define RTL8366S_CHIP_VERSION_MASK 0xf
45 #define RTL8366S_CHIP_ID_REG 0x0105
46 #define RTL8366S_CHIP_ID_8366 0x8366
48 /* PHY registers control */
49 #define RTL8366S_PHY_ACCESS_CTRL_REG 0x8028
50 #define RTL8366S_PHY_ACCESS_DATA_REG 0x8029
52 #define RTL8366S_PHY_CTRL_READ 1
53 #define RTL8366S_PHY_CTRL_WRITE 0
55 #define RTL8366S_PHY_REG_MASK 0x1f
56 #define RTL8366S_PHY_PAGE_OFFSET 5
57 #define RTL8366S_PHY_PAGE_MASK (0x7 << 5)
58 #define RTL8366S_PHY_NO_OFFSET 9
59 #define RTL8366S_PHY_NO_MASK (0x1f << 9)
61 #define RTL8366_SMI_ACK_RETRY_COUNT 5
62 #define RTL8366_SMI_CLK_DELAY 10 /* nsec */
64 /* LED control registers */
65 #define RTL8366_LED_BLINKRATE_REG 0x0420
66 #define RTL8366_LED_BLINKRATE_BIT 0
67 #define RTL8366_LED_BLINKRATE_MASK 0x0007
69 #define RTL8366_LED_CTRL_REG 0x0421
70 #define RTL8366_LED_0_1_CTRL_REG 0x0422
71 #define RTL8366_LED_2_3_CTRL_REG 0x0423
73 #define RTL8366S_MIB_COUNT 33
74 #define RTL8366S_GLOBAL_MIB_COUNT 1
75 #define RTL8366S_MIB_COUNTER_PORT_OFFSET 0x0040
76 #define RTL8366S_MIB_COUNTER_BASE 0x1000
77 #define RTL8366S_MIB_CTRL_REG 0x11F0
78 #define RTL8366S_MIB_CTRL_USER_MASK 0x01FF
79 #define RTL8366S_MIB_CTRL_BUSY_MASK 0x0001
80 #define RTL8366S_MIB_CTRL_RESET_MASK 0x0002
82 #define RTL8366S_MIB_CTRL_GLOBAL_RESET_MASK 0x0004
83 #define RTL8366S_MIB_CTRL_PORT_RESET_BIT 0x0003
84 #define RTL8366S_MIB_CTRL_PORT_RESET_MASK 0x01FC
87 #define RTL8366S_PORT_VLAN_CTRL_BASE 0x0058
88 #define RTL8366S_PORT_VLAN_CTRL_REG(_p) \
89 (RTL8366S_PORT_VLAN_CTRL_BASE + (_p) / 4)
90 #define RTL8366S_PORT_VLAN_CTRL_MASK 0xf
91 #define RTL8366S_PORT_VLAN_CTRL_SHIFT(_p) (4 * ((_p) % 4))
94 #define RTL8366S_VLAN_TABLE_READ_BASE 0x018B
95 #define RTL8366S_VLAN_TABLE_WRITE_BASE 0x0185
97 #define RTL8366S_VLAN_TB_CTRL_REG 0x010F
99 #define RTL8366S_TABLE_ACCESS_CTRL_REG 0x0180
100 #define RTL8366S_TABLE_VLAN_READ_CTRL 0x0E01
101 #define RTL8366S_TABLE_VLAN_WRITE_CTRL 0x0F01
103 #define RTL8366S_VLAN_MEMCONF_BASE 0x0016
106 #define RTL8366S_PORT_LINK_STATUS_BASE 0x0060
107 #define RTL8366S_PORT_STATUS_SPEED_MASK 0x0003
108 #define RTL8366S_PORT_STATUS_DUPLEX_MASK 0x0004
109 #define RTL8366S_PORT_STATUS_LINK_MASK 0x0010
110 #define RTL8366S_PORT_STATUS_TXPAUSE_MASK 0x0020
111 #define RTL8366S_PORT_STATUS_RXPAUSE_MASK 0x0040
112 #define RTL8366S_PORT_STATUS_AN_MASK 0x0080
115 #define RTL8366_PORT_NUM_CPU 5
116 #define RTL8366_NUM_PORTS 6
117 #define RTL8366_NUM_VLANS 16
118 #define RTL8366_NUM_LEDGROUPS 4
119 #define RTL8366_NUM_VIDS 4096
120 #define RTL8366S_PRIORITYMAX 7
121 #define RTL8366S_FIDMAX 7
124 #define RTL8366_PORT_1 (1 << 0) /* In userspace port 0 */
125 #define RTL8366_PORT_2 (1 << 1) /* In userspace port 1 */
126 #define RTL8366_PORT_3 (1 << 2) /* In userspace port 2 */
127 #define RTL8366_PORT_4 (1 << 3) /* In userspace port 3 */
129 #define RTL8366_PORT_UNKNOWN (1 << 4) /* No known connection */
130 #define RTL8366_PORT_CPU (1 << 5) /* CPU port */
132 #define RTL8366_PORT_ALL (RTL8366_PORT_1 | \
136 RTL8366_PORT_UNKNOWN | \
139 #define RTL8366_PORT_ALL_BUT_CPU (RTL8366_PORT_1 | \
143 RTL8366_PORT_UNKNOWN)
145 #define RTL8366_PORT_ALL_EXTERNAL (RTL8366_PORT_1 | \
150 #define RTL8366_PORT_ALL_INTERNAL (RTL8366_PORT_UNKNOWN | \
153 struct rtl8366s_vlanconfig
{
164 struct rtl8366s_vlan4kentry
{
174 static const char *MIBCOUNTERS
[] = {
177 "EtherStatsUnderSizePkts ",
179 "EtherStatsPkts64Octets ",
180 "EtherStatsPkts65to127Octets ",
181 "EtherStatsPkts128to255Octets ",
182 "EtherStatsPkts256to511Octets ",
183 "EtherStatsPkts512to1023Octets ",
184 "EtherStatsPkts1024to1518Octets ",
185 "EtherOversizeStats ",
186 "EtherStatsJabbers ",
188 "EtherStatsMulticastPkts ",
189 "EtherStatsBroadcastPkts ",
190 "EtherStatsDropEvents ",
191 "Dot3StatsFCSErrors ",
192 "Dot3StatsSymbolErrors ",
193 "Dot3InPauseFrames ",
194 "Dot3ControlInUnknownOpcodes ",
196 "Dot3StatsSingleCollisionFrames ",
197 "Dot3StatMultipleCollisionFrames ",
198 "Dot3sDeferredTransmissions ",
199 "Dot3StatsLateCollisions ",
200 "EtherStatsCollisions ",
201 "Dot3StatsExcessiveCollisions ",
202 "Dot3OutPauseFrames ",
203 "Dot1dBasePortDelayExceededDiscards",
204 "Dot1dTpPortInDiscards ",
206 "IfOutMulticastPkts ",
207 "IfOutBroadcastPkts ",
212 struct platform_device
*pdev
;
213 struct rtl8366_smi_platform_data
*pdata
;
215 struct mii_bus
*mii_bus
;
216 struct switch_dev dev
;
217 int mii_irq
[PHY_MAX_ADDR
];
219 #ifdef CONFIG_RTL8366_SMI_DEBUG_FS
220 struct dentry
*debugfs_root
;
224 #ifdef CONFIG_RTL8366_SMI_DEBUG_FS
228 static inline struct rtl8366_smi
*sw_to_rtl8366(struct switch_dev
*sw
)
230 return container_of(sw
, struct rtl8366_smi
, dev
);
233 static inline void rtl8366_smi_clk_delay(struct rtl8366_smi
*smi
)
235 ndelay(RTL8366_SMI_CLK_DELAY
);
238 static void rtl8366_smi_start(struct rtl8366_smi
*smi
)
240 unsigned int sda
= smi
->pdata
->gpio_sda
;
241 unsigned int sck
= smi
->pdata
->gpio_sck
;
244 * Set GPIO pins to output mode, with initial state:
247 gpio_direction_output(sck
, 0);
248 gpio_direction_output(sda
, 1);
249 rtl8366_smi_clk_delay(smi
);
251 /* CLK 1: 0 -> 1, 1 -> 0 */
252 gpio_set_value(sck
, 1);
253 rtl8366_smi_clk_delay(smi
);
254 gpio_set_value(sck
, 0);
255 rtl8366_smi_clk_delay(smi
);
258 gpio_set_value(sck
, 1);
259 rtl8366_smi_clk_delay(smi
);
260 gpio_set_value(sda
, 0);
261 rtl8366_smi_clk_delay(smi
);
262 gpio_set_value(sck
, 0);
263 rtl8366_smi_clk_delay(smi
);
264 gpio_set_value(sda
, 1);
267 static void rtl8366_smi_stop(struct rtl8366_smi
*smi
)
269 unsigned int sda
= smi
->pdata
->gpio_sda
;
270 unsigned int sck
= smi
->pdata
->gpio_sck
;
272 rtl8366_smi_clk_delay(smi
);
273 gpio_set_value(sda
, 0);
274 gpio_set_value(sck
, 1);
275 rtl8366_smi_clk_delay(smi
);
276 gpio_set_value(sda
, 1);
277 rtl8366_smi_clk_delay(smi
);
278 gpio_set_value(sck
, 1);
279 rtl8366_smi_clk_delay(smi
);
280 gpio_set_value(sck
, 0);
281 rtl8366_smi_clk_delay(smi
);
282 gpio_set_value(sck
, 1);
285 rtl8366_smi_clk_delay(smi
);
286 gpio_set_value(sck
, 0);
287 rtl8366_smi_clk_delay(smi
);
288 gpio_set_value(sck
, 1);
290 /* set GPIO pins to input mode */
291 gpio_direction_input(sda
);
292 gpio_direction_input(sck
);
295 static void rtl8366_smi_write_bits(struct rtl8366_smi
*smi
, u32 data
, u32 len
)
297 unsigned int sda
= smi
->pdata
->gpio_sda
;
298 unsigned int sck
= smi
->pdata
->gpio_sck
;
300 for (; len
> 0; len
--) {
301 rtl8366_smi_clk_delay(smi
);
304 if ( data
& ( 1 << (len
- 1)) )
305 gpio_set_value(sda
, 1);
307 gpio_set_value(sda
, 0);
308 rtl8366_smi_clk_delay(smi
);
311 gpio_set_value(sck
, 1);
312 rtl8366_smi_clk_delay(smi
);
313 gpio_set_value(sck
, 0);
317 static void rtl8366_smi_read_bits(struct rtl8366_smi
*smi
, u32 len
, u32
*data
)
319 unsigned int sda
= smi
->pdata
->gpio_sda
;
320 unsigned int sck
= smi
->pdata
->gpio_sck
;
322 gpio_direction_input(sda
);
324 for (*data
= 0; len
> 0; len
--) {
327 rtl8366_smi_clk_delay(smi
);
330 gpio_set_value(sck
, 1);
331 rtl8366_smi_clk_delay(smi
);
332 u
= gpio_get_value(sda
);
333 gpio_set_value(sck
, 0);
335 *data
|= (u
<< (len
- 1));
338 gpio_direction_output(sda
, 0);
341 static int rtl8366_smi_wait_for_ack(struct rtl8366_smi
*smi
)
349 rtl8366_smi_read_bits(smi
, 1, &ack
);
353 if (++retry_cnt
> RTL8366_SMI_ACK_RETRY_COUNT
)
360 static int rtl8366_smi_write_byte(struct rtl8366_smi
*smi
, u8 data
)
362 rtl8366_smi_write_bits(smi
, data
, 8);
363 return rtl8366_smi_wait_for_ack(smi
);
366 static int rtl8366_smi_read_byte0(struct rtl8366_smi
*smi
, u8
*data
)
371 rtl8366_smi_read_bits(smi
, 8, &t
);
375 rtl8366_smi_write_bits(smi
, 0x00, 1);
380 static int rtl8366_smi_read_byte1(struct rtl8366_smi
*smi
, u8
*data
)
385 rtl8366_smi_read_bits(smi
, 8, &t
);
389 rtl8366_smi_write_bits(smi
, 0x01, 1);
394 static int rtl8366_smi_read_reg(struct rtl8366_smi
*smi
, u32 addr
, u32
*data
)
401 spin_lock_irqsave(&smi
->lock
, flags
);
403 rtl8366_smi_start(smi
);
405 /* send READ command */
406 ret
= rtl8366_smi_write_byte(smi
, 0x0a << 4 | 0x04 << 1 | 0x01);
411 ret
= rtl8366_smi_write_byte(smi
, addr
& 0xff);
416 ret
= rtl8366_smi_write_byte(smi
, addr
>> 8);
421 rtl8366_smi_read_byte0(smi
, &lo
);
422 /* read DATA[15:8] */
423 rtl8366_smi_read_byte1(smi
, &hi
);
425 *data
= ((u32
) lo
) | (((u32
) hi
) << 8);
430 rtl8366_smi_stop(smi
);
431 spin_unlock_irqrestore(&smi
->lock
, flags
);
436 static int rtl8366_smi_write_reg(struct rtl8366_smi
*smi
, u32 addr
, u32 data
)
441 spin_lock_irqsave(&smi
->lock
, flags
);
443 rtl8366_smi_start(smi
);
445 /* send WRITE command */
446 ret
= rtl8366_smi_write_byte(smi
, 0x0a << 4 | 0x04 << 1 | 0x00);
451 ret
= rtl8366_smi_write_byte(smi
, addr
& 0xff);
456 ret
= rtl8366_smi_write_byte(smi
, addr
>> 8);
460 /* write DATA[7:0] */
461 ret
= rtl8366_smi_write_byte(smi
, data
& 0xff);
465 /* write DATA[15:8] */
466 ret
= rtl8366_smi_write_byte(smi
, data
>> 8);
473 rtl8366_smi_stop(smi
);
474 spin_unlock_irqrestore(&smi
->lock
, flags
);
479 static int rtl8366_smi_read_phy_reg(struct rtl8366_smi
*smi
,
480 u32 phy_no
, u32 page
, u32 addr
, u32
*data
)
485 if (phy_no
> RTL8366S_PHY_NO_MAX
)
488 if (page
> RTL8366S_PHY_PAGE_MAX
)
491 if (addr
> RTL8366S_PHY_ADDR_MAX
)
494 ret
= rtl8366_smi_write_reg(smi
, RTL8366S_PHY_ACCESS_CTRL_REG
,
495 RTL8366S_PHY_CTRL_READ
);
499 reg
= 0x8000 | (1 << (phy_no
+ RTL8366S_PHY_NO_OFFSET
)) |
500 ((page
<< RTL8366S_PHY_PAGE_OFFSET
) & RTL8366S_PHY_PAGE_MASK
) |
501 (addr
& RTL8366S_PHY_REG_MASK
);
503 ret
= rtl8366_smi_write_reg(smi
, reg
, 0);
507 ret
= rtl8366_smi_read_reg(smi
, RTL8366S_PHY_ACCESS_DATA_REG
, data
);
514 static int rtl8366_smi_write_phy_reg(struct rtl8366_smi
*smi
,
515 u32 phy_no
, u32 page
, u32 addr
, u32 data
)
520 if (phy_no
> RTL8366S_PHY_NO_MAX
)
523 if (page
> RTL8366S_PHY_PAGE_MAX
)
526 if (addr
> RTL8366S_PHY_ADDR_MAX
)
529 ret
= rtl8366_smi_write_reg(smi
, RTL8366S_PHY_ACCESS_CTRL_REG
,
530 RTL8366S_PHY_CTRL_WRITE
);
534 reg
= 0x8000 | (1 << (phy_no
+ RTL8366S_PHY_NO_OFFSET
)) |
535 ((page
<< RTL8366S_PHY_PAGE_OFFSET
) & RTL8366S_PHY_PAGE_MASK
) |
536 (addr
& RTL8366S_PHY_REG_MASK
);
538 ret
= rtl8366_smi_write_reg(smi
, reg
, data
);
545 static int rtl8366_get_mib_counter(struct rtl8366_smi
*smi
, int counter
,
546 int port
, unsigned long long *val
)
550 u32 addr
, data
, regoffset
;
553 /* address offset to MIBs counter */
554 const u16 mibLength
[RTL8366S_MIB_COUNT
] = {4, 4, 2, 2, 2, 2, 2, 2, 2,
555 2, 2, 2, 2, 2, 2, 2, 2, 2,
556 2, 2, 4, 2, 2, 2, 2, 2, 2,
559 if (port
> RTL8366_NUM_PORTS
|| counter
>= RTL8366S_MIB_COUNT
)
562 regoffset
= RTL8366S_MIB_COUNTER_PORT_OFFSET
* (port
);
564 for (i
= 0; i
< counter
; i
++)
565 regoffset
+= mibLength
[i
];
567 addr
= RTL8366S_MIB_COUNTER_BASE
+ regoffset
;
570 * Writing access counter address first
571 * then ASIC will prepare 64bits counter wait for being retrived
573 data
= 0; /* writing data will be discard by ASIC */
574 err
= rtl8366_smi_write_reg(smi
, addr
, data
);
578 /* read MIB control register */
579 err
= rtl8366_smi_read_reg(smi
, RTL8366S_MIB_CTRL_REG
, &data
);
583 if (data
& RTL8366S_MIB_CTRL_BUSY_MASK
)
586 if (data
& RTL8366S_MIB_CTRL_RESET_MASK
)
590 addr
= addr
+ mibLength
[counter
] - 1;
591 i
= mibLength
[counter
];
594 err
= rtl8366_smi_read_reg(smi
, addr
, &data
);
598 mibvalue
= (mibvalue
<< 16) | (data
& 0xFFFF);
608 static int rtl8366s_get_vlan_4k_entry(struct rtl8366_smi
*smi
, u32 vid
,
609 struct rtl8366s_vlan4kentry
*vlan4k
)
615 memset(vlan4k
, '\0', sizeof(struct rtl8366s_vlan4kentry
));
618 if (vid
>= RTL8366_NUM_VIDS
)
621 tableaddr
= (u16
*)vlan4k
;
625 err
= rtl8366_smi_write_reg(smi
, RTL8366S_VLAN_TABLE_WRITE_BASE
, data
);
629 /* write table access control word */
630 err
= rtl8366_smi_write_reg(smi
, RTL8366S_TABLE_ACCESS_CTRL_REG
,
631 RTL8366S_TABLE_VLAN_READ_CTRL
);
635 err
= rtl8366_smi_read_reg(smi
, RTL8366S_VLAN_TABLE_READ_BASE
, &data
);
642 err
= rtl8366_smi_read_reg(smi
, RTL8366S_VLAN_TABLE_READ_BASE
+ 1,
653 static int rtl8366s_set_vlan_4k_entry(struct rtl8366_smi
*smi
,
654 const struct rtl8366s_vlan4kentry
*vlan4k
)
660 if (vlan4k
->vid
>= RTL8366_NUM_VIDS
||
661 vlan4k
->member
> RTL8366_PORT_ALL
||
662 vlan4k
->untag
> RTL8366_PORT_ALL
||
663 vlan4k
->fid
> RTL8366S_FIDMAX
)
666 tableaddr
= (u16
*)vlan4k
;
670 err
= rtl8366_smi_write_reg(smi
, RTL8366S_VLAN_TABLE_WRITE_BASE
, data
);
678 err
= rtl8366_smi_write_reg(smi
, RTL8366S_VLAN_TABLE_WRITE_BASE
+ 1,
683 /* write table access control word */
684 err
= rtl8366_smi_write_reg(smi
, RTL8366S_TABLE_ACCESS_CTRL_REG
,
685 RTL8366S_TABLE_VLAN_WRITE_CTRL
);
690 static int rtl8366s_get_vlan_member_config(struct rtl8366_smi
*smi
, u32 index
,
691 struct rtl8366s_vlanconfig
*vlanmc
)
698 memset(vlanmc
, '\0', sizeof(struct rtl8366s_vlanconfig
));
700 if (index
>= RTL8366_NUM_VLANS
)
703 tableaddr
= (u16
*)vlanmc
;
705 addr
= RTL8366S_VLAN_MEMCONF_BASE
+ (index
<< 1);
706 err
= rtl8366_smi_read_reg(smi
, addr
, &data
);
713 addr
= RTL8366S_VLAN_MEMCONF_BASE
+ 1 + (index
<< 1);
714 err
= rtl8366_smi_read_reg(smi
, addr
, &data
);
723 static int rtl8366s_set_vlan_member_config(struct rtl8366_smi
*smi
, u32 index
,
724 const struct rtl8366s_vlanconfig
732 if (index
>= RTL8366_NUM_VLANS
||
733 vlanmc
->vid
>= RTL8366_NUM_VIDS
||
734 vlanmc
->priority
> RTL8366S_PRIORITYMAX
||
735 vlanmc
->member
> RTL8366_PORT_ALL
||
736 vlanmc
->untag
> RTL8366_PORT_ALL
||
737 vlanmc
->fid
> RTL8366S_FIDMAX
)
740 addr
= RTL8366S_VLAN_MEMCONF_BASE
+ (index
<< 1);
742 tableaddr
= (u16
*)vlanmc
;
745 err
= rtl8366_smi_write_reg(smi
, addr
, data
);
749 addr
= RTL8366S_VLAN_MEMCONF_BASE
+ 1 + (index
<< 1);
754 err
= rtl8366_smi_write_reg(smi
, addr
, data
);
761 static int rtl8366_get_port_vlan_index(struct rtl8366_smi
*smi
, int port
,
767 if (port
>= RTL8366_NUM_PORTS
)
770 err
= rtl8366_smi_read_reg(smi
, RTL8366S_PORT_VLAN_CTRL_REG(port
),
775 *val
= (data
>> RTL8366S_PORT_VLAN_CTRL_SHIFT(port
)) &
776 RTL8366S_PORT_VLAN_CTRL_MASK
;
782 static int rtl8366_get_vlan_port_pvid(struct rtl8366_smi
*smi
, int port
,
785 struct rtl8366s_vlanconfig vlanmc
;
789 err
= rtl8366_get_port_vlan_index(smi
, port
, &index
);
793 err
= rtl8366s_get_vlan_member_config(smi
, index
, &vlanmc
);
801 static int rtl8366_set_port_vlan_index(struct rtl8366_smi
*smi
, int port
,
807 if (port
>= RTL8366_NUM_PORTS
|| index
>= RTL8366_NUM_VLANS
)
810 err
= rtl8366_smi_read_reg(smi
, RTL8366S_PORT_VLAN_CTRL_REG(port
),
815 data
&= ~(RTL8366S_PORT_VLAN_CTRL_MASK
<<
816 RTL8366S_PORT_VLAN_CTRL_SHIFT(port
));
817 data
|= (index
& RTL8366S_PORT_VLAN_CTRL_MASK
) <<
818 RTL8366S_PORT_VLAN_CTRL_SHIFT(port
);
820 err
= rtl8366_smi_write_reg(smi
, RTL8366S_PORT_VLAN_CTRL_REG(port
),
825 static int rtl8366_set_vlan_port_pvid(struct rtl8366_smi
*smi
, int port
,
829 struct rtl8366s_vlanconfig vlanmc
;
830 struct rtl8366s_vlan4kentry vlan4k
;
832 if (port
>= RTL8366_NUM_PORTS
|| val
>= RTL8366_NUM_VIDS
)
835 /* Updating the 4K entry; lookup it and change the port member set */
836 rtl8366s_get_vlan_4k_entry(smi
, val
, &vlan4k
);
837 vlan4k
.member
|= ((1 << port
) | RTL8366_PORT_CPU
);
838 vlan4k
.untag
= RTL8366_PORT_ALL_BUT_CPU
;
839 rtl8366s_set_vlan_4k_entry(smi
, &vlan4k
);
842 * For the 16 entries more work needs to be done. First see if such
843 * VID is already there and change it
845 for (i
= 0; i
< RTL8366_NUM_VLANS
; ++i
) {
846 rtl8366s_get_vlan_member_config(smi
, i
, &vlanmc
);
848 /* Try to find an existing vid and update port member set */
849 if (val
== vlanmc
.vid
) {
850 vlanmc
.member
|= ((1 << port
) | RTL8366_PORT_CPU
);
851 rtl8366s_set_vlan_member_config(smi
, i
, &vlanmc
);
853 /* Now update PVID register settings */
854 rtl8366_set_port_vlan_index(smi
, port
, i
);
861 * PVID could not be found from vlan table. Replace unused (one that
862 * has no member ports) with new one
864 for (i
= 0; i
< RTL8366_NUM_VLANS
; ++i
) {
865 rtl8366s_get_vlan_member_config(smi
, i
, &vlanmc
);
868 * See if this vlan member configuration is unused. It is
869 * unused if member set contains no ports or CPU port only
871 if (!vlanmc
.member
|| vlanmc
.member
== RTL8366_PORT_CPU
) {
874 vlanmc
.untag
= RTL8366_PORT_ALL_BUT_CPU
;
875 vlanmc
.member
= ((1 << port
) | RTL8366_PORT_CPU
);
878 rtl8366s_set_vlan_member_config(smi
, i
, &vlanmc
);
880 /* Now update PVID register settings */
881 rtl8366_set_port_vlan_index(smi
, port
, i
);
887 dev_err(&smi
->pdev
->dev
,
888 "All 16 vlan member configurations are in use\n");
894 static int rtl8366_vlan_set_vlan(struct rtl8366_smi
*smi
, int enable
)
898 rtl8366_smi_read_reg(smi
, RTL8366_CHIP_GLOBAL_CTRL_REG
, &data
);
901 data
|= RTL8366_CHIP_CTRL_VLAN
;
903 data
&= ~RTL8366_CHIP_CTRL_VLAN
;
905 return rtl8366_smi_write_reg(smi
, RTL8366_CHIP_GLOBAL_CTRL_REG
, data
);
908 static int rtl8366_vlan_set_4ktable(struct rtl8366_smi
*smi
, int enable
)
912 rtl8366_smi_read_reg(smi
, RTL8366S_VLAN_TB_CTRL_REG
, &data
);
919 return rtl8366_smi_write_reg(smi
, RTL8366S_VLAN_TB_CTRL_REG
, data
);
922 static int rtl8366s_reset_vlan(struct rtl8366_smi
*smi
)
924 struct rtl8366s_vlan4kentry vlan4k
;
925 struct rtl8366s_vlanconfig vlanmc
;
929 /* clear 16 VLAN member configuration */
935 for (i
= 0; i
< RTL8366_NUM_VLANS
; i
++) {
936 err
= rtl8366s_set_vlan_member_config(smi
, i
, &vlanmc
);
941 /* Set a default VLAN with vid 1 to 4K table for all ports */
943 vlan4k
.member
= RTL8366_PORT_ALL
;
944 vlan4k
.untag
= RTL8366_PORT_ALL
;
946 err
= rtl8366s_set_vlan_4k_entry(smi
, &vlan4k
);
950 /* Set all ports PVID to default VLAN */
951 for (i
= 0; i
< RTL8366_NUM_PORTS
; i
++) {
952 err
= rtl8366_set_vlan_port_pvid(smi
, i
, 0);
960 #ifdef CONFIG_RTL8366_SMI_DEBUG_FS
961 static int rtl8366_debugfs_open(struct inode
*inode
, struct file
*file
)
963 file
->private_data
= inode
->i_private
;
967 static ssize_t
rtl8366_read_debugfs_mibs(struct file
*file
,
968 char __user
*user_buf
,
969 size_t count
, loff_t
*ppos
)
971 struct rtl8366_smi
*smi
= (struct rtl8366_smi
*)file
->private_data
;
973 char *buf
= smi
->buf
;
975 len
+= snprintf(buf
+ len
, sizeof(smi
->buf
) - len
, "MIB Counters:\n");
976 len
+= snprintf(buf
+ len
, sizeof(smi
->buf
) - len
, "Counter"
978 "Port 0 \t\t Port 1 \t\t Port 2 \t\t Port 3 \t\t "
981 for (i
= 0; i
< 33; ++i
) {
982 len
+= snprintf(buf
+ len
, sizeof(smi
->buf
) - len
, "%d:%s ",
984 for (j
= 0; j
< RTL8366_NUM_PORTS
; ++j
) {
985 unsigned long long counter
= 0;
987 if (!rtl8366_get_mib_counter(smi
, i
, j
, &counter
))
988 len
+= snprintf(buf
+ len
,
989 sizeof(smi
->buf
) - len
,
992 len
+= snprintf(buf
+ len
,
993 sizeof(smi
->buf
) - len
,
996 if (j
!= RTL8366_NUM_PORTS
- 1) {
997 if (counter
< 100000)
998 len
+= snprintf(buf
+ len
,
999 sizeof(smi
->buf
) - len
,
1002 len
+= snprintf(buf
+ len
,
1003 sizeof(smi
->buf
) - len
,
1007 len
+= snprintf(buf
+ len
, sizeof(smi
->buf
) - len
, "\n");
1010 len
+= snprintf(buf
+ len
, sizeof(smi
->buf
) - len
, "\n");
1012 return simple_read_from_buffer(user_buf
, count
, ppos
, buf
, len
);
1015 static ssize_t
rtl8366_read_debugfs_vlan(struct file
*file
,
1016 char __user
*user_buf
,
1017 size_t count
, loff_t
*ppos
)
1019 struct rtl8366_smi
*smi
= (struct rtl8366_smi
*)file
->private_data
;
1021 char *buf
= smi
->buf
;
1023 len
+= snprintf(buf
+ len
, sizeof(smi
->buf
) - len
,
1024 "VLAN Member Config:\n");
1025 len
+= snprintf(buf
+ len
, sizeof(smi
->buf
) - len
,
1026 "\t id \t vid \t prio \t member \t untag \t fid "
1029 for (i
= 0; i
< RTL8366_NUM_VLANS
; ++i
) {
1030 struct rtl8366s_vlanconfig vlanmc
;
1032 rtl8366s_get_vlan_member_config(smi
, i
, &vlanmc
);
1034 len
+= snprintf(buf
+ len
, sizeof(smi
->buf
) - len
,
1035 "\t[%d] \t %d \t %d \t 0x%04x \t 0x%04x \t %d "
1036 "\t", i
, vlanmc
.vid
, vlanmc
.priority
,
1037 vlanmc
.member
, vlanmc
.untag
, vlanmc
.fid
);
1039 for (j
= 0; j
< RTL8366_NUM_PORTS
; ++j
) {
1041 if (!rtl8366_get_port_vlan_index(smi
, j
, &index
)) {
1043 len
+= snprintf(buf
+ len
,
1044 sizeof(smi
->buf
) - len
,
1048 len
+= snprintf(buf
+ len
, sizeof(smi
->buf
) - len
, "\n");
1051 return simple_read_from_buffer(user_buf
, count
, ppos
, buf
, len
);
1054 static ssize_t
rtl8366_read_debugfs_reg(struct file
*file
,
1055 char __user
*user_buf
,
1056 size_t count
, loff_t
*ppos
)
1058 struct rtl8366_smi
*smi
= (struct rtl8366_smi
*)file
->private_data
;
1059 u32 t
, reg
= g_dbg_reg
;
1061 char *buf
= smi
->buf
;
1063 memset(buf
, '\0', sizeof(smi
->buf
));
1065 err
= rtl8366_smi_read_reg(smi
, reg
, &t
);
1067 len
+= snprintf(buf
, sizeof(smi
->buf
),
1068 "Read failed (reg: 0x%04x)\n", reg
);
1069 return simple_read_from_buffer(user_buf
, count
, ppos
, buf
, len
);
1072 len
+= snprintf(buf
, sizeof(smi
->buf
), "reg = 0x%04x, val = 0x%04x\n",
1075 return simple_read_from_buffer(user_buf
, count
, ppos
, buf
, len
);
1078 static ssize_t
rtl8366_write_debugfs_reg(struct file
*file
,
1079 const char __user
*user_buf
,
1080 size_t count
, loff_t
*ppos
)
1082 struct rtl8366_smi
*smi
= (struct rtl8366_smi
*)file
->private_data
;
1084 u32 reg
= g_dbg_reg
;
1087 char *buf
= smi
->buf
;
1089 len
= min(count
, sizeof(smi
->buf
) - 1);
1090 if (copy_from_user(buf
, user_buf
, len
)) {
1091 dev_err(&smi
->pdev
->dev
, "copy from user failed\n");
1096 if (len
> 0 && buf
[len
- 1] == '\n')
1097 buf
[len
- 1] = '\0';
1100 if (strict_strtoul(buf
, 16, &data
)) {
1101 dev_err(&smi
->pdev
->dev
, "Invalid reg value %s\n", buf
);
1103 err
= rtl8366_smi_write_reg(smi
, reg
, data
);
1105 dev_err(&smi
->pdev
->dev
,
1106 "writing reg 0x%04x val 0x%04lx failed\n",
1114 static const struct file_operations fops_rtl8366_regs
= {
1115 .read
= rtl8366_read_debugfs_reg
,
1116 .write
= rtl8366_write_debugfs_reg
,
1117 .open
= rtl8366_debugfs_open
,
1118 .owner
= THIS_MODULE
1121 static const struct file_operations fops_rtl8366_vlan
= {
1122 .read
= rtl8366_read_debugfs_vlan
,
1123 .open
= rtl8366_debugfs_open
,
1124 .owner
= THIS_MODULE
1127 static const struct file_operations fops_rtl8366_mibs
= {
1128 .read
= rtl8366_read_debugfs_mibs
,
1129 .open
= rtl8366_debugfs_open
,
1130 .owner
= THIS_MODULE
1133 static void rtl8366_debugfs_init(struct rtl8366_smi
*smi
)
1135 struct dentry
*node
;
1136 struct dentry
*root
;
1138 if (!smi
->debugfs_root
)
1139 smi
->debugfs_root
= debugfs_create_dir("rtl8366s", NULL
);
1141 if (!smi
->debugfs_root
) {
1142 dev_err(&smi
->pdev
->dev
, "Unable to create debugfs dir\n");
1145 root
= smi
->debugfs_root
;
1147 node
= debugfs_create_x16("reg", S_IRUGO
| S_IWUSR
, root
, &g_dbg_reg
);
1149 dev_err(&smi
->pdev
->dev
, "Creating debugfs file reg failed\n");
1153 node
= debugfs_create_file("val", S_IRUGO
| S_IWUSR
, root
, smi
,
1154 &fops_rtl8366_regs
);
1156 dev_err(&smi
->pdev
->dev
, "Creating debugfs file val failed\n");
1160 node
= debugfs_create_file("vlan", S_IRUSR
, root
, smi
,
1161 &fops_rtl8366_vlan
);
1163 dev_err(&smi
->pdev
->dev
,
1164 "Creating debugfs file vlan failed\n");
1168 node
= debugfs_create_file("mibs", S_IRUSR
, root
, smi
,
1169 &fops_rtl8366_mibs
);
1171 dev_err(&smi
->pdev
->dev
,
1172 "Creating debugfs file mibs failed\n");
1177 static void rtl8366_debugfs_remove(struct rtl8366_smi
*smi
)
1179 if (smi
->debugfs_root
) {
1180 debugfs_remove_recursive(smi
->debugfs_root
);
1181 smi
->debugfs_root
= NULL
;
1186 static inline void rtl8366_debugfs_init(struct rtl8366_smi
*smi
) {}
1187 static inline void rtl8366_debugfs_remove(struct rtl8366_smi
*smi
) {}
1188 #endif /* CONFIG_RTL8366_SMI_DEBUG_FS */
1190 static int rtl8366_global_reset_mibs(struct switch_dev
*dev
,
1191 const struct switch_attr
*attr
,
1192 struct switch_val
*val
)
1194 struct rtl8366_smi
*smi
= sw_to_rtl8366(dev
);
1197 if (val
->value
.i
== 1) {
1198 rtl8366_smi_read_reg(smi
, RTL8366S_MIB_CTRL_REG
, &data
);
1200 rtl8366_smi_write_reg(smi
, RTL8366S_MIB_CTRL_REG
, data
);
1206 static int rtl8366_get_vlan(struct switch_dev
*dev
,
1207 const struct switch_attr
*attr
,
1208 struct switch_val
*val
)
1210 struct rtl8366_smi
*smi
= sw_to_rtl8366(dev
);
1213 if (attr
->ofs
== 1) {
1214 rtl8366_smi_read_reg(smi
, RTL8366_CHIP_GLOBAL_CTRL_REG
, &data
);
1216 if (data
& RTL8366_CHIP_CTRL_VLAN
)
1220 } else if (attr
->ofs
== 2) {
1221 rtl8366_smi_read_reg(smi
, RTL8366S_VLAN_TB_CTRL_REG
, &data
);
1232 static int rtl8366_global_get_blinkrate(struct switch_dev
*dev
,
1233 const struct switch_attr
*attr
,
1234 struct switch_val
*val
)
1236 struct rtl8366_smi
*smi
= sw_to_rtl8366(dev
);
1239 rtl8366_smi_read_reg(smi
, RTL8366_LED_BLINKRATE_REG
, &data
);
1241 val
->value
.i
= (data
& (RTL8366_LED_BLINKRATE_MASK
));
1246 static int rtl8366_global_set_blinkrate(struct switch_dev
*dev
,
1247 const struct switch_attr
*attr
,
1248 struct switch_val
*val
)
1251 struct rtl8366_smi
*smi
= sw_to_rtl8366(dev
);
1253 if (val
->value
.i
>= 6)
1256 rtl8366_smi_read_reg(smi
, RTL8366_LED_BLINKRATE_REG
, &data
);
1258 data
&= ~RTL8366_LED_BLINKRATE_MASK
;
1259 data
|= val
->value
.i
;
1261 rtl8366_smi_write_reg(smi
, RTL8366_LED_BLINKRATE_REG
, data
);
1266 static int rtl8366_set_vlan(struct switch_dev
*dev
,
1267 const struct switch_attr
*attr
,
1268 struct switch_val
*val
)
1270 struct rtl8366_smi
*smi
= sw_to_rtl8366(dev
);
1273 return rtl8366_vlan_set_vlan(smi
, val
->value
.i
);
1275 return rtl8366_vlan_set_4ktable(smi
, val
->value
.i
);
1278 static int rtl8366_attr_get_port_link(struct switch_dev
*dev
,
1279 const struct switch_attr
*attr
,
1280 struct switch_val
*val
)
1282 u32 len
= 0, data
= 0;
1283 int speed
, duplex
, link
, txpause
, rxpause
, nway
;
1284 struct rtl8366_smi
*smi
= sw_to_rtl8366(dev
);
1285 char *buf
= smi
->buf
;
1287 if (val
->port_vlan
>= RTL8366_NUM_PORTS
)
1290 memset(buf
, '\0', sizeof(smi
->buf
));
1291 rtl8366_smi_read_reg(smi
, RTL8366S_PORT_LINK_STATUS_BASE
+
1292 (val
->port_vlan
>> 1),
1295 if (val
->port_vlan
& 0x1)
1298 speed
= (data
& RTL8366S_PORT_STATUS_SPEED_MASK
);
1299 duplex
= (data
& RTL8366S_PORT_STATUS_DUPLEX_MASK
) >> 2;
1300 link
= (data
& RTL8366S_PORT_STATUS_LINK_MASK
) >> 4;
1301 txpause
= (data
& RTL8366S_PORT_STATUS_TXPAUSE_MASK
) >> 5;
1302 rxpause
= (data
& RTL8366S_PORT_STATUS_RXPAUSE_MASK
) >> 6;
1303 nway
= (data
& RTL8366S_PORT_STATUS_AN_MASK
) >> 7;
1305 len
+= snprintf(buf
+ len
, sizeof(smi
->buf
) - len
, "Port %d: ",
1309 len
+= snprintf(buf
+ len
, sizeof(smi
->buf
) - len
,
1310 "Link UP, Speed: ");
1312 len
+= snprintf(buf
+ len
, sizeof(smi
->buf
) - len
,
1313 "Link DOWN, Speed: ");
1316 len
+= snprintf(buf
+ len
, sizeof(smi
->buf
) - len
,
1318 else if (speed
== 1)
1319 len
+= snprintf(buf
+ len
, sizeof(smi
->buf
) - len
,
1321 else if (speed
== 2)
1322 len
+= snprintf(buf
+ len
, sizeof(smi
->buf
) - len
,
1326 len
+= snprintf(buf
+ len
, sizeof(smi
->buf
) - len
,
1329 len
+= snprintf(buf
+ len
, sizeof(smi
->buf
) - len
,
1333 len
+= snprintf(buf
+ len
, sizeof(smi
->buf
) - len
,
1336 len
+= snprintf(buf
+ len
, sizeof(smi
->buf
) - len
,
1339 len
+= snprintf(buf
+ len
, sizeof(smi
->buf
) - len
,
1348 static int rtl8366_attr_get_vlan_info(struct switch_dev
*dev
,
1349 const struct switch_attr
*attr
,
1350 struct switch_val
*val
)
1354 struct rtl8366s_vlanconfig vlanmc
;
1355 struct rtl8366s_vlan4kentry vlan4k
;
1356 struct rtl8366_smi
*smi
= sw_to_rtl8366(dev
);
1357 char *buf
= smi
->buf
;
1359 if (val
->port_vlan
>= RTL8366_NUM_VLANS
)
1362 memset(buf
, '\0', sizeof(smi
->buf
));
1364 rtl8366s_get_vlan_member_config(smi
, val
->port_vlan
, &vlanmc
);
1365 rtl8366s_get_vlan_4k_entry(smi
, vlanmc
.vid
, &vlan4k
);
1367 len
+= snprintf(buf
+ len
, sizeof(smi
->buf
) - len
, "VLAN %d: Ports: ",
1370 for (i
= 0; i
< RTL8366_NUM_PORTS
; ++i
) {
1372 if (!rtl8366_get_port_vlan_index(smi
, i
, &index
) &&
1373 index
== val
->port_vlan
)
1374 len
+= snprintf(buf
+ len
, sizeof(smi
->buf
) - len
,
1377 len
+= snprintf(buf
+ len
, sizeof(smi
->buf
) - len
, "\n");
1379 len
+= snprintf(buf
+ len
, sizeof(smi
->buf
) - len
,
1380 "\t\t vid \t prio \t member \t untag \t fid\n");
1381 len
+= snprintf(buf
+ len
, sizeof(smi
->buf
) - len
, "\tMC:\t");
1382 len
+= snprintf(buf
+ len
, sizeof(smi
->buf
) - len
,
1383 "%d \t %d \t 0x%04x \t 0x%04x \t %d\n",
1384 vlanmc
.vid
, vlanmc
.priority
, vlanmc
.member
,
1385 vlanmc
.untag
, vlanmc
.fid
);
1386 len
+= snprintf(buf
+ len
, sizeof(smi
->buf
) - len
, "\t4K:\t");
1387 len
+= snprintf(buf
+ len
, sizeof(smi
->buf
) - len
,
1388 "%d \t \t 0x%04x \t 0x%04x \t %d",
1389 vlan4k
.vid
, vlan4k
.member
, vlan4k
.untag
, vlan4k
.fid
);
1397 static int rtl8366_set_port_led(struct switch_dev
*dev
,
1398 const struct switch_attr
*attr
,
1399 struct switch_val
*val
)
1401 struct rtl8366_smi
*smi
= sw_to_rtl8366(dev
);
1404 if (val
->port_vlan
>= RTL8366_NUM_PORTS
||
1405 (1 << val
->port_vlan
) == RTL8366_PORT_UNKNOWN
)
1408 if (val
->port_vlan
== RTL8366_PORT_NUM_CPU
) {
1409 rtl8366_smi_read_reg(smi
, RTL8366_LED_BLINKRATE_REG
, &data
);
1410 data
= (data
& (~(0xF << 4))) | (val
->value
.i
<< 4);
1411 rtl8366_smi_write_reg(smi
, RTL8366_LED_BLINKRATE_REG
, data
);
1413 rtl8366_smi_read_reg(smi
, RTL8366_LED_CTRL_REG
, &data
);
1414 data
= (data
& (~(0xF << (val
->port_vlan
* 4)))) |
1415 (val
->value
.i
<< (val
->port_vlan
* 4));
1416 rtl8366_smi_write_reg(smi
, RTL8366_LED_CTRL_REG
, data
);
1422 static int rtl8366_get_port_led(struct switch_dev
*dev
,
1423 const struct switch_attr
*attr
,
1424 struct switch_val
*val
)
1426 struct rtl8366_smi
*smi
= sw_to_rtl8366(dev
);
1429 if (val
->port_vlan
>= RTL8366_NUM_LEDGROUPS
)
1432 rtl8366_smi_read_reg(smi
, RTL8366_LED_CTRL_REG
, &data
);
1433 val
->value
.i
= (data
>> (val
->port_vlan
* 4)) & 0x000F;
1438 static int rtl8366_reset_port_mibs(struct switch_dev
*dev
,
1439 const struct switch_attr
*attr
,
1440 struct switch_val
*val
)
1442 struct rtl8366_smi
*smi
= sw_to_rtl8366(dev
);
1445 if (val
->port_vlan
>= RTL8366_NUM_PORTS
)
1448 rtl8366_smi_read_reg(smi
, RTL8366S_MIB_CTRL_REG
, &data
);
1449 data
|= (1 << (val
->port_vlan
+ 3));
1450 rtl8366_smi_write_reg(smi
, RTL8366S_MIB_CTRL_REG
, data
);
1455 static int rtl8366_get_port_mib(struct switch_dev
*dev
,
1456 const struct switch_attr
*attr
,
1457 struct switch_val
*val
)
1459 struct rtl8366_smi
*smi
= sw_to_rtl8366(dev
);
1461 unsigned long long counter
= 0;
1462 char *buf
= smi
->buf
;
1464 if (val
->port_vlan
>= RTL8366_NUM_PORTS
)
1467 len
+= snprintf(buf
+ len
, sizeof(smi
->buf
) - len
,
1468 "Port %d MIB counters\n",
1471 for (i
= 0; i
< RTL8366S_MIB_COUNT
; ++i
) {
1472 len
+= snprintf(buf
+ len
, sizeof(smi
->buf
) - len
,
1473 "%d:%s\t", i
, MIBCOUNTERS
[i
]);
1474 if (!rtl8366_get_mib_counter(smi
, i
, val
->port_vlan
, &counter
))
1475 len
+= snprintf(buf
+ len
, sizeof(smi
->buf
) - len
,
1476 "[%llu]\n", counter
);
1478 len
+= snprintf(buf
+ len
, sizeof(smi
->buf
) - len
,
1487 static int rtl8366_get_ports(struct switch_dev
*dev
,
1488 struct switch_val
*val
)
1490 struct rtl8366s_vlanconfig vlanmc
;
1491 struct rtl8366_smi
*smi
= sw_to_rtl8366(dev
);
1492 struct switch_port
*port
;
1495 if (val
->port_vlan
>= RTL8366_NUM_VLANS
)
1498 rtl8366s_get_vlan_member_config(smi
, val
->port_vlan
, &vlanmc
);
1500 port
= &val
->value
.ports
[0];
1502 for (i
= 0; i
< RTL8366_NUM_PORTS
; i
++) {
1503 if (!(vlanmc
.member
& BIT(i
)))
1507 port
->flags
= (vlanmc
.untag
& BIT(i
)) ?
1508 0 : BIT(SWITCH_PORT_FLAG_TAGGED
);
1515 static int rtl8366_set_ports(struct switch_dev
*dev
,
1516 struct switch_val
*val
)
1518 struct rtl8366s_vlanconfig vlanmc
;
1519 struct rtl8366s_vlan4kentry vlan4k
;
1520 struct rtl8366_smi
*smi
= sw_to_rtl8366(dev
);
1521 struct switch_port
*port
;
1524 if (val
->port_vlan
>= RTL8366_NUM_VLANS
)
1527 rtl8366s_get_vlan_member_config(smi
, val
->port_vlan
, &vlanmc
);
1528 rtl8366s_get_vlan_4k_entry(smi
, vlanmc
.vid
, &vlan4k
);
1533 port
= &val
->value
.ports
[0];
1534 for (i
= 0; i
< val
->len
; i
++, port
++) {
1535 vlanmc
.member
|= BIT(port
->id
);
1537 if (!(port
->flags
& BIT(SWITCH_PORT_FLAG_TAGGED
)))
1538 vlanmc
.untag
|= BIT(port
->id
);
1541 vlan4k
.member
= vlanmc
.member
;
1542 vlan4k
.untag
= vlanmc
.untag
;
1544 rtl8366s_set_vlan_member_config(smi
, val
->port_vlan
, &vlanmc
);
1545 rtl8366s_set_vlan_4k_entry(smi
, &vlan4k
);
1549 static int rtl8366_get_port_pvid(struct switch_dev
*dev
, int port
, int *val
)
1551 struct rtl8366_smi
*smi
= sw_to_rtl8366(dev
);
1552 return rtl8366_get_vlan_port_pvid(smi
, port
, val
);
1555 static int rtl8366_set_port_pvid(struct switch_dev
*dev
, int port
, int val
)
1557 struct rtl8366_smi
*smi
= sw_to_rtl8366(dev
);
1558 return rtl8366_set_vlan_port_pvid(smi
, port
, val
);
1561 static int rtl8366_reset_switch(struct switch_dev
*dev
)
1563 struct rtl8366_smi
*smi
= sw_to_rtl8366(dev
);
1567 rtl8366_smi_write_reg(smi
, RTL8366_RESET_CTRL_REG
,
1568 RTL8366_CHIP_CTRL_RESET_HW
);
1571 if (rtl8366_smi_read_reg(smi
, RTL8366_RESET_CTRL_REG
, &data
))
1574 if (!(data
& RTL8366_CHIP_CTRL_RESET_HW
))
1576 } while (--timeout
);
1579 printk("Timeout waiting for the switch to reset\n");
1583 return rtl8366s_reset_vlan(smi
);
1586 static struct switch_attr rtl8366_globals
[] = {
1588 .type
= SWITCH_TYPE_INT
,
1589 .name
= "enable_vlan",
1590 .description
= "Enable VLAN mode",
1591 .set
= rtl8366_set_vlan
,
1592 .get
= rtl8366_get_vlan
,
1596 .type
= SWITCH_TYPE_INT
,
1597 .name
= "enable_vlan4k",
1598 .description
= "Enable VLAN 4K mode",
1599 .set
= rtl8366_set_vlan
,
1600 .get
= rtl8366_get_vlan
,
1604 .type
= SWITCH_TYPE_INT
,
1605 .name
= "reset_mibs",
1606 .description
= "Reset all MIB counters",
1607 .set
= rtl8366_global_reset_mibs
,
1611 .type
= SWITCH_TYPE_INT
,
1612 .name
= "blinkrate",
1613 .description
= "Get/Set LED blinking rate (0 = 43ms, 1 = 84ms,"
1614 " 2 = 120ms, 3 = 170ms, 4 = 340ms, 5 = 670ms)",
1615 .set
= rtl8366_global_set_blinkrate
,
1616 .get
= rtl8366_global_get_blinkrate
,
1621 static struct switch_attr rtl8366_port
[] = {
1623 .type
= SWITCH_TYPE_STRING
,
1625 .description
= "Get port link information",
1628 .get
= rtl8366_attr_get_port_link
1630 .type
= SWITCH_TYPE_INT
,
1631 .name
= "reset_mib",
1632 .description
= "Reset single port MIB counters",
1634 .set
= rtl8366_reset_port_mibs
,
1637 .type
= SWITCH_TYPE_STRING
,
1639 .description
= "Get MIB counters for port",
1642 .get
= rtl8366_get_port_mib
1644 .type
= SWITCH_TYPE_INT
,
1646 .description
= "Get/Set port group (0 - 3) led mode (0 - 15)",
1648 .set
= rtl8366_set_port_led
,
1649 .get
= rtl8366_get_port_led
1653 static struct switch_attr rtl8366_vlan
[] = {
1655 .type
= SWITCH_TYPE_STRING
,
1657 .description
= "Get vlan information",
1660 .get
= rtl8366_attr_get_vlan_info
1666 static struct switch_dev rtldev
= {
1668 .cpu_port
= RTL8366_PORT_NUM_CPU
,
1669 .ports
= RTL8366_NUM_PORTS
,
1670 .vlans
= RTL8366_NUM_VLANS
,
1672 .attr
= rtl8366_globals
,
1673 .n_attr
= ARRAY_SIZE(rtl8366_globals
),
1676 .attr
= rtl8366_port
,
1677 .n_attr
= ARRAY_SIZE(rtl8366_port
),
1680 .attr
= rtl8366_vlan
,
1681 .n_attr
= ARRAY_SIZE(rtl8366_vlan
),
1684 .get_vlan_ports
= rtl8366_get_ports
,
1685 .set_vlan_ports
= rtl8366_set_ports
,
1686 .get_port_pvid
= rtl8366_get_port_pvid
,
1687 .set_port_pvid
= rtl8366_set_port_pvid
,
1688 .reset_switch
= rtl8366_reset_switch
,
1691 static int rtl8366_smi_switch_init(struct rtl8366_smi
*smi
)
1693 struct switch_dev
*dev
= &smi
->dev
;
1696 memcpy(dev
, &rtldev
, sizeof(struct switch_dev
));
1698 dev
->devname
= dev_name(&smi
->pdev
->dev
);
1700 err
= register_switch(dev
, NULL
);
1702 dev_err(&smi
->pdev
->dev
, "switch registration failed\n");
1707 static void rtl8366_smi_switch_cleanup(struct rtl8366_smi
*smi
)
1709 unregister_switch(&smi
->dev
);
1712 static int rtl8366_smi_mii_read(struct mii_bus
*bus
, int addr
, int reg
)
1714 struct rtl8366_smi
*smi
= bus
->priv
;
1718 err
= rtl8366_smi_read_phy_reg(smi
, addr
, 0, reg
, &val
);
1725 static int rtl8366_smi_mii_write(struct mii_bus
*bus
, int addr
, int reg
,
1728 struct rtl8366_smi
*smi
= bus
->priv
;
1732 err
= rtl8366_smi_write_phy_reg(smi
, addr
, 0, reg
, val
);
1734 (void) rtl8366_smi_read_phy_reg(smi
, addr
, 0, reg
, &t
);
1739 static int rtl8366_smi_mii_init(struct rtl8366_smi
*smi
)
1744 smi
->mii_bus
= mdiobus_alloc();
1745 if (smi
->mii_bus
== NULL
) {
1750 spin_lock_init(&smi
->lock
);
1751 smi
->mii_bus
->priv
= (void *) smi
;
1752 smi
->mii_bus
->name
= "rtl8366-smi";
1753 smi
->mii_bus
->read
= rtl8366_smi_mii_read
;
1754 smi
->mii_bus
->write
= rtl8366_smi_mii_write
;
1755 snprintf(smi
->mii_bus
->id
, MII_BUS_ID_SIZE
, "%s",
1756 dev_name(&smi
->pdev
->dev
));
1757 smi
->mii_bus
->parent
= &smi
->pdev
->dev
;
1758 smi
->mii_bus
->phy_mask
= ~(0x1f);
1759 smi
->mii_bus
->irq
= smi
->mii_irq
;
1760 for (i
= 0; i
< PHY_MAX_ADDR
; i
++)
1761 smi
->mii_irq
[i
] = PHY_POLL
;
1763 ret
= mdiobus_register(smi
->mii_bus
);
1770 mdiobus_free(smi
->mii_bus
);
1775 static void rtl8366_smi_mii_cleanup(struct rtl8366_smi
*smi
)
1777 mdiobus_unregister(smi
->mii_bus
);
1778 mdiobus_free(smi
->mii_bus
);
1781 static int rtl8366_smi_mii_bus_match(struct mii_bus
*bus
)
1783 return (bus
->read
== rtl8366_smi_mii_read
&&
1784 bus
->write
== rtl8366_smi_mii_write
);
1787 static int rtl8366_smi_setup(struct rtl8366_smi
*smi
)
1793 ret
= rtl8366_smi_read_reg(smi
, RTL8366S_CHIP_ID_REG
, &chip_id
);
1795 dev_err(&smi
->pdev
->dev
, "unable to read chip id\n");
1800 case RTL8366S_CHIP_ID_8366
:
1803 dev_err(&smi
->pdev
->dev
, "unknown chip id (%04x)\n", chip_id
);
1807 ret
= rtl8366_smi_read_reg(smi
, RTL8366S_CHIP_VERSION_CTRL_REG
,
1810 dev_err(&smi
->pdev
->dev
, "unable to read chip version\n");
1814 dev_info(&smi
->pdev
->dev
, "RTL%04x ver. %u chip found\n",
1815 chip_id
, chip_ver
& RTL8366S_CHIP_VERSION_MASK
);
1817 rtl8366_debugfs_init(smi
);
1822 static int __init
rtl8366_smi_probe(struct platform_device
*pdev
)
1824 static int rtl8366_smi_version_printed
;
1825 struct rtl8366_smi_platform_data
*pdata
;
1826 struct rtl8366_smi
*smi
;
1829 if (!rtl8366_smi_version_printed
++)
1830 printk(KERN_NOTICE RTL8366_SMI_DRIVER_DESC
1831 " version " RTL8366_SMI_DRIVER_VER
"\n");
1833 pdata
= pdev
->dev
.platform_data
;
1835 dev_err(&pdev
->dev
, "no platform data specified\n");
1840 smi
= kzalloc(sizeof(struct rtl8366_smi
), GFP_KERNEL
);
1842 dev_err(&pdev
->dev
, "no memory for private data\n");
1847 err
= gpio_request(pdata
->gpio_sda
, dev_name(&pdev
->dev
));
1849 dev_err(&pdev
->dev
, "gpio_request failed for %u, err=%d\n",
1850 pdata
->gpio_sda
, err
);
1854 err
= gpio_request(pdata
->gpio_sck
, dev_name(&pdev
->dev
));
1856 dev_err(&pdev
->dev
, "gpio_request failed for %u, err=%d\n",
1857 pdata
->gpio_sck
, err
);
1863 spin_lock_init(&smi
->lock
);
1865 platform_set_drvdata(pdev
, smi
);
1867 dev_info(&pdev
->dev
, "using GPIO pins %u (SDA) and %u (SCK)\n",
1868 pdata
->gpio_sda
, pdata
->gpio_sck
);
1870 err
= rtl8366_smi_setup(smi
);
1872 goto err_clear_drvdata
;
1874 err
= rtl8366_smi_mii_init(smi
);
1876 goto err_clear_drvdata
;
1878 err
= rtl8366_smi_switch_init(smi
);
1880 goto err_mii_cleanup
;
1885 rtl8366_smi_mii_cleanup(smi
);
1887 platform_set_drvdata(pdev
, NULL
);
1888 gpio_free(pdata
->gpio_sck
);
1890 gpio_free(pdata
->gpio_sda
);
1897 int rtl8366_phy_config_init(struct phy_device
*phydev
)
1899 if (!rtl8366_smi_mii_bus_match(phydev
->bus
))
1905 int rtl8366_phy_config_aneg(struct phy_device
*phydev
)
1910 static struct phy_driver rtl8366_smi_phy_driver
= {
1911 .phy_id
= 0x001cc960,
1912 .name
= "Realtek RTL8366",
1913 .phy_id_mask
= 0x1ffffff0,
1914 .features
= PHY_GBIT_FEATURES
,
1915 .config_aneg
= rtl8366_phy_config_aneg
,
1916 .config_init
= rtl8366_phy_config_init
,
1917 .read_status
= genphy_read_status
,
1919 .owner
= THIS_MODULE
,
1923 static int __devexit
rtl8366_smi_remove(struct platform_device
*pdev
)
1925 struct rtl8366_smi
*smi
= platform_get_drvdata(pdev
);
1928 struct rtl8366_smi_platform_data
*pdata
;
1930 pdata
= pdev
->dev
.platform_data
;
1932 rtl8366_smi_switch_cleanup(smi
);
1933 rtl8366_debugfs_remove(smi
);
1934 rtl8366_smi_mii_cleanup(smi
);
1935 platform_set_drvdata(pdev
, NULL
);
1936 gpio_free(pdata
->gpio_sck
);
1937 gpio_free(pdata
->gpio_sda
);
1944 static struct platform_driver rtl8366_smi_driver
= {
1946 .name
= RTL8366_SMI_DRIVER_NAME
,
1947 .owner
= THIS_MODULE
,
1949 .probe
= rtl8366_smi_probe
,
1950 .remove
= __devexit_p(rtl8366_smi_remove
),
1953 static int __init
rtl8366_smi_init(void)
1956 ret
= platform_driver_register(&rtl8366_smi_driver
);
1960 ret
= phy_driver_register(&rtl8366_smi_phy_driver
);
1962 goto err_platform_unregister
;
1966 err_platform_unregister
:
1967 platform_driver_unregister(&rtl8366_smi_driver
);
1970 module_init(rtl8366_smi_init
);
1972 static void __exit
rtl8366_smi_exit(void)
1974 phy_driver_unregister(&rtl8366_smi_phy_driver
);
1975 platform_driver_unregister(&rtl8366_smi_driver
);
1977 module_exit(rtl8366_smi_exit
);
1979 MODULE_DESCRIPTION(RTL8366_SMI_DRIVER_DESC
);
1980 MODULE_VERSION(RTL8366_SMI_DRIVER_VER
);
1981 MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>");
1982 MODULE_AUTHOR("Antti Seppälä <a.seppala@gmail.com>");
1983 MODULE_LICENSE("GPL v2");
1984 MODULE_ALIAS("platform:" RTL8366_SMI_DRIVER_NAME
);