target/linux/atheros-2.6/files/drivers/mtd/devices/spiflash.c

   1
   2 /*
   3  * MTD driver for the SPI Flash Memory support.
   4  *
   5  * Copyright (c) 2005-2006 Atheros Communications Inc.
   6  * Copyright (C) 2006 FON Technology, SL.
   7  * Copyright (C) 2006 Imre Kaloz <kaloz@openwrt.org>
   8  * Copyright (C) 2006 Felix Fietkau <nbd@openwrt.org>
   9  *
  10  * This code is free software; you can redistribute it and/or modify
  11  * it under the terms of the GNU General Public License version 2 as
  12  * published by the Free Software Foundation.
  13  *
  14  */
  15
  16 /*===========================================================================
  17 ** !!!!  VERY IMPORTANT NOTICE !!!!  FLASH DATA STORED IN LITTLE ENDIAN FORMAT
  18 **
  19 ** This module contains the Serial Flash access routines for the Atheros SOC.
  20 ** The Atheros SOC integrates a SPI flash controller that is used to access
  21 ** serial flash parts. The SPI flash controller executes in "Little Endian"
  22 ** mode. THEREFORE, all WRITES and READS from the MIPS CPU must be
  23 ** BYTESWAPPED! The SPI Flash controller hardware by default performs READ
  24 ** ONLY byteswapping when accessed via the SPI Flash Alias memory region
  25 ** (Physical Address 0x0800_0000 - 0x0fff_ffff). The data stored in the
  26 ** flash sectors is stored in "Little Endian" format.
  27 **
  28 ** The spiflash_write() routine performs byteswapping on all write
  29 ** operations.
  30 **===========================================================================*/
  31
  32 #include <linux/kernel.h>
  33 #include <linux/module.h>
  34 #include <linux/types.h>
  35 #include <linux/version.h>
  36 #include <linux/errno.h>
  37 #include <linux/slab.h>
  38 #include <linux/mtd/mtd.h>
  39 #include <linux/mtd/partitions.h>
  40 #include <linux/platform_device.h>
  41 #include <linux/squashfs_fs.h>
  42 #include <linux/root_dev.h>
  43 #include <asm/delay.h>
  44 #include <asm/io.h>
  45 #include "spiflash.h"
  46
  47 /* debugging */
  48 /* #define SPIFLASH_DEBUG */
  49
  50 #ifndef __BIG_ENDIAN
  51 #error This driver currently only works with big endian CPU.
  52 #endif
  53
  54 #define MAX_PARTS 32
  55
  56 static char module_name[] = "spiflash";
  57
  58 #define MIN(a,b)        ((a) < (b) ? (a) : (b))
  59 #define FALSE   0
  60 #define TRUE    1
  61
  62 #define ROOTFS_NAME     "rootfs"
  63
  64 static __u32 spiflash_regread32(int reg);
  65 static void spiflash_regwrite32(int reg, __u32 data);
  66 static __u32 spiflash_sendcmd (int op);
  67
  68 int __init spiflash_init (void);
  69 void __exit spiflash_exit (void);
  70 static int spiflash_probe_chip (void);
  71 static int spiflash_erase (struct mtd_info *mtd,struct erase_info *instr);
  72 static int spiflash_read (struct mtd_info *mtd, loff_t from,size_t len,size_t *retlen,u_char *buf);
  73 static int spiflash_write (struct mtd_info *mtd,loff_t to,size_t len,size_t *retlen,const u_char *buf);
  74
  75 /* Flash configuration table */
  76 struct flashconfig {
  77     __u32 byte_cnt;
  78     __u32 sector_cnt;
  79     __u32 sector_size;
  80     __u32 cs_addrmask;
  81 } flashconfig_tbl[MAX_FLASH] =
  82     {
  83         { 0, 0, 0, 0},
  84         { STM_1MB_BYTE_COUNT, STM_1MB_SECTOR_COUNT, STM_1MB_SECTOR_SIZE, 0x0},
  85         { STM_2MB_BYTE_COUNT, STM_2MB_SECTOR_COUNT, STM_2MB_SECTOR_SIZE, 0x0},
  86         { STM_4MB_BYTE_COUNT, STM_4MB_SECTOR_COUNT, STM_4MB_SECTOR_SIZE, 0x0},
  87         { STM_8MB_BYTE_COUNT, STM_8MB_SECTOR_COUNT, STM_8MB_SECTOR_SIZE, 0x0},
  88         { STM_16MB_BYTE_COUNT, STM_16MB_SECTOR_COUNT, STM_16MB_SECTOR_SIZE, 0x0}
  89     };
  90
  91 /* Mapping of generic opcodes to STM serial flash opcodes */
  92 struct opcodes {
  93     __u16 code;
  94     __s8 tx_cnt;
  95     __s8 rx_cnt;
  96 } stm_opcodes[] = {
  97         {STM_OP_WR_ENABLE, 1, 0},
  98         {STM_OP_WR_DISABLE, 1, 0},
  99         {STM_OP_RD_STATUS, 1, 1},
 100         {STM_OP_WR_STATUS, 1, 0},
 101         {STM_OP_RD_DATA, 4, 4},
 102         {STM_OP_FAST_RD_DATA, 1, 0},
 103         {STM_OP_PAGE_PGRM, 8, 0},
 104         {STM_OP_SECTOR_ERASE, 4, 0},
 105         {STM_OP_BULK_ERASE, 1, 0},
 106         {STM_OP_DEEP_PWRDOWN, 1, 0},
 107         {STM_OP_RD_SIG, 4, 1}
 108 };
 109
 110 /* Driver private data structure */
 111 struct spiflash_data {
 112         struct  mtd_info       *mtd;
 113         struct  mtd_partition  *parsed_parts;     /* parsed partitions */
 114         void    *spiflash_readaddr; /* memory mapped data for read  */
 115         void    *spiflash_mmraddr;  /* memory mapped register space */
 116         spinlock_t mutex;
 117 };
 118
 119 static struct spiflash_data *spidata;
 120
 121 extern int parse_redboot_partitions(struct mtd_info *master, struct mtd_partition **pparts);
 122
 123 /***************************************************************************************************/
 124
 125 static __u32
 126 spiflash_regread32(int reg)
 127 {
 128         volatile __u32 *data = (__u32 *)(spidata->spiflash_mmraddr + reg);
 129
 130         return (*data);
 131 }
 132
 133 static void
 134 spiflash_regwrite32(int reg, __u32 data)
 135 {
 136         volatile __u32 *addr = (__u32 *)(spidata->spiflash_mmraddr + reg);
 137
 138         *addr = data;
 139         return;
 140 }
 141
 142 static __u32
 143 spiflash_sendcmd (int op)
 144 {
 145          __u32 reg;
 146          __u32 mask;
 147         struct opcodes *ptr_opcode;
 148
 149         ptr_opcode = &stm_opcodes[op];
 150
 151         do {
 152                 reg = spiflash_regread32(SPI_FLASH_CTL);
 153         } while (reg & SPI_CTL_BUSY);
 154
 155         spiflash_regwrite32(SPI_FLASH_OPCODE, ptr_opcode->code);
 156
 157         reg = (reg & ~SPI_CTL_TX_RX_CNT_MASK) | ptr_opcode->tx_cnt |
 158                 (ptr_opcode->rx_cnt << 4) | SPI_CTL_START;
 159
 160         spiflash_regwrite32(SPI_FLASH_CTL, reg);
 161
 162         if (ptr_opcode->rx_cnt > 0) {
 163                 do {
 164                         reg = spiflash_regread32(SPI_FLASH_CTL);
 165                 } while (reg & SPI_CTL_BUSY);
 166
 167                 reg = (__u32) spiflash_regread32(SPI_FLASH_DATA);
 168
 169                 switch (ptr_opcode->rx_cnt) {
 170                 case 1:
 171                         mask = 0x000000ff;
 172                         break;
 173                 case 2:
 174                         mask = 0x0000ffff;
 175                         break;
 176                 case 3:
 177                         mask = 0x00ffffff;
 178                         break;
 179                 default:
 180                         mask = 0xffffffff;
 181                         break;
 182                 }
 183
 184                 reg &= mask;
 185         }
 186         else {
 187                 reg = 0;
 188         }
 189
 190         return reg;
 191 }
 192
 193 /* Probe SPI flash device
 194  * Function returns 0 for failure.
 195  * and flashconfig_tbl array index for success.
 196  */
 197 static int
 198 spiflash_probe_chip (void)
 199 {
 200         __u32 sig;
 201         int flash_size;
 202
 203         /* Read the signature on the flash device */
 204         sig = spiflash_sendcmd(SPI_RD_SIG);
 205
 206         switch (sig) {
 207         case STM_8MBIT_SIGNATURE:
 208                 flash_size = FLASH_1MB;
 209                 break;
 210         case STM_16MBIT_SIGNATURE:
 211                 flash_size = FLASH_2MB;
 212                 break;
 213         case STM_32MBIT_SIGNATURE:
 214                 flash_size = FLASH_4MB;
 215                 break;
 216         case STM_64MBIT_SIGNATURE:
 217                 flash_size = FLASH_8MB;
 218                 break;
 219         case STM_128MBIT_SIGNATURE:
 220                 flash_size = FLASH_16MB;
 221                 break;
 222         default:
 223                 printk (KERN_WARNING "%s: Read of flash device signature failed!\n", module_name);
 224                 return (0);
 225         }
 226
 227         return (flash_size);
 228 }
 229
 230
 231 static int
 232 spiflash_erase (struct mtd_info *mtd,struct erase_info *instr)
 233 {
 234         struct opcodes *ptr_opcode;
 235         __u32 temp, reg;
 236         int finished = FALSE;
 237
 238 #ifdef SPIFLASH_DEBUG
 239         printk (KERN_DEBUG "%s(addr = 0x%.8x, len = %d)\n",__FUNCTION__,instr->addr,instr->len);
 240 #endif
 241
 242         /* sanity checks */
 243         if (instr->addr + instr->len > mtd->size) return (-EINVAL);
 244
 245         ptr_opcode = &stm_opcodes[SPI_SECTOR_ERASE];
 246
 247         temp = ((__u32)instr->addr << 8) | (__u32)(ptr_opcode->code);
 248         spin_lock(&spidata->mutex);
 249         spiflash_sendcmd(SPI_WRITE_ENABLE);
 250         do {
 251                 schedule();
 252                 reg = spiflash_regread32(SPI_FLASH_CTL);
 253         } while (reg & SPI_CTL_BUSY);
 254
 255         spiflash_regwrite32(SPI_FLASH_OPCODE, temp);
 256
 257         reg = (reg & ~SPI_CTL_TX_RX_CNT_MASK) | ptr_opcode->tx_cnt | SPI_CTL_START;
 258         spiflash_regwrite32(SPI_FLASH_CTL, reg);
 259
 260         do {
 261                 schedule();
 262                 reg = spiflash_sendcmd(SPI_RD_STATUS);
 263                 if (!(reg & SPI_STATUS_WIP)) {
 264                         finished = TRUE;
 265                 }
 266         } while (!finished);
 267         spin_unlock(&spidata->mutex);
 268
 269         instr->state = MTD_ERASE_DONE;
 270         if (instr->callback) instr->callback (instr);
 271
 272 #ifdef SPIFLASH_DEBUG
 273         printk (KERN_DEBUG "%s return\n",__FUNCTION__);
 274 #endif
 275         return (0);
 276 }
 277
 278 static int
 279 spiflash_read (struct mtd_info *mtd, loff_t from,size_t len,size_t *retlen,u_char *buf)
 280 {
 281         u_char  *read_addr;
 282
 283 #ifdef SPIFLASH_DEBUG
 284         printk (KERN_DEBUG "%s(from = 0x%.8x, len = %d)\n",__FUNCTION__,(__u32) from,(int)len);
 285 #endif
 286
 287         /* sanity checks */
 288         if (!len) return (0);
 289         if (from + len > mtd->size) return (-EINVAL);
 290
 291
 292         /* we always read len bytes */
 293         *retlen = len;
 294
 295         read_addr = (u_char *)(spidata->spiflash_readaddr + from);
 296         spin_lock(&spidata->mutex);
 297         memcpy(buf, read_addr, len);
 298         spin_unlock(&spidata->mutex);
 299
 300         return (0);
 301 }
 302
 303 static int
 304 spiflash_write (struct mtd_info *mtd,loff_t to,size_t len,size_t *retlen,const u_char *buf)
 305 {
 306         int done = FALSE, page_offset, bytes_left, finished;
 307         __u32 xact_len, spi_data = 0, opcode, reg;
 308
 309 #ifdef SPIFLASH_DEBUG
 310         printk (KERN_DEBUG "%s(to = 0x%.8x, len = %d)\n",__FUNCTION__,(__u32) to,len);
 311 #endif
 312
 313         *retlen = 0;
 314
 315         /* sanity checks */
 316         if (!len) return (0);
 317         if (to + len > mtd->size) return (-EINVAL);
 318
 319         opcode = stm_opcodes[SPI_PAGE_PROGRAM].code;
 320         bytes_left = len;
 321
 322         while (done == FALSE) {
 323                 xact_len = MIN(bytes_left, sizeof(__u32));
 324
 325                 /* 32-bit writes cannot span across a page boundary
 326                  * (256 bytes). This types of writes require two page
 327                  * program operations to handle it correctly. The STM part
 328                  * will write the overflow data to the beginning of the
 329                  * current page as opposed to the subsequent page.
 330                  */
 331                 page_offset = (to & (STM_PAGE_SIZE - 1)) + xact_len;
 332
 333                 if (page_offset > STM_PAGE_SIZE) {
 334                         xact_len -= (page_offset - STM_PAGE_SIZE);
 335                 }
 336
 337                 spin_lock(&spidata->mutex);
 338                 spiflash_sendcmd(SPI_WRITE_ENABLE);
 339
 340                 do {
 341                         schedule();
 342                         reg = spiflash_regread32(SPI_FLASH_CTL);
 343                 } while (reg & SPI_CTL_BUSY);
 344
 345                 switch (xact_len) {
 346                         case 1:
 347                                 spi_data = (u32) ((u8) *buf);
 348                                 break;
 349                         case 2:
 350                                 spi_data = (buf[1] << 8) | buf[0];
 351                                 break;
 352                         case 3:
 353                                 spi_data = (buf[2] << 16) | (buf[1] << 8) | buf[0];
 354                                 break;
 355                         case 4:
 356                                 spi_data = (buf[3] << 24) | (buf[2] << 16) |
 357                                                         (buf[1] << 8) | buf[0];
 358                                 break;
 359                         default:
 360                                 printk("spiflash_write: default case\n");
 361                                 break;
 362                 }
 363
 364                 spiflash_regwrite32(SPI_FLASH_DATA, spi_data);
 365                 opcode = (opcode & SPI_OPCODE_MASK) | ((__u32)to << 8);
 366                 spiflash_regwrite32(SPI_FLASH_OPCODE, opcode);
 367
 368                 reg = (reg & ~SPI_CTL_TX_RX_CNT_MASK) | (xact_len + 4) | SPI_CTL_START;
 369                 spiflash_regwrite32(SPI_FLASH_CTL, reg);
 370                 finished = FALSE;
 371
 372                 do {
 373                         schedule();
 374                         reg = spiflash_sendcmd(SPI_RD_STATUS);
 375                         if (!(reg & SPI_STATUS_WIP)) {
 376                                 finished = TRUE;
 377                         }
 378                 } while (!finished);
 379                 spin_unlock(&spidata->mutex);
 380
 381                 bytes_left -= xact_len;
 382                 to += xact_len;
 383                 buf += xact_len;
 384
 385                 *retlen += xact_len;
 386
 387                 if (bytes_left == 0) {
 388                         done = TRUE;
 389                 }
 390         }
 391
 392         return (0);
 393 }
 394
 395
 396 #ifdef CONFIG_MTD_PARTITIONS
 397 static const char *part_probe_types[] = { "cmdlinepart", "RedBoot", NULL };
 398 #endif
 399
 400
 401 static int spiflash_probe(struct platform_device *pdev)
 402 {
 403         int i, result = -1;
 404         int index, num_parts;
 405         struct mtd_info *mtd;
 406
 407         spidata->spiflash_mmraddr = ioremap_nocache(SPI_FLASH_MMR, SPI_FLASH_MMR_SIZE);
 408
 409         if (!spidata->spiflash_mmraddr) {
 410                 printk (KERN_WARNING "%s: Failed to map flash device\n", module_name);
 411                 kfree(spidata);
 412                 spidata = NULL;
 413         }
 414
 415         mtd = kzalloc(sizeof(struct mtd_info), GFP_KERNEL);
 416         if (!mtd) {
 417                 kfree(spidata);
 418                 return (-ENXIO);
 419         }
 420
 421         printk ("MTD driver for SPI flash.\n");
 422         printk ("%s: Probing for Serial flash ...\n", module_name);
 423         if (!(index = spiflash_probe_chip())) {
 424         printk (KERN_WARNING "%s: Found no serial flash device\n", module_name);
 425                 kfree(mtd);
 426                 kfree(spidata);
 427         return (-ENXIO);
 428         }
 429
 430         printk ("%s: Found SPI serial Flash.\n", module_name);
 431
 432         spidata->spiflash_readaddr = ioremap_nocache(SPI_FLASH_READ, flashconfig_tbl[index].byte_cnt);
 433         if (!spidata->spiflash_readaddr) {
 434                 printk (KERN_WARNING "%s: Failed to map flash device\n", module_name);
 435                 kfree(mtd);
 436                 kfree(spidata);
 437                 return (-ENXIO);
 438         }
 439
 440         mtd->name = module_name;
 441         mtd->type = MTD_NORFLASH;
 442         mtd->flags = (MTD_CAP_NORFLASH|MTD_WRITEABLE);
 443         mtd->size = flashconfig_tbl[index].byte_cnt;
 444         mtd->erasesize = flashconfig_tbl[index].sector_size;
 445         mtd->writesize = 1;
 446         mtd->numeraseregions = 0;
 447         mtd->eraseregions = NULL;
 448         mtd->erase = spiflash_erase;
 449         mtd->read = spiflash_read;
 450         mtd->write = spiflash_write;
 451         mtd->owner = THIS_MODULE;
 452
 453 #ifdef SPIFLASH_DEBUG
 454         printk (KERN_DEBUG
 455                    "mtd->name = %s\n"
 456                    "mtd->size = 0x%.8x (%uM)\n"
 457                    "mtd->erasesize = 0x%.8x (%uK)\n"
 458                    "mtd->numeraseregions = %d\n",
 459                    mtd->name,
 460                    mtd->size, mtd->size / (1024*1024),
 461                    mtd->erasesize, mtd->erasesize / 1024,
 462                    mtd->numeraseregions);
 463
 464         if (mtd->numeraseregions) {
 465                 for (result = 0; result < mtd->numeraseregions; result++) {
 466                         printk (KERN_DEBUG
 467                            "\n\n"
 468                            "mtd->eraseregions[%d].offset = 0x%.8x\n"
 469                            "mtd->eraseregions[%d].erasesize = 0x%.8x (%uK)\n"
 470                            "mtd->eraseregions[%d].numblocks = %d\n",
 471                            result,mtd->eraseregions[result].offset,
 472                            result,mtd->eraseregions[result].erasesize,mtd->eraseregions[result].erasesize / 1024,
 473                            result,mtd->eraseregions[result].numblocks);
 474                 }
 475         }
 476 #endif
 477         /* parse redboot partitions */
 478         num_parts = parse_mtd_partitions(mtd, part_probe_types, &spidata->parsed_parts, 0);
 479
 480 #ifdef SPIFLASH_DEBUG
 481         printk (KERN_DEBUG "Found %d partitions\n", num_parts);
 482 #endif
 483         if (num_parts) {
 484                 result = add_mtd_partitions(mtd, spidata->parsed_parts, num_parts);
 485         } else {
 486 #ifdef SPIFLASH_DEBUG
 487                 printk (KERN_DEBUG "Did not find any partitions\n");
 488 #endif
 489                 kfree(mtd);
 490                 kfree(spidata);
 491                 return (-ENXIO);
 492         }
 493
 494         spidata->mtd = mtd;
 495
 496         return (result);
 497 }
 498
 499 static int spiflash_remove (struct platform_device *pdev)
 500 {
 501         del_mtd_partitions (spidata->mtd);
 502         kfree(spidata->mtd);
 503
 504         return 0;
 505 }
 506
 507 struct platform_driver spiflash_driver = {
 508         .driver.name = "spiflash",
 509         .probe = spiflash_probe,
 510         .remove = spiflash_remove,
 511 };
 512
 513 int __init
 514 spiflash_init (void)
 515 {
 516         spidata = kmalloc(sizeof(struct spiflash_data), GFP_KERNEL);
 517         if (!spidata)
 518                 return (-ENXIO);
 519
 520         spin_lock_init(&spidata->mutex);
 521         platform_driver_register(&spiflash_driver);
 522
 523         return 0;
 524 }
 525
 526 void __exit
 527 spiflash_exit (void)
 528 {
 529         kfree(spidata);
 530 }
 531
 532 module_init (spiflash_init);
 533 module_exit (spiflash_exit);
 534
 535 MODULE_LICENSE("GPL");
 536 MODULE_AUTHOR("Atheros Communications Inc");
 537 MODULE_DESCRIPTION("MTD driver for SPI Flash on Atheros SOC");
 538