target/linux/atheros/patches-3.18/108-ar2315_gpio.patch

   1 --- a/arch/mips/ath25/Kconfig
   2 +++ b/arch/mips/ath25/Kconfig
   3 @@ -7,6 +7,7 @@ config SOC_AR5312
   4  config SOC_AR2315
   5         bool "Atheros 2315+ support"
   6         depends on ATH25
   7 +       select GPIO_AR2315
   8         default y
   9
  10  config PCI_AR2315
  11 --- a/arch/mips/ath25/ar2315.c
  12 +++ b/arch/mips/ath25/ar2315.c
  13 @@ -240,6 +240,32 @@ static struct platform_device ar2315_wdt
  14         .num_resources = ARRAY_SIZE(ar2315_wdt_res)
  15  };
  16
  17 +static struct resource ar2315_gpio_res[] = {
  18 +       {
  19 +               .name = "ar2315-gpio",
  20 +               .flags = IORESOURCE_MEM,
  21 +               .start = AR2315_RST_BASE + AR2315_GPIO,
  22 +               .end = AR2315_RST_BASE + AR2315_GPIO + 0x10 - 1,
  23 +       },
  24 +       {
  25 +               .name = "ar2315-gpio",
  26 +               .flags = IORESOURCE_IRQ,
  27 +       },
  28 +       {
  29 +               .name = "ar2315-gpio-irq-base",
  30 +               .flags = IORESOURCE_IRQ,
  31 +               .start = AR231X_GPIO_IRQ_BASE,
  32 +               .end = AR231X_GPIO_IRQ_BASE,
  33 +       }
  34 +};
  35 +
  36 +static struct platform_device ar2315_gpio = {
  37 +       .id = -1,
  38 +       .name = "ar2315-gpio",
  39 +       .resource = ar2315_gpio_res,
  40 +       .num_resources = ARRAY_SIZE(ar2315_gpio_res)
  41 +};
  42 +
  43  #ifdef CONFIG_LEDS_GPIO
  44  static struct gpio_led ar2315_leds[6];
  45  static struct gpio_led_platform_data ar2315_led_data = {
  46 @@ -290,6 +316,11 @@ void __init ar2315_init_devices(void)
  47         ath25_find_config(AR2315_SPI_READ_BASE, AR2315_SPI_READ_SIZE);
  48         ar2315_eth_data.macaddr = ath25_board.config->enet0_mac;
  49
  50 +       ar2315_gpio_res[1].start = irq_create_mapping(ar2315_misc_irq_domain,
  51 +                                                     AR2315_MISC_IRQ_GPIO);
  52 +       ar2315_gpio_res[1].end = ar2315_gpio_res[1].start;
  53 +       platform_device_register(&ar2315_gpio);
  54 +
  55         ar2315_init_gpio_leds();
  56
  57         ar2315_wdt_res[1].start = irq_create_mapping(ar2315_misc_irq_domain,
  58 --- a/drivers/gpio/Kconfig
  59 +++ b/drivers/gpio/Kconfig
  60 @@ -112,6 +112,13 @@ config GPIO_MAX730X
  61
  62  comment "Memory mapped GPIO drivers:"
  63
  64 +config GPIO_AR2315
  65 +       bool "AR2315 SoC GPIO support"
  66 +       default y if SOC_AR2315
  67 +       depends on SOC_AR2315
  68 +       help
  69 +         Say yes here to enable GPIO support for Atheros AR2315+ SoCs.
  70 +
  71  config GPIO_AR5312
  72         bool "AR5312 SoC GPIO support"
  73         default y if SOC_AR5312
  74 --- a/drivers/gpio/Makefile
  75 +++ b/drivers/gpio/Makefile
  76 @@ -17,6 +17,7 @@ obj-$(CONFIG_GPIO_ADNP)               += gpio-adnp.o
  77  obj-$(CONFIG_GPIO_ADP5520)     += gpio-adp5520.o
  78  obj-$(CONFIG_GPIO_ADP5588)     += gpio-adp5588.o
  79  obj-$(CONFIG_GPIO_AMD8111)     += gpio-amd8111.o
  80 +obj-$(CONFIG_GPIO_AR2315)      += gpio-ar2315.o
  81  obj-$(CONFIG_GPIO_AR5312)      += gpio-ar5312.o
  82  obj-$(CONFIG_GPIO_ARIZONA)     += gpio-arizona.o
  83  obj-$(CONFIG_GPIO_BCM_KONA)    += gpio-bcm-kona.o
  84 --- /dev/null
  85 +++ b/drivers/gpio/gpio-ar2315.c
  86 @@ -0,0 +1,233 @@
  87 +/*
  88 + * This file is subject to the terms and conditions of the GNU General Public
  89 + * License.  See the file "COPYING" in the main directory of this archive
  90 + * for more details.
  91 + *
  92 + * Copyright (C) 2003 Atheros Communications, Inc.,  All Rights Reserved.
  93 + * Copyright (C) 2006 FON Technology, SL.
  94 + * Copyright (C) 2006 Imre Kaloz <kaloz@openwrt.org>
  95 + * Copyright (C) 2006 Felix Fietkau <nbd@openwrt.org>
  96 + * Copyright (C) 2012 Alexandros C. Couloumbis <alex@ozo.com>
  97 + */
  98 +
  99 +#include <linux/kernel.h>
 100 +#include <linux/init.h>
 101 +#include <linux/platform_device.h>
 102 +#include <linux/gpio.h>
 103 +#include <linux/irq.h>
 104 +
 105 +#define DRIVER_NAME    "ar2315-gpio"
 106 +
 107 +#define AR2315_GPIO_DI                 0x0000
 108 +#define AR2315_GPIO_DO                 0x0008
 109 +#define AR2315_GPIO_DIR                        0x0010
 110 +#define AR2315_GPIO_INT                        0x0018
 111 +
 112 +#define AR2315_GPIO_DIR_M(x)           (1 << (x))      /* mask for i/o */
 113 +#define AR2315_GPIO_DIR_O(x)           (1 << (x))      /* output */
 114 +#define AR2315_GPIO_DIR_I(x)           (0)             /* input */
 115 +
 116 +#define AR2315_GPIO_INT_NUM_M          0x3F            /* mask for GPIO num */
 117 +#define AR2315_GPIO_INT_TRIG(x)                ((x) << 6)      /* interrupt trigger */
 118 +#define AR2315_GPIO_INT_TRIG_M         (0x3 << 6)      /* mask for int trig */
 119 +
 120 +#define AR2315_GPIO_INT_TRIG_OFF       0       /* Triggerring off */
 121 +#define AR2315_GPIO_INT_TRIG_LOW       1       /* Low Level Triggered */
 122 +#define AR2315_GPIO_INT_TRIG_HIGH      2       /* High Level Triggered */
 123 +#define AR2315_GPIO_INT_TRIG_EDGE      3       /* Edge Triggered */
 124 +
 125 +#define AR2315_GPIO_NUM                22
 126 +
 127 +static u32 ar2315_gpio_intmask;
 128 +static u32 ar2315_gpio_intval;
 129 +static unsigned ar2315_gpio_irq_base;
 130 +static void __iomem *ar2315_mem;
 131 +
 132 +static inline u32 ar2315_gpio_reg_read(unsigned reg)
 133 +{
 134 +       return __raw_readl(ar2315_mem + reg);
 135 +}
 136 +
 137 +static inline void ar2315_gpio_reg_write(unsigned reg, u32 val)
 138 +{
 139 +       __raw_writel(val, ar2315_mem + reg);
 140 +}
 141 +
 142 +static inline void ar2315_gpio_reg_mask(unsigned reg, u32 mask, u32 val)
 143 +{
 144 +       ar2315_gpio_reg_write(reg, (ar2315_gpio_reg_read(reg) & ~mask) | val);
 145 +}
 146 +
 147 +static void ar2315_gpio_irq_handler(unsigned irq, struct irq_desc *desc)
 148 +{
 149 +       u32 pend;
 150 +       int bit = -1;
 151 +
 152 +       /* only do one gpio interrupt at a time */
 153 +       pend = ar2315_gpio_reg_read(AR2315_GPIO_DI);
 154 +       pend ^= ar2315_gpio_intval;
 155 +       pend &= ar2315_gpio_intmask;
 156 +
 157 +       if (pend) {
 158 +               bit = fls(pend) - 1;
 159 +               pend &= ~(1 << bit);
 160 +               ar2315_gpio_intval ^= (1 << bit);
 161 +       }
 162 +
 163 +       /* Enable interrupt with edge detection */
 164 +       if ((ar2315_gpio_reg_read(AR2315_GPIO_DIR) & AR2315_GPIO_DIR_M(bit)) !=
 165 +           AR2315_GPIO_DIR_I(bit))
 166 +               return;
 167 +
 168 +       if (bit >= 0)
 169 +               generic_handle_irq(ar2315_gpio_irq_base + bit);
 170 +}
 171 +
 172 +static void ar2315_gpio_int_setup(unsigned gpio, int trig)
 173 +{
 174 +       u32 reg = ar2315_gpio_reg_read(AR2315_GPIO_INT);
 175 +
 176 +       reg &= ~(AR2315_GPIO_INT_NUM_M | AR2315_GPIO_INT_TRIG_M);
 177 +       reg |= gpio | AR2315_GPIO_INT_TRIG(trig);
 178 +       ar2315_gpio_reg_write(AR2315_GPIO_INT, reg);
 179 +}
 180 +
 181 +static void ar2315_gpio_irq_unmask(struct irq_data *d)
 182 +{
 183 +       unsigned gpio = d->irq - ar2315_gpio_irq_base;
 184 +       u32 dir = ar2315_gpio_reg_read(AR2315_GPIO_DIR);
 185 +
 186 +       /* Enable interrupt with edge detection */
 187 +       if ((dir & AR2315_GPIO_DIR_M(gpio)) != AR2315_GPIO_DIR_I(gpio))
 188 +               return;
 189 +
 190 +       ar2315_gpio_intmask |= (1 << gpio);
 191 +       ar2315_gpio_int_setup(gpio, AR2315_GPIO_INT_TRIG_EDGE);
 192 +}
 193 +
 194 +static void ar2315_gpio_irq_mask(struct irq_data *d)
 195 +{
 196 +       unsigned gpio = d->irq - ar2315_gpio_irq_base;
 197 +
 198 +       /* Disable interrupt */
 199 +       ar2315_gpio_intmask &= ~(1 << gpio);
 200 +       ar2315_gpio_int_setup(gpio, AR2315_GPIO_INT_TRIG_OFF);
 201 +}
 202 +
 203 +static struct irq_chip ar2315_gpio_irq_chip = {
 204 +       .name           = DRIVER_NAME,
 205 +       .irq_unmask     = ar2315_gpio_irq_unmask,
 206 +       .irq_mask       = ar2315_gpio_irq_mask,
 207 +};
 208 +
 209 +static void ar2315_gpio_irq_init(unsigned irq)
 210 +{
 211 +       unsigned i;
 212 +
 213 +       ar2315_gpio_intval = ar2315_gpio_reg_read(AR2315_GPIO_DI);
 214 +       for (i = 0; i < AR2315_GPIO_NUM; i++) {
 215 +               unsigned _irq = ar2315_gpio_irq_base + i;
 216 +
 217 +               irq_set_chip_and_handler(_irq, &ar2315_gpio_irq_chip,
 218 +                                        handle_level_irq);
 219 +       }
 220 +       irq_set_chained_handler(irq, ar2315_gpio_irq_handler);
 221 +}
 222 +
 223 +static int ar2315_gpio_get_val(struct gpio_chip *chip, unsigned gpio)
 224 +{
 225 +       return (ar2315_gpio_reg_read(AR2315_GPIO_DI) >> gpio) & 1;
 226 +}
 227 +
 228 +static void ar2315_gpio_set_val(struct gpio_chip *chip, unsigned gpio, int val)
 229 +{
 230 +       u32 reg = ar2315_gpio_reg_read(AR2315_GPIO_DO);
 231 +
 232 +       reg = val ? reg | (1 << gpio) : reg & ~(1 << gpio);
 233 +       ar2315_gpio_reg_write(AR2315_GPIO_DO, reg);
 234 +}
 235 +
 236 +static int ar2315_gpio_dir_in(struct gpio_chip *chip, unsigned gpio)
 237 +{
 238 +       ar2315_gpio_reg_mask(AR2315_GPIO_DIR, 1 << gpio, 0);
 239 +       return 0;
 240 +}
 241 +
 242 +static int ar2315_gpio_dir_out(struct gpio_chip *chip, unsigned gpio, int val)
 243 +{
 244 +       ar2315_gpio_reg_mask(AR2315_GPIO_DIR, 0, 1 << gpio);
 245 +       ar2315_gpio_set_val(chip, gpio, val);
 246 +       return 0;
 247 +}
 248 +
 249 +static int ar2315_gpio_to_irq(struct gpio_chip *chip, unsigned gpio)
 250 +{
 251 +       return ar2315_gpio_irq_base + gpio;
 252 +}
 253 +
 254 +static struct gpio_chip ar2315_gpio_chip = {
 255 +       .label                  = DRIVER_NAME,
 256 +       .direction_input        = ar2315_gpio_dir_in,
 257 +       .direction_output       = ar2315_gpio_dir_out,
 258 +       .set                    = ar2315_gpio_set_val,
 259 +       .get                    = ar2315_gpio_get_val,
 260 +       .to_irq                 = ar2315_gpio_to_irq,
 261 +       .base                   = 0,
 262 +       .ngpio                  = AR2315_GPIO_NUM,
 263 +};
 264 +
 265 +static int ar2315_gpio_probe(struct platform_device *pdev)
 266 +{
 267 +       struct device *dev = &pdev->dev;
 268 +       struct resource *res;
 269 +       unsigned irq;
 270 +       int ret;
 271 +
 272 +       if (ar2315_mem)
 273 +               return -EBUSY;
 274 +
 275 +       res = platform_get_resource_byname(pdev, IORESOURCE_IRQ,
 276 +                                          "ar2315-gpio-irq-base");
 277 +       if (!res) {
 278 +               dev_err(dev, "not found GPIO IRQ base\n");
 279 +               return -ENXIO;
 280 +       }
 281 +       ar2315_gpio_irq_base = res->start;
 282 +
 283 +       res = platform_get_resource_byname(pdev, IORESOURCE_IRQ, DRIVER_NAME);
 284 +       if (!res) {
 285 +               dev_err(dev, "not found IRQ number\n");
 286 +               return -ENXIO;
 287 +       }
 288 +       irq = res->start;
 289 +
 290 +       res = platform_get_resource_byname(pdev, IORESOURCE_MEM, DRIVER_NAME);
 291 +       ar2315_mem = devm_ioremap_resource(dev, res);
 292 +       if (IS_ERR(ar2315_mem))
 293 +               return PTR_ERR(ar2315_mem);
 294 +
 295 +       ar2315_gpio_chip.dev = dev;
 296 +       ret = gpiochip_add(&ar2315_gpio_chip);
 297 +       if (ret) {
 298 +               dev_err(dev, "failed to add gpiochip\n");
 299 +               return ret;
 300 +       }
 301 +
 302 +       ar2315_gpio_irq_init(irq);
 303 +
 304 +       return 0;
 305 +}
 306 +
 307 +static struct platform_driver ar2315_gpio_driver = {
 308 +       .probe = ar2315_gpio_probe,
 309 +       .driver = {
 310 +               .name = DRIVER_NAME,
 311 +               .owner = THIS_MODULE,
 312 +       }
 313 +};
 314 +
 315 +static int __init ar2315_gpio_init(void)
 316 +{
 317 +       return platform_driver_register(&ar2315_gpio_driver);
 318 +}
 319 +subsys_initcall(ar2315_gpio_init);