b7792221dedfcd56768a215cdddccdb1e9665eea
[openwrt/svn-archive/archive.git] / target / linux / brcm-2.4 / files / arch / mips / bcm947xx / include / bcmdevs1.h
1 /*
2 * Broadcom device-specific manifest constants.
3 *
4 * Copyright 2005, Broadcom Corporation
5 * All Rights Reserved.
6 *
7 * THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY
8 * KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM
9 * SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS
10 * FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE.
11 */
12
13 #ifndef _BCMDEVS_H
14 #define _BCMDEVS_H
15
16
17 /* Known PCI vendor Id's */
18 #define VENDOR_EPIGRAM 0xfeda
19 #define VENDOR_BROADCOM 0x14e4
20 #define VENDOR_3COM 0x10b7
21 #define VENDOR_NETGEAR 0x1385
22 #define VENDOR_DIAMOND 0x1092
23 #define VENDOR_DELL 0x1028
24 #define VENDOR_HP 0x0e11
25 #define VENDOR_APPLE 0x106b
26
27 /* PCI Device Id's */
28 #define BCM4210_DEVICE_ID 0x1072 /* never used */
29 #define BCM4211_DEVICE_ID 0x4211
30 #define BCM4230_DEVICE_ID 0x1086 /* never used */
31 #define BCM4231_DEVICE_ID 0x4231
32
33 #define BCM4410_DEVICE_ID 0x4410 /* bcm44xx family pci iline */
34 #define BCM4430_DEVICE_ID 0x4430 /* bcm44xx family cardbus iline */
35 #define BCM4412_DEVICE_ID 0x4412 /* bcm44xx family pci enet */
36 #define BCM4432_DEVICE_ID 0x4432 /* bcm44xx family cardbus enet */
37
38 #define BCM3352_DEVICE_ID 0x3352 /* bcm3352 device id */
39 #define BCM3360_DEVICE_ID 0x3360 /* bcm3360 device id */
40
41 #define EPI41210_DEVICE_ID 0xa0fa /* bcm4210 */
42 #define EPI41230_DEVICE_ID 0xa10e /* bcm4230 */
43
44 #define BCM47XX_ILINE_ID 0x4711 /* 47xx iline20 */
45 #define BCM47XX_V90_ID 0x4712 /* 47xx v90 codec */
46 #define BCM47XX_ENET_ID 0x4713 /* 47xx enet */
47 #define BCM47XX_EXT_ID 0x4714 /* 47xx external i/f */
48 #define BCM47XX_USB_ID 0x4715 /* 47xx usb */
49 #define BCM47XX_USBH_ID 0x4716 /* 47xx usb host */
50 #define BCM47XX_USBD_ID 0x4717 /* 47xx usb device */
51 #define BCM47XX_IPSEC_ID 0x4718 /* 47xx ipsec */
52 #define BCM47XX_ROBO_ID 0x4719 /* 47xx/53xx roboswitch core */
53 #define BCM47XX_USB20H_ID 0x471a /* 47xx usb 2.0 host */
54 #define BCM47XX_USB20D_ID 0x471b /* 47xx usb 2.0 device */
55
56 #define BCM4710_DEVICE_ID 0x4710 /* 4710 primary function 0 */
57
58 #define BCM4610_DEVICE_ID 0x4610 /* 4610 primary function 0 */
59 #define BCM4610_ILINE_ID 0x4611 /* 4610 iline100 */
60 #define BCM4610_V90_ID 0x4612 /* 4610 v90 codec */
61 #define BCM4610_ENET_ID 0x4613 /* 4610 enet */
62 #define BCM4610_EXT_ID 0x4614 /* 4610 external i/f */
63 #define BCM4610_USB_ID 0x4615 /* 4610 usb */
64
65 #define BCM4402_DEVICE_ID 0x4402 /* 4402 primary function 0 */
66 #define BCM4402_ENET_ID 0x4402 /* 4402 enet */
67 #define BCM4402_V90_ID 0x4403 /* 4402 v90 codec */
68 #define BCM4401_ENET_ID 0x170c /* 4401b0 production enet cards */
69
70 #define BCM4301_DEVICE_ID 0x4301 /* 4301 primary function 0 */
71 #define BCM4301_D11B_ID 0x4301 /* 4301 802.11b */
72
73 #define BCM4307_DEVICE_ID 0x4307 /* 4307 primary function 0 */
74 #define BCM4307_V90_ID 0x4305 /* 4307 v90 codec */
75 #define BCM4307_ENET_ID 0x4306 /* 4307 enet */
76 #define BCM4307_D11B_ID 0x4307 /* 4307 802.11b */
77
78 #define BCM4306_DEVICE_ID 0x4306 /* 4306 chipcommon chipid */
79 #define BCM4306_D11G_ID 0x4320 /* 4306 802.11g */
80 #define BCM4306_D11G_ID2 0x4325
81 #define BCM4306_D11A_ID 0x4321 /* 4306 802.11a */
82 #define BCM4306_UART_ID 0x4322 /* 4306 uart */
83 #define BCM4306_V90_ID 0x4323 /* 4306 v90 codec */
84 #define BCM4306_D11DUAL_ID 0x4324 /* 4306 dual A+B */
85
86 #define BCM4309_PKG_ID 1 /* 4309 package id */
87
88 #define BCM4303_D11B_ID 0x4303 /* 4303 802.11b */
89 #define BCM4303_PKG_ID 2 /* 4303 package id */
90
91 #define BCM4310_DEVICE_ID 0x4310 /* 4310 chipcommon chipid */
92 #define BCM4310_D11B_ID 0x4311 /* 4310 802.11b */
93 #define BCM4310_UART_ID 0x4312 /* 4310 uart */
94 #define BCM4310_ENET_ID 0x4313 /* 4310 enet */
95 #define BCM4310_USB_ID 0x4315 /* 4310 usb */
96
97 #define BCMGPRS_UART_ID 0x4333 /* Uart id used by 4306/gprs card */
98 #define BCMGPRS2_UART_ID 0x4344 /* Uart id used by 4306/gprs card */
99
100
101 #define BCM4704_DEVICE_ID 0x4704 /* 4704 chipcommon chipid */
102 #define BCM4704_ENET_ID 0x4706 /* 4704 enet (Use 47XX_ENET_ID instead!) */
103
104 #define BCM4317_DEVICE_ID 0x4317 /* 4317 chip common chipid */
105
106 #define BCM4318_DEVICE_ID 0x4318 /* 4318 chip common chipid */
107 #define BCM4318_D11G_ID 0x4318 /* 4318 801.11b/g id */
108 #define BCM4318_D11DUAL_ID 0x4319 /* 4318 801.11a/b/g id */
109 #define BCM4318_JTAGM_ID 0x4331 /* 4318 jtagm device id */
110
111 #define FPGA_JTAGM_ID 0x4330 /* ??? */
112
113 /* Address map */
114 #define BCM4710_SDRAM 0x00000000 /* Physical SDRAM */
115 #define BCM4710_PCI_MEM 0x08000000 /* Host Mode PCI memory access space (64 MB) */
116 #define BCM4710_PCI_CFG 0x0c000000 /* Host Mode PCI configuration space (64 MB) */
117 #define BCM4710_PCI_DMA 0x40000000 /* Client Mode PCI memory access space (1 GB) */
118 #define BCM4710_SDRAM_SWAPPED 0x10000000 /* Byteswapped Physical SDRAM */
119 #define BCM4710_ENUM 0x18000000 /* Beginning of core enumeration space */
120
121 /* Core register space */
122 #define BCM4710_REG_SDRAM 0x18000000 /* SDRAM core registers */
123 #define BCM4710_REG_ILINE20 0x18001000 /* InsideLine20 core registers */
124 #define BCM4710_REG_EMAC0 0x18002000 /* Ethernet MAC 0 core registers */
125 #define BCM4710_REG_CODEC 0x18003000 /* Codec core registers */
126 #define BCM4710_REG_USB 0x18004000 /* USB core registers */
127 #define BCM4710_REG_PCI 0x18005000 /* PCI core registers */
128 #define BCM4710_REG_MIPS 0x18006000 /* MIPS core registers */
129 #define BCM4710_REG_EXTIF 0x18007000 /* External Interface core registers */
130 #define BCM4710_REG_EMAC1 0x18008000 /* Ethernet MAC 1 core registers */
131
132 #define BCM4710_EXTIF 0x1f000000 /* External Interface base address */
133 #define BCM4710_PCMCIA_MEM 0x1f000000 /* External Interface PCMCIA memory access */
134 #define BCM4710_PCMCIA_IO 0x1f100000 /* PCMCIA I/O access */
135 #define BCM4710_PCMCIA_CONF 0x1f200000 /* PCMCIA configuration */
136 #define BCM4710_PROG 0x1f800000 /* Programable interface */
137 #define BCM4710_FLASH 0x1fc00000 /* Flash */
138
139 #define BCM4710_EJTAG 0xff200000 /* MIPS EJTAG space (2M) */
140
141 #define BCM4710_UART (BCM4710_REG_EXTIF + 0x00000300)
142
143 #define BCM4710_EUART (BCM4710_EXTIF + 0x00800000)
144 #define BCM4710_LED (BCM4710_EXTIF + 0x00900000)
145
146 #define BCM4712_DEVICE_ID 0x4712 /* 4712 chipcommon chipid */
147 #define BCM4712_MIPS_ID 0x4720 /* 4712 base devid */
148 #define BCM4712LARGE_PKG_ID 0 /* 340pin 4712 package id */
149 #define BCM4712SMALL_PKG_ID 1 /* 200pin 4712 package id */
150 #define BCM4712MID_PKG_ID 2 /* 225pin 4712 package id */
151
152 #define SDIOH_FPGA_ID 0x4380 /* sdio host fpga */
153
154 #define BCM5365_DEVICE_ID 0x5365 /* 5365 chipcommon chipid */
155 #define BCM5350_DEVICE_ID 0x5350 /* bcm5350 chipcommon chipid */
156 #define BCM5352_DEVICE_ID 0x5352 /* bcm5352 chipcommon chipid */
157
158 #define BCM4320_DEVICE_ID 0x4320 /* bcm4320 chipcommon chipid */
159
160 /* PCMCIA vendor Id's */
161
162 #define VENDOR_BROADCOM_PCMCIA 0x02d0
163
164 /* SDIO vendor Id's */
165 #define VENDOR_BROADCOM_SDIO 0x00BF
166
167
168 /* boardflags */
169 #define BFL_BTCOEXIST 0x0001 /* This board implements Bluetooth coexistance */
170 #define BFL_PACTRL 0x0002 /* This board has gpio 9 controlling the PA */
171 #define BFL_AIRLINEMODE 0x0004 /* This board implements gpio13 radio disable indication */
172 #define BFL_ENETROBO 0x0010 /* This board has robo switch or core */
173 #define BFL_CCKHIPWR 0x0040 /* Can do high-power CCK transmission */
174 #define BFL_ENETADM 0x0080 /* This board has ADMtek switch */
175 #define BFL_ENETVLAN 0x0100 /* This board has vlan capability */
176 #define BFL_AFTERBURNER 0x0200 /* This board supports Afterburner mode */
177 #define BFL_NOPCI 0x0400 /* This board leaves PCI floating */
178 #define BFL_FEM 0x0800 /* This board supports the Front End Module */
179 #define BFL_EXTLNA 0x1000 /* This board has an external LNA */
180 #define BFL_HGPA 0x2000 /* This board has a high gain PA */
181 #define BFL_BTCMOD 0x4000 /* This board' BTCOEXIST is in the alternate gpios */
182 #define BFL_ALTIQ 0x8000 /* Alternate I/Q settings */
183
184 /* board specific GPIO assignment, gpio 0-3 are also customer-configurable led */
185 #define BOARD_GPIO_HWRAD_B 0x010 /* bit 4 is HWRAD input on 4301 */
186 #define BOARD_GPIO_BTCMOD_IN 0x010 /* bit 4 is the alternate BT Coexistance Input */
187 #define BOARD_GPIO_BTCMOD_OUT 0x020 /* bit 5 is the alternate BT Coexistance Out */
188 #define BOARD_GPIO_BTC_IN 0x080 /* bit 7 is BT Coexistance Input */
189 #define BOARD_GPIO_BTC_OUT 0x100 /* bit 8 is BT Coexistance Out */
190 #define BOARD_GPIO_PACTRL 0x200 /* bit 9 controls the PA on new 4306 boards */
191 #define PCI_CFG_GPIO_SCS 0x10 /* PCI config space bit 4 for 4306c0 slow clock source */
192 #define PCI_CFG_GPIO_HWRAD 0x20 /* PCI config space GPIO 13 for hw radio disable */
193 #define PCI_CFG_GPIO_XTAL 0x40 /* PCI config space GPIO 14 for Xtal powerup */
194 #define PCI_CFG_GPIO_PLL 0x80 /* PCI config space GPIO 15 for PLL powerdown */
195
196 /* Bus types */
197 #define SB_BUS 0 /* Silicon Backplane */
198 #define PCI_BUS 1 /* PCI target */
199 #define PCMCIA_BUS 2 /* PCMCIA target */
200 #define SDIO_BUS 3 /* SDIO target */
201 #define JTAG_BUS 4 /* JTAG */
202
203 /* Allows optimization for single-bus support */
204 #ifdef BCMBUSTYPE
205 #define BUSTYPE(bus) (BCMBUSTYPE)
206 #else
207 #define BUSTYPE(bus) (bus)
208 #endif
209
210 /* power control defines */
211 #define PLL_DELAY 150 /* us pll on delay */
212 #define FREF_DELAY 200 /* us fref change delay */
213 #define MIN_SLOW_CLK 32 /* us Slow clock period */
214 #define XTAL_ON_DELAY 1000 /* us crystal power-on delay */
215
216 /* Reference Board Types */
217
218 #define BU4710_BOARD 0x0400
219 #define VSIM4710_BOARD 0x0401
220 #define QT4710_BOARD 0x0402
221
222 #define BU4610_BOARD 0x0403
223 #define VSIM4610_BOARD 0x0404
224
225 #define BU4307_BOARD 0x0405
226 #define BCM94301CB_BOARD 0x0406
227 #define BCM94301PC_BOARD 0x0406 /* Pcmcia 5v card */
228 #define BCM94301MP_BOARD 0x0407
229 #define BCM94307MP_BOARD 0x0408
230 #define BCMAP4307_BOARD 0x0409
231
232 #define BU4309_BOARD 0x040a
233 #define BCM94309CB_BOARD 0x040b
234 #define BCM94309MP_BOARD 0x040c
235 #define BCM4309AP_BOARD 0x040d
236
237 #define BCM94302MP_BOARD 0x040e
238
239 #define VSIM4310_BOARD 0x040f
240 #define BU4711_BOARD 0x0410
241 #define BCM94310U_BOARD 0x0411
242 #define BCM94310AP_BOARD 0x0412
243 #define BCM94310MP_BOARD 0x0414
244
245 #define BU4306_BOARD 0x0416
246 #define BCM94306CB_BOARD 0x0417
247 #define BCM94306MP_BOARD 0x0418
248
249 #define BCM94710D_BOARD 0x041a
250 #define BCM94710R1_BOARD 0x041b
251 #define BCM94710R4_BOARD 0x041c
252 #define BCM94710AP_BOARD 0x041d
253
254
255 #define BU2050_BOARD 0x041f
256
257
258 #define BCM94309G_BOARD 0x0421
259
260 #define BCM94301PC3_BOARD 0x0422 /* Pcmcia 3.3v card */
261
262 #define BU4704_BOARD 0x0423
263 #define BU4702_BOARD 0x0424
264
265 #define BCM94306PC_BOARD 0x0425 /* pcmcia 3.3v 4306 card */
266
267 #define BU4317_BOARD 0x0426
268
269
270 #define BCM94702MN_BOARD 0x0428
271
272 /* BCM4702 1U CompactPCI Board */
273 #define BCM94702CPCI_BOARD 0x0429
274
275 /* BCM4702 with BCM95380 VLAN Router */
276 #define BCM95380RR_BOARD 0x042a
277
278 /* cb4306 with SiGe PA */
279 #define BCM94306CBSG_BOARD 0x042b
280
281 /* mp4301 with 2050 radio */
282 #define BCM94301MPL_BOARD 0x042c
283
284 /* cb4306 with SiGe PA */
285 #define PCSG94306_BOARD 0x042d
286
287 /* bu4704 with sdram */
288 #define BU4704SD_BOARD 0x042e
289
290 /* Dual 11a/11g Router */
291 #define BCM94704AGR_BOARD 0x042f
292
293 /* 11a-only minipci */
294 #define BCM94308MP_BOARD 0x0430
295
296
297
298 /* BCM94317 boards */
299 #define BCM94317CB_BOARD 0x0440
300 #define BCM94317MP_BOARD 0x0441
301 #define BCM94317PCMCIA_BOARD 0x0442
302 #define BCM94317SDIO_BOARD 0x0443
303
304 #define BU4712_BOARD 0x0444
305 #define BU4712SD_BOARD 0x045d
306 #define BU4712L_BOARD 0x045f
307
308 /* BCM4712 boards */
309 #define BCM94712AP_BOARD 0x0445
310 #define BCM94712P_BOARD 0x0446
311
312 /* BCM4318 boards */
313 #define BU4318_BOARD 0x0447
314 #define CB4318_BOARD 0x0448
315 #define MPG4318_BOARD 0x0449
316 #define MP4318_BOARD 0x044a
317 #define SD4318_BOARD 0x044b
318
319 /* BCM63XX boards */
320 #define BCM96338_BOARD 0x6338
321 #define BCM96345_BOARD 0x6345
322 #define BCM96348_BOARD 0x6348
323
324 /* Another mp4306 with SiGe */
325 #define BCM94306P_BOARD 0x044c
326
327 /* CF-like 4317 modules */
328 #define BCM94317CF_BOARD 0x044d
329
330 /* mp4303 */
331 #define BCM94303MP_BOARD 0x044e
332
333 /* mpsgh4306 */
334 #define BCM94306MPSGH_BOARD 0x044f
335
336 /* BRCM 4306 w/ Front End Modules */
337 #define BCM94306MPM 0x0450
338 #define BCM94306MPL 0x0453
339
340 /* 4712agr */
341 #define BCM94712AGR_BOARD 0x0451
342
343 /* The real CF 4317 board */
344 #define CFI4317_BOARD 0x0452
345
346 /* pcmcia 4303 */
347 #define PC4303_BOARD 0x0454
348
349 /* 5350K */
350 #define BCM95350K_BOARD 0x0455
351
352 /* 5350R */
353 #define BCM95350R_BOARD 0x0456
354
355 /* 4306mplna */
356 #define BCM94306MPLNA_BOARD 0x0457
357
358 /* 4320 boards */
359 #define BU4320_BOARD 0x0458
360 #define BU4320S_BOARD 0x0459
361 #define BCM94320PH_BOARD 0x045a
362
363 /* 4306mph */
364 #define BCM94306MPH_BOARD 0x045b
365
366 /* 4306pciv */
367 #define BCM94306PCIV_BOARD 0x045c
368
369 #define BU4712SD_BOARD 0x045d
370
371 #define BCM94320PFLSH_BOARD 0x045e
372
373 #define BU4712L_BOARD 0x045f
374 #define BCM94712LGR_BOARD 0x0460
375 #define BCM94320R_BOARD 0x0461
376
377 #define BU5352_BOARD 0x0462
378
379 #define BCM94318MPGH_BOARD 0x0463
380
381
382 #define BCM95352GR_BOARD 0x0467
383
384 /* bcm95351agr */
385 #define BCM95351AGR_BOARD 0x0470
386
387 /* # of GPIO pins */
388 #define GPIO_NUMPINS 16
389
390 #endif /* _BCMDEVS_H */