target/linux/brcm63xx/patches-3.3/309-MIPS-BCM63XX-add-flash-type-detection.patch

   1 From 0b2451b1cdab390b0b86c60a4765208bb2724d22 Mon Sep 17 00:00:00 2001
   2 From: Jonas Gorski <jonas.gorski@gmail.com>
   3 Date: Sat, 2 Jul 2011 14:44:28 +0200
   4 Subject: [PATCH 26/79] MIPS: BCM63XX: add flash type detection
   5
   6 On BCM6358 and BCM6368 the attached flash type is exposed through a
   7 bootstrapping register. Use it for auto detecting the flash type on
   8 those and default to parallel flash for earlier SoCs.
   9
  10 Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
  11 ---
  12  arch/mips/bcm63xx/dev-flash.c                      |   60 ++++++++++++++++++--
  13  .../include/asm/mach-bcm63xx/bcm63xx_dev_flash.h   |    6 ++
  14  arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h  |    9 +++
  15  3 files changed, 69 insertions(+), 6 deletions(-)
  16
  17 --- a/arch/mips/bcm63xx/dev-flash.c
  18 +++ b/arch/mips/bcm63xx/dev-flash.c
  19 @@ -6,6 +6,7 @@
  20   * for more details.
  21   *
  22   * Copyright (C) 2009 Florian Fainelli <florian@openwrt.org>
  23 + * Copyright (C) 2012 Jonas Gorski <jonas.gorski@gmail.com>
  24   */
  25
  26  #include <linux/init.h>
  27 @@ -53,16 +54,63 @@ static struct platform_device mtd_dev =
  28         },
  29  };
  30
  31 -int __init bcm63xx_flash_register(void)
  32 +static int __init bcm63xx_detect_flash_type(void)
  33  {
  34         u32 val;
  35
  36 -       /* read base address of boot chip select (0) */
  37 -       val = bcm_mpi_readl(MPI_CSBASE_REG(0));
  38 -       val &= MPI_CSBASE_BASE_MASK;
  39 +       switch (bcm63xx_get_cpu_id()) {
  40 +       case BCM6338_CPU_ID:
  41 +       case BCM6345_CPU_ID:
  42 +       case BCM6348_CPU_ID:
  43 +               /* no way to auto detect so assume parallel */
  44 +               return BCM63XX_FLASH_TYPE_PARALLEL;
  45 +       case BCM6358_CPU_ID:
  46 +               val = bcm_gpio_readl(GPIO_STRAPBUS_REG);
  47 +               if (val & STRAPBUS_6358_BOOT_SEL_PARALLEL)
  48 +                       return BCM63XX_FLASH_TYPE_PARALLEL;
  49 +               else
  50 +                       return BCM63XX_FLASH_TYPE_SERIAL;
  51 +       case BCM6368_CPU_ID:
  52 +               val = bcm_gpio_readl(GPIO_STRAPBUS_REG);
  53 +               switch (val & STRAPBUS_6368_BOOT_SEL_MASK) {
  54 +               case STRAPBUS_6368_BOOT_SEL_NAND:
  55 +                       return BCM63XX_FLASH_TYPE_NAND;
  56 +               case STRAPBUS_6368_BOOT_SEL_SERIAL:
  57 +                       return BCM63XX_FLASH_TYPE_SERIAL;
  58 +               case STRAPBUS_6368_BOOT_SEL_PARALLEL:
  59 +                       return BCM63XX_FLASH_TYPE_PARALLEL;
  60 +               }
  61 +       default:
  62 +               return -EINVAL;
  63 +       }
  64 +}
  65 +
  66 +int __init bcm63xx_flash_register(void)
  67 +{
  68 +       int flash_type;
  69 +       u32 val;
  70
  71 -       mtd_resources[0].start = val;
  72 -       mtd_resources[0].end = 0x1FFFFFFF;
  73 +       flash_type = bcm63xx_detect_flash_type();
  74
  75 -       return platform_device_register(&mtd_dev);
  76 +       switch (flash_type) {
  77 +       case BCM63XX_FLASH_TYPE_PARALLEL:
  78 +               /* read base address of boot chip select (0) */
  79 +               val = bcm_mpi_readl(MPI_CSBASE_REG(0));
  80 +               val &= MPI_CSBASE_BASE_MASK;
  81 +
  82 +               mtd_resources[0].start = val;
  83 +               mtd_resources[0].end = 0x1FFFFFFF;
  84 +
  85 +               return platform_device_register(&mtd_dev);
  86 +       case BCM63XX_FLASH_TYPE_SERIAL:
  87 +               pr_warn("unsupported serial flash detected\n");
  88 +               return -ENODEV;
  89 +       case BCM63XX_FLASH_TYPE_NAND:
  90 +               pr_warn("unsupported NAND flash detected\n");
  91 +               return -ENODEV;
  92 +       default:
  93 +               pr_err("flash detection failed for BCM%x: %d",
  94 +                      bcm63xx_get_cpu_id(), flash_type);
  95 +               return -ENODEV;
  96 +       }
  97  }
  98 --- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_flash.h
  99 +++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_flash.h
 100 @@ -1,6 +1,12 @@
 101  #ifndef __BCM63XX_FLASH_H
 102  #define __BCM63XX_FLASH_H
 103
 104 +enum {
 105 +       BCM63XX_FLASH_TYPE_PARALLEL,
 106 +       BCM63XX_FLASH_TYPE_SERIAL,
 107 +       BCM63XX_FLASH_TYPE_NAND,
 108 +};
 109 +
 110  int __init bcm63xx_flash_register(void);
 111
 112  #endif /* __BCM63XX_FLASH_H */
 113 --- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
 114 +++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
 115 @@ -508,6 +508,15 @@
 116  #define GPIO_BASEMODE_6368_MASK                0x7
 117  /* those bits must be kept as read in gpio basemode register*/
 118
 119 +#define GPIO_STRAPBUS_REG              0x40
 120 +#define STRAPBUS_6358_BOOT_SEL_PARALLEL        (1 << 1)
 121 +#define STRAPBUS_6358_BOOT_SEL_SERIAL  (0 << 1)
 122 +#define STRAPBUS_6368_BOOT_SEL_MASK    0x3
 123 +#define STRAPBUS_6368_BOOT_SEL_NAND    0
 124 +#define STRAPBUS_6368_BOOT_SEL_SERIAL  1
 125 +#define STRAPBUS_6368_BOOT_SEL_PARALLEL        3
 126 +
 127 +
 128  /*************************************************************************
 129   * _REG relative to RSET_ENET
 130   *************************************************************************/