[lantiq] cleanup basefiles
[openwrt/svn-archive/archive.git] / target / linux / lantiq / files-3.3 / drivers / usb / ifxhcd / ifxusb_cif.h
1 /*****************************************************************************
2 ** FILE NAME : ifxusb_cif.h
3 ** PROJECT : IFX USB sub-system V3
4 ** MODULES : IFX USB sub-system Host and Device driver
5 ** SRC VERSION : 1.0
6 ** DATE : 1/Jan/2009
7 ** AUTHOR : Chen, Howard
8 ** DESCRIPTION : The Core Interface provides basic services for accessing and
9 ** managing the IFX USB hardware. These services are used by both the
10 ** Host Controller Driver and the Peripheral Controller Driver.
11 ** FUNCTIONS :
12 ** COMPILER : gcc
13 ** REFERENCE : IFX hardware ref handbook for each plateforms
14 ** COPYRIGHT :
15 ** Version Control Section **
16 ** $Author$
17 ** $Date$
18 ** $Revisions$
19 ** $Log$ Revision history
20 *****************************************************************************/
21
22 /*!
23 \defgroup IFXUSB_DRIVER_V3 IFX USB SS Project
24 \brief IFX USB subsystem V3.x
25 */
26
27 /*!
28 \defgroup IFXUSB_CIF Core Interface APIs
29 \ingroup IFXUSB_DRIVER_V3
30 \brief The Core Interface provides basic services for accessing and
31 managing the IFXUSB hardware. These services are used by both the
32 Host Controller Driver and the Peripheral Controller Driver.
33 */
34
35
36 /*!
37 \file ifxusb_cif.h
38 \ingroup IFXUSB_DRIVER_V3
39 \brief This file contains the interface to the IFX USB Core.
40 */
41
42 #if !defined(__IFXUSB_CIF_H__)
43 #define __IFXUSB_CIF_H__
44
45 #include <linux/workqueue.h>
46
47 #include <linux/version.h>
48 #include <asm/param.h>
49
50 #include "ifxusb_plat.h"
51 #include "ifxusb_regs.h"
52
53 #ifdef __DEBUG__
54 #include "linux/timer.h"
55 #endif
56
57 ///////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
58
59 #define IFXUSB_PARAM_SPEED_HIGH 0
60 #define IFXUSB_PARAM_SPEED_FULL 1
61
62 #define IFXUSB_EP_SPEED_LOW 0
63 #define IFXUSB_EP_SPEED_FULL 1
64 #define IFXUSB_EP_SPEED_HIGH 2
65
66 #define IFXUSB_EP_TYPE_CTRL 0
67 #define IFXUSB_EP_TYPE_ISOC 1
68 #define IFXUSB_EP_TYPE_BULK 2
69 #define IFXUSB_EP_TYPE_INTR 3
70
71 #define IFXUSB_HC_PID_DATA0 0
72 #define IFXUSB_HC_PID_DATA2 1
73 #define IFXUSB_HC_PID_DATA1 2
74 #define IFXUSB_HC_PID_MDATA 3
75 #define IFXUSB_HC_PID_SETUP 3
76
77
78 /*!
79 \addtogroup IFXUSB_CIF
80 */
81 /*@{*/
82
83 /*!
84 \struct ifxusb_params
85 \brief IFXUSB Parameters structure.
86 This structure is used for both importing from insmod stage and run-time storage.
87 These parameters define how the IFXUSB controller should be configured.
88 */
89 typedef struct ifxusb_params
90 {
91 int32_t dma_burst_size; /*!< The DMA Burst size (applicable only for Internal DMA
92 Mode). 0(for single), 1(incr), 4(incr4), 8(incr8) 16(incr16)
93 */
94 /* Translate this to GAHBCFG values */
95 int32_t speed; /*!< Specifies the maximum speed of operation in host and device mode.
96 The actual speed depends on the speed of the attached device and
97 the value of phy_type. The actual speed depends on the speed of the
98 attached device.
99 0 - High Speed (default)
100 1 - Full Speed
101 */
102
103 int32_t data_fifo_size; /*!< Total number of dwords in the data FIFO memory. This
104 memory includes the Rx FIFO, non-periodic Tx FIFO, and periodic
105 Tx FIFOs.
106 32 to 32768
107 */
108 #ifdef __IS_DEVICE__
109 int32_t rx_fifo_size; /*!< Number of dwords in the Rx FIFO in device mode.
110 16 to 32768
111 */
112
113
114 int32_t tx_fifo_size[MAX_EPS_CHANNELS]; /*!< Number of dwords in each of the Tx FIFOs in device mode.
115 4 to 768
116 */
117 #ifdef __DED_FIFO__
118 int32_t thr_ctl; /*!< Threshold control on/off */
119 int32_t tx_thr_length; /*!< Threshold length for Tx */
120 int32_t rx_thr_length; /*!< Threshold length for Rx*/
121 #endif
122 #else //__IS_HOST__
123 int32_t host_channels; /*!< The number of host channel registers to use.
124 1 to 16
125 */
126
127 int32_t rx_fifo_size; /*!< Number of dwords in the Rx FIFO in host mode.
128 16 to 32768
129 */
130
131 int32_t nperio_tx_fifo_size;/*!< Number of dwords in the non-periodic Tx FIFO in host mode.
132 16 to 32768
133 */
134
135 int32_t perio_tx_fifo_size; /*!< Number of dwords in the host periodic Tx FIFO.
136 16 to 32768
137 */
138 #endif //__IS_HOST__
139
140 int32_t max_transfer_size; /*!< The maximum transfer size supported in bytes.
141 2047 to 65,535
142 */
143
144 int32_t max_packet_count; /*!< The maximum number of packets in a transfer.
145 15 to 511 (default 511)
146 */
147 int32_t phy_utmi_width; /*!< Specifies the UTMI+ Data Width.
148 8 or 16 bits (default 16)
149 */
150
151 int32_t turn_around_time_hs; /*!< Specifies the Turn-Around time at HS*/
152 int32_t turn_around_time_fs; /*!< Specifies the Turn-Around time at FS*/
153
154 int32_t timeout_cal_hs; /*!< Specifies the Timeout_Calibration at HS*/
155 int32_t timeout_cal_fs; /*!< Specifies the Timeout_Calibration at FS*/
156 } ifxusb_params_t;
157
158 ///////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
159 ///////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
160
161 /*!
162 \struct ifxusb_core_if
163 \brief The ifx_core_if structure contains information needed to manage
164 the IFX USB controller acting in either host or device mode. It
165 represents the programming view of the controller as a whole.
166 */
167 typedef struct ifxusb_core_if
168 {
169 ifxusb_params_t params; /*!< Run-time Parameters */
170
171 uint8_t core_no; /*!< core number (used as id when multi-core case */
172 char *core_name; /*!< core name used for registration and informative purpose*/
173 int irq; /*!< irq number this core is hooked */
174
175 /*****************************************************************
176 * Structures and pointers to physical register interface.
177 *****************************************************************/
178 /** Core Global registers starting at offset 000h. */
179 ifxusb_core_global_regs_t *core_global_regs; /*!< pointer to Core Global Registers, offset at 000h */
180
181 /** Host-specific registers */
182 #ifdef __IS_HOST__
183 /** Host Global Registers starting at offset 400h.*/
184 ifxusb_host_global_regs_t *host_global_regs; /*!< pointer to Host Global Registers, offset at 400h */
185 #define IFXUSB_HOST_GLOBAL_REG_OFFSET 0x400
186 /** Host Port 0 Control and Status Register */
187 volatile uint32_t *hprt0; /*!< pointer to HPRT0 Registers, offset at 440h */
188 #define IFXUSB_HOST_PORT_REGS_OFFSET 0x440
189 /** Host Channel Specific Registers at offsets 500h-5FCh. */
190 ifxusb_hc_regs_t *hc_regs[MAX_EPS_CHANNELS]; /*!< pointer to Host-Channel n Registers, offset at 500h */
191 #define IFXUSB_HOST_CHAN_REGS_OFFSET 0x500
192 #define IFXUSB_CHAN_REGS_OFFSET 0x20
193 #endif
194
195 /** Device-specific registers */
196 #ifdef __IS_DEVICE__
197 /** Device Global Registers starting at offset 800h */
198 ifxusb_device_global_regs_t *dev_global_regs; /*!< pointer to Device Global Registers, offset at 800h */
199 #define IFXUSB_DEV_GLOBAL_REG_OFFSET 0x800
200
201 /** Device Logical IN Endpoint-Specific Registers 900h-AFCh */
202 ifxusb_dev_in_ep_regs_t *in_ep_regs[MAX_EPS_CHANNELS]; /*!< pointer to Device IN-EP Registers, offset at 900h */
203 #define IFXUSB_DEV_IN_EP_REG_OFFSET 0x900
204 #define IFXUSB_EP_REG_OFFSET 0x20
205 /** Device Logical OUT Endpoint-Specific Registers B00h-CFCh */
206 ifxusb_dev_out_ep_regs_t *out_ep_regs[MAX_EPS_CHANNELS];/*!< pointer to Device OUT-EP Registers, offset at 900h */
207 #define IFXUSB_DEV_OUT_EP_REG_OFFSET 0xB00
208 #endif
209
210 /** Power and Clock Gating Control Register */
211 volatile uint32_t *pcgcctl; /*!< pointer to Power and Clock Gating Control Registers, offset at E00h */
212 #define IFXUSB_PCGCCTL_OFFSET 0xE00
213
214 /** Push/pop addresses for endpoints or host channels.*/
215 uint32_t *data_fifo[MAX_EPS_CHANNELS]; /*!< pointer to FIFO access windows, offset at 1000h */
216 #define IFXUSB_DATA_FIFO_OFFSET 0x1000
217 #define IFXUSB_DATA_FIFO_SIZE 0x1000
218
219 uint32_t *data_fifo_dbg; /*!< pointer to FIFO debug windows, offset at 1000h */
220
221 /** Hardware Configuration -- stored here for convenience.*/
222 hwcfg1_data_t hwcfg1; /*!< preserved Hardware Configuration 1 */
223 hwcfg2_data_t hwcfg2; /*!< preserved Hardware Configuration 2 */
224 hwcfg3_data_t hwcfg3; /*!< preserved Hardware Configuration 3 */
225 hwcfg4_data_t hwcfg4; /*!< preserved Hardware Configuration 3 */
226 uint32_t snpsid; /*!< preserved SNPSID */
227
228 /*****************************************************************
229 * Run-time informations.
230 *****************************************************************/
231 /* Set to 1 if the core PHY interface bits in USBCFG have been initialized. */
232 uint8_t phy_init_done; /*!< indicated PHY is initialized. */
233
234 #ifdef __IS_HOST__
235 uint8_t queuing_high_bandwidth; /*!< Host mode, Queueing High Bandwidth. */
236 #endif
237 } ifxusb_core_if_t;
238
239 /*@}*//*IFXUSB_CIF*/
240
241
242 /*!
243 \fn void *ifxusb_alloc_buf(size_t size, int clear)
244 \brief This function is called to allocate buffer of specified size.
245 The allocated buffer is mapped into DMA accessable address.
246 \param size Size in BYTE to be allocated
247 \param clear 0: don't do clear after buffer allocated, other: do clear to zero
248 \return 0/NULL: Fail; uncached pointer of allocated buffer
249 \ingroup IFXUSB_CIF
250 */
251 extern void *ifxusb_alloc_buf(size_t size, int clear);
252
253 /*!
254 \fn void ifxusb_free_buf(void *vaddr)
255 \brief This function is called to free allocated buffer.
256 \param vaddr the uncached pointer of the buffer
257 \ingroup IFXUSB_CIF
258 */
259 extern void ifxusb_free_buf(void *vaddr);
260
261 /*!
262 \fn int ifxusb_core_if_init(ifxusb_core_if_t *_core_if,
263 int _irq,
264 uint32_t _reg_base_addr,
265 uint32_t _fifo_base_addr,
266 uint32_t _fifo_dbg_addr)
267 \brief This function is called to initialize the IFXUSB CSR data
268 structures. The register addresses in the device and host
269 structures are initialized from the base address supplied by the
270 caller. The calling function must make the OS calls to get the
271 base address of the IFXUSB controller registers.
272 \param _core_if Pointer of core_if structure
273 \param _irq irq number
274 \param _reg_base_addr Base address of IFXUSB core registers
275 \param _fifo_base_addr Fifo base address
276 \param _fifo_dbg_addr Fifo debug address
277 \return 0: success;
278 \ingroup IFXUSB_CIF
279 */
280 extern int ifxusb_core_if_init(ifxusb_core_if_t *_core_if,
281 int _irq,
282 uint32_t _reg_base_addr,
283 uint32_t _fifo_base_addr,
284 uint32_t _fifo_dbg_addr);
285
286
287 /*!
288 \fn void ifxusb_core_if_remove(ifxusb_core_if_t *_core_if)
289 \brief This function free the mapped address in the IFXUSB CSR data structures.
290 \param _core_if Pointer of core_if structure
291 \ingroup IFXUSB_CIF
292 */
293 extern void ifxusb_core_if_remove(ifxusb_core_if_t *_core_if);
294
295 /*!
296 \fn void ifxusb_enable_global_interrupts( ifxusb_core_if_t *_core_if )
297 \brief This function enbles the controller's Global Interrupt in the AHB Config register.
298 \param _core_if Pointer of core_if structure
299 */
300 extern void ifxusb_enable_global_interrupts( ifxusb_core_if_t *_core_if );
301
302 /*!
303 \fn void ifxusb_disable_global_interrupts( ifxusb_core_if_t *_core_if )
304 \brief This function disables the controller's Global Interrupt in the AHB Config register.
305 \param _core_if Pointer of core_if structure
306 \ingroup IFXUSB_CIF
307 */
308 extern void ifxusb_disable_global_interrupts( ifxusb_core_if_t *_core_if );
309
310 /*!
311 \fn void ifxusb_flush_tx_fifo( ifxusb_core_if_t *_core_if, const int _num )
312 \brief Flush a Tx FIFO.
313 \param _core_if Pointer of core_if structure
314 \param _num Tx FIFO to flush. ( 0x10 for ALL TX FIFO )
315 \ingroup IFXUSB_CIF
316 */
317 extern void ifxusb_flush_tx_fifo( ifxusb_core_if_t *_core_if, const int _num );
318
319 /*!
320 \fn void ifxusb_flush_rx_fifo( ifxusb_core_if_t *_core_if )
321 \brief Flush Rx FIFO.
322 \param _core_if Pointer of core_if structure
323 \ingroup IFXUSB_CIF
324 */
325 extern void ifxusb_flush_rx_fifo( ifxusb_core_if_t *_core_if );
326
327 /*!
328 \fn void ifxusb_flush_both_fifo( ifxusb_core_if_t *_core_if )
329 \brief Flush ALL Rx and Tx FIFO.
330 \param _core_if Pointer of core_if structure
331 \ingroup IFXUSB_CIF
332 */
333 extern void ifxusb_flush_both_fifo( ifxusb_core_if_t *_core_if );
334
335
336 /*!
337 \fn int ifxusb_core_soft_reset(ifxusb_core_if_t *_core_if)
338 \brief Do core a soft reset of the core. Be careful with this because it
339 resets all the internal state machines of the core.
340 \param _core_if Pointer of core_if structure
341 \ingroup IFXUSB_CIF
342 */
343 extern int ifxusb_core_soft_reset(ifxusb_core_if_t *_core_if);
344
345
346 /*!
347 \brief Turn on the USB Core Power
348 \param _core_if Pointer of core_if structure
349 \ingroup IFXUSB_CIF
350 */
351 extern void ifxusb_power_on (ifxusb_core_if_t *_core_if);
352
353 /*!
354 \fn void ifxusb_power_off (ifxusb_core_if_t *_core_if)
355 \brief Turn off the USB Core Power
356 \param _core_if Pointer of core_if structure
357 \ingroup IFXUSB_CIF
358 */
359 extern void ifxusb_power_off (ifxusb_core_if_t *_core_if);
360
361 /*!
362 \fn void ifxusb_phy_power_on (ifxusb_core_if_t *_core_if)
363 \brief Turn on the USB PHY Power
364 \param _core_if Pointer of core_if structure
365 \ingroup IFXUSB_CIF
366 */
367 extern void ifxusb_phy_power_on (ifxusb_core_if_t *_core_if);
368
369 /*!
370 \fn void ifxusb_phy_power_off (ifxusb_core_if_t *_core_if)
371 \brief Turn off the USB PHY Power
372 \param _core_if Pointer of core_if structure
373 \ingroup IFXUSB_CIF
374 */
375 extern void ifxusb_phy_power_off (ifxusb_core_if_t *_core_if);
376
377 /*!
378 \fn void ifxusb_hard_reset(ifxusb_core_if_t *_core_if)
379 \brief Reset on the USB Core RCU
380 \param _core_if Pointer of core_if structure
381 \ingroup IFXUSB_CIF
382 */
383 extern void ifxusb_hard_reset(ifxusb_core_if_t *_core_if);
384
385 ///////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
386
387
388 #ifdef __IS_HOST__
389 /*!
390 \fn void ifxusb_host_core_init(ifxusb_core_if_t *_core_if, ifxusb_params_t *_params)
391 \brief This function initializes the IFXUSB controller registers for Host mode.
392 This function flushes the Tx and Rx FIFOs and it flushes any entries in the
393 request queues.
394 \param _core_if Pointer of core_if structure
395 \param _params parameters to be set
396 \ingroup IFXUSB_CIF
397 */
398 extern void ifxusb_host_core_init(ifxusb_core_if_t *_core_if, ifxusb_params_t *_params);
399
400 /*!
401 \fn void ifxusb_host_enable_interrupts(ifxusb_core_if_t *_core_if)
402 \brief This function enables the Host mode interrupts.
403 \param _core_if Pointer of core_if structure
404 \ingroup IFXUSB_CIF
405 */
406 extern void ifxusb_host_enable_interrupts(ifxusb_core_if_t *_core_if);
407
408 /*!
409 \fn void ifxusb_host_disable_interrupts(ifxusb_core_if_t *_core_if)
410 \brief This function disables the Host mode interrupts.
411 \param _core_if Pointer of core_if structure
412 \ingroup IFXUSB_CIF
413 */
414 extern void ifxusb_host_disable_interrupts(ifxusb_core_if_t *_core_if);
415
416 #if defined(__IS_TWINPASS__)
417 extern void ifxusb_enable_afe_oc(void);
418 #endif
419
420 /*!
421 \fn void ifxusb_vbus_init(ifxusb_core_if_t *_core_if)
422 \brief This function init the VBUS control.
423 \param _core_if Pointer of core_if structure
424 \ingroup IFXUSB_CIF
425 */
426 extern void ifxusb_vbus_init(ifxusb_core_if_t *_core_if);
427
428 /*!
429 \fn void ifxusb_vbus_free(ifxusb_core_if_t *_core_if)
430 \brief This function free the VBUS control.
431 \param _core_if Pointer of core_if structure
432 \ingroup IFXUSB_CIF
433 */
434 extern void ifxusb_vbus_free(ifxusb_core_if_t *_core_if);
435
436 /*!
437 \fn void ifxusb_vbus_on(ifxusb_core_if_t *_core_if)
438 \brief Turn on the USB 5V VBus Power
439 \param _core_if Pointer of core_if structure
440 \ingroup IFXUSB_CIF
441 */
442 extern void ifxusb_vbus_on(ifxusb_core_if_t *_core_if);
443
444 /*!
445 \fn void ifxusb_vbus_off(ifxusb_core_if_t *_core_if)
446 \brief Turn off the USB 5V VBus Power
447 \param _core_if Pointer of core_if structure
448 \ingroup IFXUSB_CIF
449 */
450 extern void ifxusb_vbus_off(ifxusb_core_if_t *_core_if);
451
452 /*!
453 \fn int ifxusb_vbus(ifxusb_core_if_t *_core_if)
454 \brief Read Current VBus status
455 \param _core_if Pointer of core_if structure
456 \ingroup IFXUSB_CIF
457 */
458 extern int ifxusb_vbus(ifxusb_core_if_t *_core_if);
459
460 #if defined(__DO_OC_INT__) && defined(__DO_OC_INT_ENABLE__)
461 /*!
462 \fn void ifxusb_oc_int_on(void)
463 \brief Turn on the OC interrupt
464 \ingroup IFXUSB_CIF
465 */
466 extern void ifxusb_oc_int_on(void);
467
468 /*!
469 \fn void ifxusb_oc_int_off(void)
470 \brief Turn off the OC interrupt
471 \ingroup IFXUSB_CIF
472 */
473 extern void ifxusb_oc_int_off(void);
474 #endif //defined(__DO_OC_INT__) && defined(__DO_OC_INT_ENABLE__)
475 #endif
476
477 ///////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
478
479
480 #ifdef __IS_DEVICE__
481 /*!
482 \fn void ifxusb_dev_enable_interrupts(ifxusb_core_if_t *_core_if)
483 \brief This function enables the Device mode interrupts.
484 \param _core_if Pointer of core_if structure
485 \ingroup IFXUSB_CIF
486 */
487 extern void ifxusb_dev_enable_interrupts(ifxusb_core_if_t *_core_if);
488
489 /*!
490 \fn uint32_t ifxusb_dev_get_frame_number(ifxusb_core_if_t *_core_if)
491 \brief Gets the current USB frame number. This is the frame number from the last SOF packet.
492 \param _core_if Pointer of core_if structure
493 \ingroup IFXUSB_CIF
494 */
495 extern uint32_t ifxusb_dev_get_frame_number(ifxusb_core_if_t *_core_if);
496
497 /*!
498 \fn void ifxusb_dev_ep_set_stall(ifxusb_core_if_t *_core_if, uint8_t _epno, uint8_t _is_in)
499 \brief Set the EP STALL.
500 \param _core_if Pointer of core_if structure
501 \param _epno EP number
502 \param _is_in 1: is IN transfer
503 \ingroup IFXUSB_CIF
504 */
505 extern void ifxusb_dev_ep_set_stall(ifxusb_core_if_t *_core_if, uint8_t _epno, uint8_t _is_in);
506
507 /*!
508 \fn void ifxusb_dev_ep_clear_stall(ifxusb_core_if_t *_core_if, uint8_t _epno, uint8_t _ep_type, uint8_t _is_in)
509 \brief Set the EP STALL.
510 \param _core_if Pointer of core_if structure
511 \param _epno EP number
512 \param _ep_type EP Type
513 \ingroup IFXUSB_CIF
514 */
515 extern void ifxusb_dev_ep_clear_stall(ifxusb_core_if_t *_core_if, uint8_t _epno, uint8_t _ep_type, uint8_t _is_in);
516
517 /*!
518 \fn void ifxusb_dev_core_init(ifxusb_core_if_t *_core_if, ifxusb_params_t *_params)
519 \brief This function initializes the IFXUSB controller registers for Device mode.
520 This function flushes the Tx and Rx FIFOs and it flushes any entries in the
521 request queues.
522 This function validate the imported parameters and store the result in the CIF structure.
523 After
524 \param _core_if Pointer of core_if structure
525 \param _params structure of inported parameters
526 \ingroup IFXUSB_CIF
527 */
528 extern void ifxusb_dev_core_init(ifxusb_core_if_t *_core_if, ifxusb_params_t *_params);
529 #endif
530
531 ///////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
532
533 #if defined(__GADGET_LED__) || defined(__HOST_LED__)
534 /*!
535 \fn void ifxusb_led_init(ifxusb_core_if_t *_core_if)
536 \brief This function init the LED control.
537 \param _core_if Pointer of core_if structure
538 \ingroup IFXUSB_CIF
539 */
540 extern void ifxusb_led_init(ifxusb_core_if_t *_core_if);
541
542 /*!
543 \fn void ifxusb_led_free(ifxusb_core_if_t *_core_if)
544 \brief This function free the LED control.
545 \param _core_if Pointer of core_if structure
546 \ingroup IFXUSB_CIF
547 */
548 extern void ifxusb_led_free(ifxusb_core_if_t *_core_if);
549
550 /*!
551 \fn void ifxusb_led(ifxusb_core_if_t *_core_if)
552 \brief This function trigger the LED access.
553 \param _core_if Pointer of core_if structure
554 \ingroup IFXUSB_CIF
555 */
556 extern void ifxusb_led(ifxusb_core_if_t *_core_if);
557 #endif
558
559 ///////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
560
561 /* internal routines for debugging */
562 extern void ifxusb_dump_msg(const u8 *buf, unsigned int length);
563 extern void ifxusb_dump_spram(ifxusb_core_if_t *_core_if);
564 extern void ifxusb_dump_registers(ifxusb_core_if_t *_core_if);
565 extern void ifxusb_clean_spram(ifxusb_core_if_t *_core_if,uint32_t dwords);
566
567 ///////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
568
569 static inline uint32_t ifxusb_read_core_intr(ifxusb_core_if_t *_core_if)
570 {
571 return (ifxusb_rreg(&_core_if->core_global_regs->gintsts) &
572 (ifxusb_rreg(&_core_if->core_global_regs->gintmsk)
573 #ifdef __USE_TIMER_4_SOF__
574 | IFXUSB_SOF_INTR_MASK
575 #endif
576 ));
577 }
578
579 static inline uint32_t ifxusb_read_otg_intr (ifxusb_core_if_t *_core_if)
580 {
581 return (ifxusb_rreg (&_core_if->core_global_regs->gotgint));
582 }
583
584 static inline uint32_t ifxusb_mode(ifxusb_core_if_t *_core_if)
585 {
586 return (ifxusb_rreg( &_core_if->core_global_regs->gintsts ) & 0x1);
587 }
588 static inline uint8_t ifxusb_is_device_mode(ifxusb_core_if_t *_core_if)
589 {
590 return (ifxusb_mode(_core_if) != 1);
591 }
592 static inline uint8_t ifxusb_is_host_mode(ifxusb_core_if_t *_core_if)
593 {
594 return (ifxusb_mode(_core_if) == 1);
595 }
596
597 ///////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
598
599 #ifdef __IS_HOST__
600 static inline uint32_t ifxusb_read_hprt0(ifxusb_core_if_t *_core_if)
601 {
602 hprt0_data_t hprt0;
603 hprt0.d32 = ifxusb_rreg(_core_if->hprt0);
604 hprt0.b.prtena = 0;
605 hprt0.b.prtconndet = 0;
606 hprt0.b.prtenchng = 0;
607 hprt0.b.prtovrcurrchng = 0;
608 return hprt0.d32;
609 }
610
611 static inline uint32_t ifxusb_read_host_all_channels_intr (ifxusb_core_if_t *_core_if)
612 {
613 return (ifxusb_rreg (&_core_if->host_global_regs->haint));
614 }
615
616 static inline uint32_t ifxusb_read_host_channel_intr (ifxusb_core_if_t *_core_if, int hc_num)
617 {
618 return (ifxusb_rreg (&_core_if->hc_regs[hc_num]->hcint));
619 }
620 #endif
621
622 #ifdef __IS_DEVICE__
623 static inline uint32_t ifxusb_read_dev_all_in_ep_intr(ifxusb_core_if_t *_core_if)
624 {
625 uint32_t v;
626 v = ifxusb_rreg(&_core_if->dev_global_regs->daint) &
627 ifxusb_rreg(&_core_if->dev_global_regs->daintmsk);
628 return (v & 0xffff);
629 }
630
631 static inline uint32_t ifxusb_read_dev_all_out_ep_intr(ifxusb_core_if_t *_core_if)
632 {
633 uint32_t v;
634 v = ifxusb_rreg(&_core_if->dev_global_regs->daint) &
635 ifxusb_rreg(&_core_if->dev_global_regs->daintmsk);
636 return ((v & 0xffff0000) >> 16);
637 }
638
639 static inline uint32_t ifxusb_read_dev_in_ep_intr(ifxusb_core_if_t *_core_if, int _ep_num)
640 {
641 uint32_t v;
642 v = ifxusb_rreg(&_core_if->in_ep_regs[_ep_num]->diepint) &
643 ifxusb_rreg(&_core_if->dev_global_regs->diepmsk);
644 return v;
645 }
646
647 static inline uint32_t ifxusb_read_dev_out_ep_intr(ifxusb_core_if_t *_core_if, int _ep_num)
648 {
649 uint32_t v;
650 v = ifxusb_rreg(&_core_if->out_ep_regs[_ep_num]->doepint) &
651 ifxusb_rreg(&_core_if->dev_global_regs->doepmsk);
652 return v;
653 }
654
655 #endif
656
657 extern void ifxusb_attr_create (void *_dev);
658
659 extern void ifxusb_attr_remove (void *_dev);
660
661 ///////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
662
663 #endif // !defined(__IFXUSB_CIF_H__)
664
665