target/linux/octeon/patches-3.18/140-MIPS-OCTEON-Update-octeon-model.h-code-for-new-SoCs.patch

   1 --- a/arch/mips/include/asm/octeon/octeon-model.h
   2 +++ b/arch/mips/include/asm/octeon/octeon-model.h
   3 @@ -45,6 +45,7 @@
   4   */
   5
   6  #define OCTEON_FAMILY_MASK     0x00ffff00
   7 +#define OCTEON_PRID_MASK       0x00ffffff
   8
   9  /* Flag bits in top byte */
  10  /* Ignores revision in model checks */
  11 @@ -63,6 +64,46 @@
  12  #define OM_MATCH_6XXX_FAMILY_MODELS    0x40000000
  13  /* Match all cnf7XXX Octeon models. */
  14  #define OM_MATCH_F7XXX_FAMILY_MODELS   0x80000000
  15 +/* Match all cn7XXX Octeon models. */
  16 +#define OM_MATCH_7XXX_FAMILY_MODELS     0x10000000
  17 +#define OM_MATCH_FAMILY_MODELS         (OM_MATCH_5XXX_FAMILY_MODELS |  \
  18 +                                        OM_MATCH_6XXX_FAMILY_MODELS |  \
  19 +                                        OM_MATCH_F7XXX_FAMILY_MODELS | \
  20 +                                        OM_MATCH_7XXX_FAMILY_MODELS)
  21 +/*
  22 + * CN7XXX models with new revision encoding
  23 + */
  24 +
  25 +#define OCTEON_CN73XX_PASS1_0  0x000d9700
  26 +#define OCTEON_CN73XX          (OCTEON_CN73XX_PASS1_0 | OM_IGNORE_REVISION)
  27 +#define OCTEON_CN73XX_PASS1_X  (OCTEON_CN73XX_PASS1_0 | \
  28 +                                OM_IGNORE_MINOR_REVISION)
  29 +
  30 +#define OCTEON_CN70XX_PASS1_0  0x000d9600
  31 +#define OCTEON_CN70XX_PASS1_1  0x000d9601
  32 +#define OCTEON_CN70XX_PASS1_2  0x000d9602
  33 +
  34 +#define OCTEON_CN70XX_PASS2_0  0x000d9608
  35 +
  36 +#define OCTEON_CN70XX          (OCTEON_CN70XX_PASS1_0 | OM_IGNORE_REVISION)
  37 +#define OCTEON_CN70XX_PASS1_X  (OCTEON_CN70XX_PASS1_0 | \
  38 +                                OM_IGNORE_MINOR_REVISION)
  39 +#define OCTEON_CN70XX_PASS2_X  (OCTEON_CN70XX_PASS2_0 | \
  40 +                                OM_IGNORE_MINOR_REVISION)
  41 +
  42 +#define OCTEON_CN71XX          OCTEON_CN70XX
  43 +
  44 +#define OCTEON_CN78XX_PASS1_0  0x000d9500
  45 +#define OCTEON_CN78XX_PASS1_1  0x000d9501
  46 +#define OCTEON_CN78XX_PASS2_0  0x000d9508
  47 +
  48 +#define OCTEON_CN78XX          (OCTEON_CN78XX_PASS1_0 | OM_IGNORE_REVISION)
  49 +#define OCTEON_CN78XX_PASS1_X  (OCTEON_CN78XX_PASS1_0 | \
  50 +                                OM_IGNORE_MINOR_REVISION)
  51 +#define OCTEON_CN78XX_PASS2_X  (OCTEON_CN78XX_PASS2_0 | \
  52 +                                OM_IGNORE_MINOR_REVISION)
  53 +
  54 +#define OCTEON_CN76XX          (0x000d9540 | OM_CHECK_SUBMODEL)
  55
  56  /*
  57   * CNF7XXX models with new revision encoding
  58 @@ -217,6 +258,10 @@
  59  #define OCTEON_CN3XXX          (OCTEON_CN58XX_PASS1_0 | OM_MATCH_PREVIOUS_MODELS | OM_IGNORE_REVISION)
  60  #define OCTEON_CN5XXX          (OCTEON_CN58XX_PASS1_0 | OM_MATCH_5XXX_FAMILY_MODELS)
  61  #define OCTEON_CN6XXX          (OCTEON_CN63XX_PASS1_0 | OM_MATCH_6XXX_FAMILY_MODELS)
  62 +#define OCTEON_CNF7XXX         (OCTEON_CNF71XX_PASS1_0 | \
  63 +                                OM_MATCH_F7XXX_FAMILY_MODELS)
  64 +#define OCTEON_CN7XXX          (OCTEON_CN78XX_PASS1_0 | \
  65 +                                OM_MATCH_7XXX_FAMILY_MODELS)
  66
  67  /* These are used to cover entire families of OCTEON processors */
  68  #define OCTEON_FAM_1           (OCTEON_CN3XXX)
  69 @@ -288,9 +333,16 @@ static inline uint64_t cvmx_read_csr(uin
  70                 ((((arg_model) & (OM_FLAG_MASK)) == OM_CHECK_SUBMODEL)  \
  71                         && __OCTEON_MATCH_MASK__((chip_model), (arg_model), OCTEON_58XX_MODEL_REV_MASK)) || \
  72                 ((((arg_model) & (OM_MATCH_5XXX_FAMILY_MODELS)) == OM_MATCH_5XXX_FAMILY_MODELS) \
  73 -                       && ((chip_model) >= OCTEON_CN58XX_PASS1_0) && ((chip_model) < OCTEON_CN63XX_PASS1_0)) || \
  74 +                       && ((chip_model & OCTEON_PRID_MASK) >= OCTEON_CN58XX_PASS1_0) \
  75 +                       && ((chip_model & OCTEON_PRID_MASK) < OCTEON_CN63XX_PASS1_0)) || \
  76                 ((((arg_model) & (OM_MATCH_6XXX_FAMILY_MODELS)) == OM_MATCH_6XXX_FAMILY_MODELS) \
  77 -                       && ((chip_model) >= OCTEON_CN63XX_PASS1_0)) ||  \
  78 +                       && ((chip_model & OCTEON_PRID_MASK) >= OCTEON_CN63XX_PASS1_0) \
  79 +                       && ((chip_model & OCTEON_PRID_MASK) < OCTEON_CNF71XX_PASS1_0)) || \
  80 +               ((((arg_model) & (OM_MATCH_F7XXX_FAMILY_MODELS)) == OM_MATCH_F7XXX_FAMILY_MODELS) \
  81 +                       && ((chip_model & OCTEON_PRID_MASK) >= OCTEON_CNF71XX_PASS1_0) \
  82 +                       && ((chip_model & OCTEON_PRID_MASK) < OCTEON_CN78XX_PASS1_0)) || \
  83 +               ((((arg_model) & (OM_MATCH_7XXX_FAMILY_MODELS)) == OM_MATCH_7XXX_FAMILY_MODELS) \
  84 +                       && ((chip_model & OCTEON_PRID_MASK) >= OCTEON_CN78XX_PASS1_0)) || \
  85                 ((((arg_model) & (OM_MATCH_PREVIOUS_MODELS)) == OM_MATCH_PREVIOUS_MODELS) \
  86                         && (((chip_model) & OCTEON_58XX_MODEL_MASK) < ((arg_model) & OCTEON_58XX_MODEL_MASK))) \
  87                 )))
  88 @@ -326,6 +378,15 @@ static inline int __octeon_is_model_runt
  89  #define OCTEON_IS_COMMON_BINARY() 1
  90  #undef OCTEON_MODEL
  91
  92 +#define OCTEON_IS_OCTEON1()    OCTEON_IS_MODEL(OCTEON_CN3XXX)
  93 +#define OCTEON_IS_OCTEONPLUS() OCTEON_IS_MODEL(OCTEON_CN5XXX)
  94 +#define OCTEON_IS_OCTEON2()                                            \
  95 +       (OCTEON_IS_MODEL(OCTEON_CN6XXX) || OCTEON_IS_MODEL(OCTEON_CNF71XX))
  96 +
  97 +#define OCTEON_IS_OCTEON3()    OCTEON_IS_MODEL(OCTEON_CN7XXX)
  98 +
  99 +#define OCTEON_IS_OCTEON1PLUS()        (OCTEON_IS_OCTEON1() || OCTEON_IS_OCTEONPLUS())
 100 +
 101  const char *octeon_model_get_string(uint32_t chip_id);
 102  const char *octeon_model_get_string_buffer(uint32_t chip_id, char *buffer);
 103