ralink: improve tx_timeout function
[openwrt/svn-archive/archive.git] / target / linux / ramips / files / drivers / net / ethernet / ralink / soc_rt305x.c
1 /*
2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License as published by
4 * the Free Software Foundation; version 2 of the License
5 *
6 * This program is distributed in the hope that it will be useful,
7 * but WITHOUT ANY WARRANTY; without even the implied warranty of
8 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
9 * GNU General Public License for more details.
10 *
11 * You should have received a copy of the GNU General Public License
12 * along with this program; if not, write to the Free Software
13 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA.
14 *
15 * Copyright (C) 2009-2013 John Crispin <blogic@openwrt.org>
16 */
17
18 #include <linux/module.h>
19
20 #include <asm/mach-ralink/ralink_regs.h>
21
22 #include "ralink_soc_eth.h"
23 #include "mdio_rt2880.h"
24
25 #define RT305X_RESET_FE BIT(21)
26 #define RT305X_RESET_ESW BIT(23)
27 #define SYSC_REG_RESET_CTRL 0x034
28
29 static const u32 rt5350_reg_table[FE_REG_COUNT] = {
30 [FE_REG_PDMA_GLO_CFG] = RT5350_PDMA_GLO_CFG,
31 [FE_REG_PDMA_RST_CFG] = RT5350_PDMA_RST_CFG,
32 [FE_REG_DLY_INT_CFG] = RT5350_DLY_INT_CFG,
33 [FE_REG_TX_BASE_PTR0] = RT5350_TX_BASE_PTR0,
34 [FE_REG_TX_MAX_CNT0] = RT5350_TX_MAX_CNT0,
35 [FE_REG_TX_CTX_IDX0] = RT5350_TX_CTX_IDX0,
36 [FE_REG_TX_DTX_IDX0] = RT5350_TX_DTX_IDX0,
37 [FE_REG_RX_BASE_PTR0] = RT5350_RX_BASE_PTR0,
38 [FE_REG_RX_MAX_CNT0] = RT5350_RX_MAX_CNT0,
39 [FE_REG_RX_CALC_IDX0] = RT5350_RX_CALC_IDX0,
40 [FE_REG_RX_DRX_IDX0] = RT5350_RX_DRX_IDX0,
41 [FE_REG_FE_INT_ENABLE] = RT5350_FE_INT_ENABLE,
42 [FE_REG_FE_INT_STATUS] = RT5350_FE_INT_STATUS,
43 [FE_REG_FE_RST_GL] = 0,
44 [FE_REG_FE_DMA_VID_BASE] = 0,
45 };
46
47 static void rt305x_init_data(struct fe_soc_data *data,
48 struct net_device *netdev)
49 {
50 struct fe_priv *priv = netdev_priv(netdev);
51
52 priv->flags = FE_FLAG_PADDING_64B | FE_FLAG_PADDING_BUG;
53 netdev->hw_features = NETIF_F_SG | NETIF_F_IP_CSUM |
54 NETIF_F_RXCSUM | NETIF_F_HW_VLAN_CTAG_TX;
55 }
56
57 static int rt3050_fwd_config(struct fe_priv *priv)
58 {
59 int ret;
60
61 if (ralink_soc != RT305X_SOC_RT3052) {
62 ret = fe_set_clock_cycle(priv);
63 if (ret)
64 return ret;
65 }
66
67 fe_fwd_config(priv);
68 if (ralink_soc != RT305X_SOC_RT3352)
69 fe_w32(FE_PSE_FQFC_CFG_INIT, FE_PSE_FQ_CFG);
70 fe_csum_config(priv);
71
72 return 0;
73 }
74
75 static void rt305x_fe_reset(void)
76 {
77 rt_sysc_w32(RT305X_RESET_FE, SYSC_REG_RESET_CTRL);
78 rt_sysc_w32(0, SYSC_REG_RESET_CTRL);
79 }
80
81 static void rt5350_init_data(struct fe_soc_data *data,
82 struct net_device *netdev)
83 {
84 netdev->hw_features = NETIF_F_SG | NETIF_F_RXCSUM;
85 }
86
87 static void rt5350_set_mac(struct fe_priv *priv, unsigned char *mac)
88 {
89 unsigned long flags;
90
91 spin_lock_irqsave(&priv->page_lock, flags);
92 fe_w32((mac[0] << 8) | mac[1], RT5350_SDM_MAC_ADRH);
93 fe_w32((mac[2] << 24) | (mac[3] << 16) | (mac[4] << 8) | mac[5],
94 RT5350_SDM_MAC_ADRL);
95 spin_unlock_irqrestore(&priv->page_lock, flags);
96 }
97
98 static void rt5350_rxcsum_config(bool enable)
99 {
100 if (enable)
101 fe_w32(fe_r32(RT5350_SDM_CFG) | (RT5350_SDM_ICS_EN |
102 RT5350_SDM_TCS_EN | RT5350_SDM_UCS_EN),
103 RT5350_SDM_CFG);
104 else
105 fe_w32(fe_r32(RT5350_SDM_CFG) & ~(RT5350_SDM_ICS_EN |
106 RT5350_SDM_TCS_EN | RT5350_SDM_UCS_EN),
107 RT5350_SDM_CFG);
108 }
109
110 static int rt5350_fwd_config(struct fe_priv *priv)
111 {
112 struct net_device *dev = priv_netdev(priv);
113
114 rt5350_rxcsum_config((dev->features & NETIF_F_RXCSUM));
115
116 return 0;
117 }
118
119 static void rt5350_tx_dma(struct fe_tx_dma *txd)
120 {
121 txd->txd4 = 0;
122 }
123
124 static void rt5350_fe_reset(void)
125 {
126 rt_sysc_w32(RT305X_RESET_FE | RT305X_RESET_ESW, SYSC_REG_RESET_CTRL);
127 rt_sysc_w32(0, SYSC_REG_RESET_CTRL);
128 }
129
130 static struct fe_soc_data rt3050_data = {
131 .mac = { 0x00, 0x11, 0x22, 0x33, 0x44, 0x55 },
132 .init_data = rt305x_init_data,
133 .reset_fe = rt305x_fe_reset,
134 .fwd_config = rt3050_fwd_config,
135 .pdma_glo_cfg = FE_PDMA_SIZE_8DWORDS,
136 .checksum_bit = RX_DMA_L4VALID,
137 .tx_udf_bit = TX_DMA_UDF,
138 .rx_int = FE_RX_DONE_INT,
139 .tx_int = FE_TX_DONE_INT,
140 };
141
142 static struct fe_soc_data rt5350_data = {
143 .mac = { 0x00, 0x11, 0x22, 0x33, 0x44, 0x55 },
144 .init_data = rt5350_init_data,
145 .reg_table = rt5350_reg_table,
146 .reset_fe = rt5350_fe_reset,
147 .set_mac = rt5350_set_mac,
148 .fwd_config = rt5350_fwd_config,
149 .tx_dma = rt5350_tx_dma,
150 .pdma_glo_cfg = FE_PDMA_SIZE_8DWORDS,
151 .checksum_bit = RX_DMA_L4VALID,
152 .tx_udf_bit = TX_DMA_UDF,
153 .rx_int = RT5350_RX_DONE_INT,
154 .tx_int = RT5350_TX_DONE_INT,
155 };
156
157 const struct of_device_id of_fe_match[] = {
158 { .compatible = "ralink,rt3050-eth", .data = &rt3050_data },
159 { .compatible = "ralink,rt5350-eth", .data = &rt5350_data },
160 {},
161 };
162
163 MODULE_DEVICE_TABLE(of, of_fe_match);