target/linux/ramips/patches-3.14/0048-GPIO-ralink-add-mt7621-gpio-controller.patch

   1 From 8481cdf6f96dc16cbcc129d046c021d17a891274 Mon Sep 17 00:00:00 2001
   2 From: John Crispin <blogic@openwrt.org>
   3 Date: Sun, 27 Jul 2014 11:00:32 +0100
   4 Subject: [PATCH 48/57] GPIO: ralink: add mt7621 gpio controller
   5
   6 Signed-off-by: John Crispin <blogic@openwrt.org>
   7 ---
   8  arch/mips/Kconfig          |    3 +
   9  drivers/gpio/Kconfig       |    6 ++
  10  drivers/gpio/Makefile      |    1 +
  11  drivers/gpio/gpio-mt7621.c |  177 ++++++++++++++++++++++++++++++++++++++++++++
  12  4 files changed, 187 insertions(+)
  13  create mode 100644 drivers/gpio/gpio-mt7621.c
  14
  15 diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
  16 index 4ac98ca..fd3bbb1 100644
  17 --- a/arch/mips/Kconfig
  18 +++ b/arch/mips/Kconfig
  19 @@ -437,6 +437,9 @@ config RALINK
  20         select RESET_CONTROLLER
  21         select PINCTRL
  22         select PINCTRL_RT2880
  23 +       select ARCH_HAS_RESET_CONTROLLER
  24 +       select RESET_CONTROLLER
  25 +       select ARCH_REQUIRE_GPIOLIB
  26
  27  config SGI_IP22
  28         bool "SGI IP22 (Indy/Indigo2)"
  29 diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
  30 index 2d75a68..5dff8d5 100644
  31 --- a/drivers/gpio/Kconfig
  32 +++ b/drivers/gpio/Kconfig
  33 @@ -827,6 +827,12 @@ config GPIO_BCM_KONA
  34         help
  35           Turn on GPIO support for Broadcom "Kona" chips.
  36
  37 +config GPIO_MT7621
  38 +       bool "Mediatek GPIO Support"
  39 +       depends on SOC_MT7620 || SOC_MT7621
  40 +       help
  41 +         Say yes here to support the Mediatek SoC GPIO device
  42 +
  43  comment "USB GPIO expanders:"
  44
  45  config GPIO_VIPERBOARD
  46 diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
  47 index 2cbdbe6..2365e34 100644
  48 --- a/drivers/gpio/Makefile
  49 +++ b/drivers/gpio/Makefile
  50 @@ -100,3 +100,4 @@ obj-$(CONFIG_GPIO_WM8350)   += gpio-wm8350.o
  51  obj-$(CONFIG_GPIO_WM8994)      += gpio-wm8994.o
  52  obj-$(CONFIG_GPIO_XILINX)      += gpio-xilinx.o
  53  obj-$(CONFIG_GPIO_XTENSA)      += gpio-xtensa.o
  54 +obj-$(CONFIG_GPIO_MT7621)      += gpio-mt7621.o
  55 diff --git a/drivers/gpio/gpio-mt7621.c b/drivers/gpio/gpio-mt7621.c
  56 new file mode 100644
  57 index 0000000..7ae7eb9
  58 --- /dev/null
  59 +++ b/drivers/gpio/gpio-mt7621.c
  60 @@ -0,0 +1,177 @@
  61 +/*
  62 + * This program is free software; you can redistribute it and/or modify it
  63 + * under the terms of the GNU General Public License version 2 as published
  64 + * by the Free Software Foundation.
  65 + *
  66 + * Copyright (C) 2009-2011 Gabor Juhos <juhosg@openwrt.org>
  67 + * Copyright (C) 2013 John Crispin <blogic@openwrt.org>
  68 + */
  69 +
  70 +#include <linux/io.h>
  71 +#include <linux/err.h>
  72 +#include <linux/gpio.h>
  73 +#include <linux/module.h>
  74 +#include <linux/of_irq.h>
  75 +#include <linux/spinlock.h>
  76 +#include <linux/irqdomain.h>
  77 +#include <linux/interrupt.h>
  78 +#include <linux/platform_device.h>
  79 +
  80 +#define MTK_BANK_WIDTH         32
  81 +
  82 +enum mediatek_gpio_reg {
  83 +       GPIO_REG_CTRL = 0,
  84 +       GPIO_REG_POL,
  85 +       GPIO_REG_DATA,
  86 +       GPIO_REG_DSET,
  87 +       GPIO_REG_DCLR,
  88 +};
  89 +
  90 +static void __iomem *mtk_gc_membase;
  91 +
  92 +struct mtk_gc {
  93 +       struct gpio_chip chip;
  94 +       spinlock_t lock;
  95 +       int bank;
  96 +};
  97 +
  98 +static inline struct mtk_gc
  99 +*to_mediatek_gpio(struct gpio_chip *chip)
 100 +{
 101 +       struct mtk_gc *mgc;
 102 +
 103 +       mgc = container_of(chip, struct mtk_gc, chip);
 104 +
 105 +       return mgc;
 106 +}
 107 +
 108 +static inline void
 109 +mtk_gpio_w32(struct mtk_gc *rg, u8 reg, u32 val)
 110 +{
 111 +       iowrite32(val, mtk_gc_membase + (reg * 0x10) + (rg->bank * 0x4));
 112 +}
 113 +
 114 +static inline u32
 115 +mtk_gpio_r32(struct mtk_gc *rg, u8 reg)
 116 +{
 117 +       return ioread32(mtk_gc_membase + (reg * 0x10) + (rg->bank * 0x4));
 118 +}
 119 +
 120 +static void
 121 +mediatek_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
 122 +{
 123 +       struct mtk_gc *rg = to_mediatek_gpio(chip);
 124 +
 125 +       mtk_gpio_w32(rg, (value) ? GPIO_REG_DSET : GPIO_REG_DCLR, BIT(offset));
 126 +}
 127 +
 128 +static int
 129 +mediatek_gpio_get(struct gpio_chip *chip, unsigned offset)
 130 +{
 131 +       struct mtk_gc *rg = to_mediatek_gpio(chip);
 132 +
 133 +       return !!(mtk_gpio_r32(rg, GPIO_REG_DATA) & BIT(offset));
 134 +}
 135 +
 136 +static int
 137 +mediatek_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
 138 +{
 139 +       struct mtk_gc *rg = to_mediatek_gpio(chip);
 140 +       unsigned long flags;
 141 +       u32 t;
 142 +
 143 +       spin_lock_irqsave(&rg->lock, flags);
 144 +       t = mtk_gpio_r32(rg, GPIO_REG_CTRL);
 145 +       t &= ~BIT(offset);
 146 +       mtk_gpio_w32(rg, GPIO_REG_CTRL, t);
 147 +       spin_unlock_irqrestore(&rg->lock, flags);
 148 +
 149 +       return 0;
 150 +}
 151 +
 152 +static int
 153 +mediatek_gpio_direction_output(struct gpio_chip *chip,
 154 +                                       unsigned offset, int value)
 155 +{
 156 +       struct mtk_gc *rg = to_mediatek_gpio(chip);
 157 +       unsigned long flags;
 158 +       u32 t;
 159 +
 160 +       spin_lock_irqsave(&rg->lock, flags);
 161 +       t = mtk_gpio_r32(rg, GPIO_REG_CTRL);
 162 +       t |= BIT(offset);
 163 +       mtk_gpio_w32(rg, GPIO_REG_CTRL, t);
 164 +       mediatek_gpio_set(chip, offset, value);
 165 +       spin_unlock_irqrestore(&rg->lock, flags);
 166 +
 167 +       return 0;
 168 +}
 169 +
 170 +static int
 171 +mediatek_gpio_bank_probe(struct platform_device *pdev, struct device_node *bank)
 172 +{
 173 +       const __be32 *id = of_get_property(bank, "reg", NULL);
 174 +       struct mtk_gc *rg = devm_kzalloc(&pdev->dev,
 175 +                               sizeof(struct mtk_gc), GFP_KERNEL);
 176 +       if (!rg || !id)
 177 +               return -ENOMEM;
 178 +
 179 +       spin_lock_init(&rg->lock);
 180 +
 181 +       rg->chip.dev = &pdev->dev;
 182 +       rg->chip.label = dev_name(&pdev->dev);
 183 +       rg->chip.of_node = bank;
 184 +       rg->chip.base = MTK_BANK_WIDTH * be32_to_cpu(*id);
 185 +       rg->chip.ngpio = MTK_BANK_WIDTH;
 186 +       rg->chip.direction_input = mediatek_gpio_direction_input;
 187 +       rg->chip.direction_output = mediatek_gpio_direction_output;
 188 +       rg->chip.get = mediatek_gpio_get;
 189 +       rg->chip.set = mediatek_gpio_set;
 190 +
 191 +       /* set polarity to low for all gpios */
 192 +       mtk_gpio_w32(rg, GPIO_REG_POL, 0);
 193 +
 194 +       dev_info(&pdev->dev, "registering %d gpios\n", rg->chip.ngpio);
 195 +
 196 +       return gpiochip_add(&rg->chip);
 197 +}
 198 +
 199 +static int
 200 +mediatek_gpio_probe(struct platform_device *pdev)
 201 +{
 202 +       struct device_node *bank, *np = pdev->dev.of_node;
 203 +       struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 204 +
 205 +       mtk_gc_membase = devm_request_and_ioremap(&pdev->dev, res);
 206 +       if (IS_ERR(mtk_gc_membase))
 207 +               return PTR_ERR(mtk_gc_membase);
 208 +
 209 +       for_each_child_of_node(np, bank)
 210 +               if (of_device_is_compatible(bank, "mtk,mt7621-gpio-bank"))
 211 +                       mediatek_gpio_bank_probe(pdev, bank);
 212 +
 213 +       return 0;
 214 +}
 215 +
 216 +static const struct of_device_id mediatek_gpio_match[] = {
 217 +       { .compatible = "mtk,mt7621-gpio" },
 218 +       {},
 219 +};
 220 +MODULE_DEVICE_TABLE(of, mediatek_gpio_match);
 221 +
 222 +static struct platform_driver mediatek_gpio_driver = {
 223 +       .probe = mediatek_gpio_probe,
 224 +       .driver = {
 225 +               .name = "mt7621_gpio",
 226 +               .owner = THIS_MODULE,
 227 +               .of_match_table = mediatek_gpio_match,
 228 +       },
 229 +};
 230 +
 231 +static int __init
 232 +mediatek_gpio_init(void)
 233 +{
 234 +       return platform_driver_register(&mediatek_gpio_driver);
 235 +}
 236 +
 237 +subsys_initcall(mediatek_gpio_init);
 238 --
 239 1.7.10.4
 240