target/linux/ramips/patches-4.3/0029-phy-usb-add-ralink-phy.patch

   1 From a10fc0cb650be725157eca50e2ceb34efc281ac2 Mon Sep 17 00:00:00 2001
   2 From: John Crispin <blogic@openwrt.org>
   3 Date: Mon, 22 Apr 2013 23:20:03 +0200
   4 Subject: [PATCH 29/53] phy: usb: add ralink phy
   5
   6 Signed-off-by: John Crispin <blogic@openwrt.org>
   7 ---
   8  drivers/phy/Kconfig          |    5 ++
   9  drivers/phy/Makefile         |    1 +
  10  drivers/phy/phy-ralink-usb.c |  175 ++++++++++++++++++++++++++++++++++++++++++
  11  3 files changed, 181 insertions(+)
  12  create mode 100644 drivers/phy/phy-ralink-usb.c
  13
  14 --- a/drivers/phy/Kconfig
  15 +++ b/drivers/phy/Kconfig
  16 @@ -331,6 +331,11 @@ config PHY_XGENE
  17         help
  18           This option enables support for APM X-Gene SoC multi-purpose PHY.
  19
  20 +config PHY_RALINK_USB
  21 +       tristate "Ralink USB PHY driver"
  22 +       select GENERIC_PHY
  23 +       depends on RALINK
  24 +
  25  config PHY_STIH407_USB
  26         tristate "STMicroelectronics USB2 picoPHY driver for STiH407 family"
  27         depends on RESET_CONTROLLER
  28 --- a/drivers/phy/Makefile
  29 +++ b/drivers/phy/Makefile
  30 @@ -46,3 +46,4 @@ obj-$(CONFIG_PHY_QCOM_UFS)    += phy-qcom-
  31  obj-$(CONFIG_PHY_TUSB1210)             += phy-tusb1210.o
  32  obj-$(CONFIG_PHY_BRCMSTB_SATA)         += phy-brcmstb-sata.o
  33  obj-$(CONFIG_PHY_PISTACHIO_USB)                += phy-pistachio-usb.o
  34 +obj-$(CONFIG_PHY_RALINK_USB)           += phy-ralink-usb.o
  35 --- /dev/null
  36 +++ b/drivers/phy/phy-ralink-usb.c
  37 @@ -0,0 +1,175 @@
  38 +/*
  39 + * Allwinner ralink USB phy driver
  40 + *
  41 + * Copyright (C) 2014 John Crispin <blogic@openwrt.org>
  42 + *
  43 + * Based on code from
  44 + * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
  45 + *
  46 + * This program is free software; you can redistribute it and/or modify
  47 + * it under the terms of the GNU General Public License as published by
  48 + * the Free Software Foundation; either version 2 of the License, or
  49 + * (at your option) any later version.
  50 + *
  51 + * This program is distributed in the hope that it will be useful,
  52 + * but WITHOUT ANY WARRANTY; without even the implied warranty of
  53 + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  54 + * GNU General Public License for more details.
  55 + */
  56 +
  57 +#include <linux/delay.h>
  58 +#include <linux/err.h>
  59 +#include <linux/io.h>
  60 +#include <linux/kernel.h>
  61 +#include <linux/module.h>
  62 +#include <linux/mutex.h>
  63 +#include <linux/phy/phy.h>
  64 +#include <linux/platform_device.h>
  65 +#include <linux/reset.h>
  66 +#include <linux/of_platform.h>
  67 +
  68 +#include <asm/mach-ralink/ralink_regs.h>
  69 +
  70 +#define RT_SYSC_REG_SYSCFG1            0x014
  71 +#define RT_SYSC_REG_CLKCFG1            0x030
  72 +#define RT_SYSC_REG_USB_PHY_CFG                0x05c
  73 +
  74 +#define RT_RSTCTRL_UDEV                        BIT(25)
  75 +#define RT_RSTCTRL_UHST                        BIT(22)
  76 +#define RT_SYSCFG1_USB0_HOST_MODE      BIT(10)
  77 +
  78 +#define MT7620_CLKCFG1_UPHY0_CLK_EN    BIT(25)
  79 +#define MT7620_CLKCFG1_UPHY1_CLK_EN    BIT(22)
  80 +#define RT_CLKCFG1_UPHY1_CLK_EN                BIT(20)
  81 +#define RT_CLKCFG1_UPHY0_CLK_EN                BIT(18)
  82 +
  83 +#define USB_PHY_UTMI_8B60M             BIT(1)
  84 +#define UDEV_WAKEUP                    BIT(0)
  85 +
  86 +static atomic_t usb_pwr_ref = ATOMIC_INIT(0);
  87 +static struct reset_control *rstdev;
  88 +static struct reset_control *rsthost;
  89 +static u32 phy_clk;
  90 +static struct phy *rt_phy;
  91 +
  92 +static void usb_phy_enable(int state)
  93 +{
  94 +       if (state)
  95 +               rt_sysc_m32(0, phy_clk, RT_SYSC_REG_CLKCFG1);
  96 +       else
  97 +               rt_sysc_m32(phy_clk, 0, RT_SYSC_REG_CLKCFG1);
  98 +       mdelay(100);
  99 +}
 100 +
 101 +static int ralink_usb_phy_init(struct phy *_phy)
 102 +{
 103 +       return 0;
 104 +}
 105 +
 106 +static int ralink_usb_phy_exit(struct phy *_phy)
 107 +{
 108 +       return 0;
 109 +}
 110 +
 111 +static int ralink_usb_phy_power_on(struct phy *_phy)
 112 +{
 113 +       if (atomic_inc_return(&usb_pwr_ref) == 1) {
 114 +               int host = 1;
 115 +               u32 t;
 116 +
 117 +               usb_phy_enable(1);
 118 +
 119 +               if (host) {
 120 +                       rt_sysc_m32(0, RT_SYSCFG1_USB0_HOST_MODE, RT_SYSC_REG_SYSCFG1);
 121 +                       if (!IS_ERR(rsthost))
 122 +                               reset_control_deassert(rsthost);
 123 +                       if (!IS_ERR(rstdev))
 124 +                               reset_control_deassert(rstdev);
 125 +               } else {
 126 +                       rt_sysc_m32(RT_SYSCFG1_USB0_HOST_MODE, 0, RT_SYSC_REG_SYSCFG1);
 127 +                       if (!IS_ERR(rstdev))
 128 +                               reset_control_deassert(rstdev);
 129 +               }
 130 +               mdelay(100);
 131 +
 132 +               t = rt_sysc_r32(RT_SYSC_REG_USB_PHY_CFG);
 133 +               dev_info(&_phy->dev, "remote usb device wakeup %s\n",
 134 +                       (t & UDEV_WAKEUP) ? ("enabbled") : ("disabled"));
 135 +               if (t & USB_PHY_UTMI_8B60M)
 136 +                       dev_info(&_phy->dev, "UTMI 8bit 60MHz\n");
 137 +               else
 138 +                       dev_info(&_phy->dev, "UTMI 16bit 30MHz\n");
 139 +       }
 140 +
 141 +       return 0;
 142 +}
 143 +
 144 +static int ralink_usb_phy_power_off(struct phy *_phy)
 145 +{
 146 +       if (atomic_dec_return(&usb_pwr_ref) == 0) {
 147 +               usb_phy_enable(0);
 148 +               if (!IS_ERR(rstdev))
 149 +                       reset_control_assert(rstdev);
 150 +               if (!IS_ERR(rsthost))
 151 +                       reset_control_assert(rsthost);
 152 +       }
 153 +
 154 +       return 0;
 155 +}
 156 +
 157 +static struct phy_ops ralink_usb_phy_ops = {
 158 +       .init           = ralink_usb_phy_init,
 159 +       .exit           = ralink_usb_phy_exit,
 160 +       .power_on       = ralink_usb_phy_power_on,
 161 +       .power_off      = ralink_usb_phy_power_off,
 162 +       .owner          = THIS_MODULE,
 163 +};
 164 +
 165 +static struct phy *ralink_usb_phy_xlate(struct device *dev,
 166 +                                       struct of_phandle_args *args)
 167 +{
 168 +       return rt_phy;
 169 +}
 170 +
 171 +static const struct of_device_id ralink_usb_phy_of_match[] = {
 172 +       { .compatible = "ralink,rt3xxx-usbphy", .data = (void *) (RT_CLKCFG1_UPHY1_CLK_EN | RT_CLKCFG1_UPHY0_CLK_EN) },
 173 +       { .compatible = "ralink,mt7620a-usbphy", .data = (void *) (MT7620_CLKCFG1_UPHY1_CLK_EN | MT7620_CLKCFG1_UPHY0_CLK_EN) },
 174 +       { },
 175 +};
 176 +MODULE_DEVICE_TABLE(of, ralink_usb_phy_of_match);
 177 +
 178 +static int ralink_usb_phy_probe(struct platform_device *pdev)
 179 +{
 180 +       struct device *dev = &pdev->dev;
 181 +       struct phy_provider *phy_provider;
 182 +       const struct of_device_id *match;
 183 +
 184 +       match = of_match_device(ralink_usb_phy_of_match, &pdev->dev);
 185 +       phy_clk = (int) match->data;
 186 +
 187 +       rsthost = devm_reset_control_get(&pdev->dev, "host");
 188 +       rstdev = devm_reset_control_get(&pdev->dev, "device");
 189 +
 190 +       rt_phy = devm_phy_create(dev, NULL, &ralink_usb_phy_ops);
 191 +       if (IS_ERR(rt_phy)) {
 192 +               dev_err(dev, "failed to create PHY\n");
 193 +               return PTR_ERR(rt_phy);
 194 +       }
 195 +
 196 +       phy_provider = devm_of_phy_provider_register(dev, ralink_usb_phy_xlate);
 197 +
 198 +       return PTR_ERR_OR_ZERO(phy_provider);
 199 +}
 200 +
 201 +static struct platform_driver ralink_usb_phy_driver = {
 202 +       .probe  = ralink_usb_phy_probe,
 203 +       .driver = {
 204 +               .of_match_table = ralink_usb_phy_of_match,
 205 +               .name  = "ralink-usb-phy",
 206 +       }
 207 +};
 208 +module_platform_driver(ralink_usb_phy_driver);
 209 +
 210 +MODULE_DESCRIPTION("Ralink USB phy driver");
 211 +MODULE_AUTHOR("John Crispin <blogic@openwrt.org>");
 212 +MODULE_LICENSE("GPL v2");