a4b2292f101ab17022d9c0e8cd123b6401961718
[openwrt/svn-archive/archive.git] / target / linux / xburst / files-2.6.32 / arch / mips / jz4740 / reset.c
1 /*
2 * linux/arch/mips/jz4740/reset.c
3 *
4 * JZ4740 reset routines.
5 *
6 * Copyright (c) 2006-2007 Ingenic Semiconductor Inc.
7 * Author: <yliu@ingenic.cn>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13 #include <linux/sched.h>
14 #include <linux/mm.h>
15 #include <asm/io.h>
16 #include <asm/pgtable.h>
17 #include <asm/processor.h>
18 #include <asm/reboot.h>
19 #include <asm/system.h>
20 #include <asm/mach-jz4740/regs.h>
21 #include <asm/mach-jz4740/timer.h>
22 #include <asm/mach-jz4740/jz4740.h>
23
24 void jz_restart(char *command)
25 {
26 printk(KERN_NOTICE "Restarting after 4 ms\n");
27 REG_WDT_TCSR = WDT_TCSR_PRESCALE4 | WDT_TCSR_EXT_EN;
28 REG_WDT_TCNT = 0;
29 REG_WDT_TDR = JZ_EXTAL/1000; /* reset after 4ms */
30 jz4740_timer_enable_watchdog();
31 REG_WDT_TCER = WDT_TCER_TCEN; /* wdt start */
32 while (1);
33 }
34
35 void jz_halt(void)
36 {
37 /* Put CPU to power down mode */
38 while (!(REG_RTC_RCR & RTC_RCR_WRDY));
39 REG_RTC_HCR = RTC_HCR_PD;
40
41 while (1)
42 __asm__(".set\tmips3\n\t"
43 "wait\n\t"
44 ".set\tmips0");
45 }
46
47 void jz_power_off(void)
48 {
49 jz_halt();
50 }