target/linux/xburst/files-2.6.32/drivers/video/jz4740_fb.c

   1 /*
   2  *  Copyright (C) 2009, Lars-Peter Clausen <lars@metafoo.de>
   3  *      JZ4720/JZ4740 SoC LCD framebuffer driver
   4  *
   5  *  This program is free software; you can redistribute  it and/or modify it
   6  *  under  the terms of  the GNU General  Public License as published by the
   7  *  Free Software Foundation;  either version 2 of the  License, or (at your
   8  *  option) any later version.
   9  *
  10  *  You should have received a copy of the  GNU General Public License along
  11  *  with this program; if not, write  to the Free Software Foundation, Inc.,
  12  *  675 Mass Ave, Cambridge, MA 02139, USA.
  13  *
  14  */
  15
  16 #include <linux/types.h>
  17 #include <linux/platform_device.h>
  18 #include <linux/fb.h>
  19 #include <linux/module.h>
  20 #include <linux/dma-mapping.h>
  21 #include <linux/jz4740_fb.h>
  22
  23 #include <linux/delay.h>
  24 #include <linux/clk.h>
  25
  26 #include <asm/mach-jz4740/gpio.h>
  27
  28 #define JZ_REG_LCD_CFG          0x00
  29 #define JZ_REG_LCD_VSYNC        0x04
  30 #define JZ_REG_LCD_HSYNC        0x08
  31 #define JZ_REG_LCD_VAT          0x0C
  32 #define JZ_REG_LCD_DAH          0x10
  33 #define JZ_REG_LCD_DAV          0x14
  34 #define JZ_REG_LCD_PS           0x18
  35 #define JZ_REG_LCD_CLS          0x1C
  36 #define JZ_REG_LCD_SPL          0x20
  37 #define JZ_REG_LCD_REV          0x24
  38 #define JZ_REG_LCD_CTRL         0x30
  39 #define JZ_REG_LCD_STATE        0x34
  40 #define JZ_REG_LCD_IID          0x38
  41 #define JZ_REG_LCD_DA0          0x40
  42 #define JZ_REG_LCD_SA0          0x44
  43 #define JZ_REG_LCD_FID0         0x48
  44 #define JZ_REG_LCD_CMD0         0x4C
  45 #define JZ_REG_LCD_DA1          0x50
  46 #define JZ_REG_LCD_SA1          0x54
  47 #define JZ_REG_LCD_FID1         0x58
  48 #define JZ_REG_LCD_CMD1         0x5C
  49
  50 #define JZ_LCD_CFG_SLCD BIT(31)
  51 #define JZ_LCD_CFG_PSM BIT(23)
  52 #define JZ_LCD_CFG_CLSM BIT(22)
  53 #define JZ_LCD_CFG_SPLM BIT(21)
  54 #define JZ_LCD_CFG_REVM BIT(20)
  55 #define JZ_LCD_CFG_HSYNCM BIT(19)
  56 #define JZ_LCD_CFG_PCLKM BIT(18)
  57 #define JZ_LCD_CFG_INV BIT(17)
  58 #define JZ_LCD_CFG_SYNC_DIR BIT(16)
  59 #define JZ_LCD_CFG_PSP BIT(15)
  60 #define JZ_LCD_CFG_CLSP BIT(14)
  61 #define JZ_LCD_CFG_SPLP BIT(13)
  62 #define JZ_LCD_CFG_REVP BIT(12)
  63 #define JZ_LCD_CFG_HSYNCP BIT(11)
  64 #define JZ_LCD_CFG_PCLKP BIT(10)
  65 #define JZ_LCD_CFG_DEP BIT(9)
  66 #define JZ_LCD_CFG_VSYNCP BIT(8)
  67 #define JZ_LCD_CFG_18_BIT BIT(7)
  68 #define JZ_LCD_CFG_PDW BIT(5) | BIT(4)
  69 #define JZ_LCD_CFG_MODE_MASK 0xf
  70
  71 #define JZ_LCD_CTRL_BURST_4 (0x0 << 28)
  72 #define JZ_LCD_CTRL_BURST_8 (0x1 << 28)
  73 #define JZ_LCD_CTRL_BURST_16 (0x2 << 28)
  74 #define JZ_LCD_CTRL_RGB555 BIT(27)
  75 #define JZ_LCD_CTRL_OFUP BIT(26)
  76 #define JZ_LCD_CTRL_FRC_GRAYSCALE_16 (0x0 << 24)
  77 #define JZ_LCD_CTRL_FRC_GRAYSCALE_4 (0x1 << 24)
  78 #define JZ_LCD_CTRL_FRC_GRAYSCALE_2 (0x2 << 24)
  79 #define JZ_LCD_CTRL_PDD_MASK (0xff << 16)
  80 #define JZ_LCD_CTRL_EOF_IRQ BIT(13)
  81 #define JZ_LCD_CTRL_SOF_IRQ BIT(12)
  82 #define JZ_LCD_CTRL_OFU_IRQ BIT(11)
  83 #define JZ_LCD_CTRL_IFU0_IRQ BIT(10)
  84 #define JZ_LCD_CTRL_IFU1_IRQ BIT(9)
  85 #define JZ_LCD_CTRL_DD_IRQ BIT(8)
  86 #define JZ_LCD_CTRL_QDD_IRQ BIT(7)
  87 #define JZ_LCD_CTRL_REVERSE_ENDIAN BIT(6)
  88 #define JZ_LCD_CTRL_LSB_FISRT BIT(5)
  89 #define JZ_LCD_CTRL_DISABLE BIT(4)
  90 #define JZ_LCD_CTRL_ENABLE BIT(3)
  91 #define JZ_LCD_CTRL_BPP_1 0x0
  92 #define JZ_LCD_CTRL_BPP_2 0x1
  93 #define JZ_LCD_CTRL_BPP_4 0x2
  94 #define JZ_LCD_CTRL_BPP_8 0x3
  95 #define JZ_LCD_CTRL_BPP_15_16 0x4
  96 #define JZ_LCD_CTRL_BPP_18_24 0x5
  97
  98 #define JZ_LCD_CMD_SOF_IRQ BIT(15)
  99 #define JZ_LCD_CMD_EOF_IRQ BIT(16)
 100 #define JZ_LCD_CMD_ENABLE_PAL BIT(12)
 101
 102 #define JZ_LCD_SYNC_MASK 0x3ff
 103
 104 #define JZ_LCD_STATE_DISABLED BIT(0)
 105
 106 struct jzfb_framedesc {
 107         uint32_t next;
 108         uint32_t addr;
 109         uint32_t id;
 110         uint32_t cmd;
 111 } __attribute__((packed));
 112
 113 struct jzfb {
 114         struct fb_info *fb;
 115         struct platform_device *pdev;
 116         void __iomem *base;
 117         struct resource *mem;
 118         struct jz4740_fb_platform_data *pdata;
 119
 120         void *devmem;
 121         size_t devmem_size;
 122         dma_addr_t devmem_phys;
 123         void *vidmem;
 124         size_t vidmem_size;
 125         dma_addr_t vidmem_phys;
 126         struct jzfb_framedesc *framedesc;
 127
 128         struct clk *ldclk;
 129         struct clk *lpclk;
 130
 131         uint32_t pseudo_palette[16];
 132         unsigned is_enabled:1;
 133 };
 134
 135 static struct fb_fix_screeninfo jzfb_fix __devinitdata = {
 136         .id =           "JZ4740 FB",
 137         .type =         FB_TYPE_PACKED_PIXELS,
 138         .visual =       FB_VISUAL_TRUECOLOR,
 139         .xpanstep =     0,
 140         .ypanstep =     0,
 141         .ywrapstep =    0,
 142         .accel =        FB_ACCEL_NONE,
 143 };
 144
 145 const static struct jz_gpio_bulk_request jz_lcd_pins[] = {
 146         JZ_GPIO_BULK_PIN(LCD_PCLK),
 147         JZ_GPIO_BULK_PIN(LCD_HSYNC),
 148         JZ_GPIO_BULK_PIN(LCD_VSYNC),
 149         JZ_GPIO_BULK_PIN(LCD_DATA0),
 150         JZ_GPIO_BULK_PIN(LCD_DATA1),
 151         JZ_GPIO_BULK_PIN(LCD_DATA2),
 152         JZ_GPIO_BULK_PIN(LCD_DATA3),
 153         JZ_GPIO_BULK_PIN(LCD_DATA4),
 154         JZ_GPIO_BULK_PIN(LCD_DATA5),
 155         JZ_GPIO_BULK_PIN(LCD_DATA6),
 156         JZ_GPIO_BULK_PIN(LCD_DATA7),
 157 };
 158
 159
 160 int jzfb_setcolreg(unsigned regno, unsigned red, unsigned green, unsigned blue,
 161                         unsigned transp, struct fb_info *fb)
 162 {
 163         ((uint32_t*)fb->pseudo_palette)[regno] = red << 16 | green << 8 | blue;
 164         return 0;
 165 }
 166
 167 static int jzfb_get_controller_bpp(struct jzfb *jzfb)
 168 {
 169         switch(jzfb->pdata->bpp) {
 170         case 18:
 171         case 24:
 172                 return 32;
 173         default:
 174                 return jzfb->pdata->bpp;
 175         }
 176 }
 177
 178 static int jzfb_check_var(struct fb_var_screeninfo *var, struct fb_info *fb)
 179 {
 180         struct jzfb* jzfb = fb->par;
 181         struct fb_videomode *mode = jzfb->pdata->modes;
 182         int i;
 183
 184         if (fb->var.bits_per_pixel != jzfb_get_controller_bpp(jzfb) &&
 185                 fb->var.bits_per_pixel != jzfb->pdata->bpp)
 186                 return -EINVAL;
 187
 188         for (i = 0; i < jzfb->pdata->num_modes; ++i, ++mode) {
 189                 if (mode->xres == fb->var.xres && mode->yres == fb->var.yres)
 190                         break;
 191         }
 192
 193         if (i == jzfb->pdata->num_modes)
 194                 return -EINVAL;
 195
 196         fb_videomode_to_var(&fb->var, fb->mode);
 197
 198         switch (jzfb->pdata->bpp) {
 199         case 8:
 200                 break;
 201         case 15:
 202                 var->red.offset = 10;
 203                 var->red.length = 5;
 204                 var->green.offset = 6;
 205                 var->green.length = 5;
 206                 var->blue.offset = 0;
 207                 var->blue.length = 5;
 208                 break;
 209         case 16:
 210                 var->red.offset = 11;
 211                 var->red.length = 5;
 212                 var->green.offset = 6;
 213                 var->green.length = 6;
 214                 var->blue.offset = 0;
 215                 var->blue.length = 5;
 216                 break;
 217         case 18:
 218                 var->red.offset = 16;
 219                 var->red.length = 6;
 220                 var->green.offset = 8;
 221                 var->green.length = 6;
 222                 var->blue.offset = 0;
 223                 var->blue.length = 6;
 224                 fb->var.bits_per_pixel = 32;
 225                 break;
 226         case 32:
 227         case 24:
 228                 var->transp.offset = 24;
 229                 var->transp.length = 8;
 230                 var->red.offset = 16;
 231                 var->red.length = 8;
 232                 var->green.offset = 8;
 233                 var->green.length = 8;
 234                 var->blue.offset = 0;
 235                 var->blue.length = 8;
 236                 fb->var.bits_per_pixel = 32;
 237                 break;
 238         default:
 239                 break;
 240         }
 241
 242         return 0;
 243 }
 244
 245 static int jzfb_set_par(struct fb_info *info)
 246 {
 247         struct jzfb* jzfb = info->par;
 248         struct fb_var_screeninfo *var = &info->var;
 249         uint16_t hds, vds;
 250         uint16_t hde, vde;
 251         uint16_t ht, vt;
 252         uint32_t ctrl;
 253
 254         hds = var->hsync_len + var->left_margin;
 255         hde = hds + var->xres;
 256         ht = hde + var->right_margin;
 257
 258         vds = var->vsync_len + var->upper_margin;
 259         vde = vds + var->yres;
 260         vt = vde + var->lower_margin;
 261
 262         writel(var->hsync_len, jzfb->base + JZ_REG_LCD_HSYNC);
 263         writel(var->vsync_len, jzfb->base + JZ_REG_LCD_VSYNC);
 264
 265         writel((ht << 16) | vt, jzfb->base + JZ_REG_LCD_VAT);
 266
 267         writel((hds << 16) | hde, jzfb->base + JZ_REG_LCD_DAH);
 268         writel((vds << 16) | vde, jzfb->base + JZ_REG_LCD_DAV);
 269
 270         ctrl = JZ_LCD_CTRL_OFUP | JZ_LCD_CTRL_BURST_16;
 271         ctrl |= JZ_LCD_CTRL_ENABLE;
 272
 273         switch (jzfb->pdata->bpp) {
 274         case 1:
 275                 ctrl |= JZ_LCD_CTRL_BPP_1;
 276                 break;
 277         case 2:
 278                 ctrl |= JZ_LCD_CTRL_BPP_2;
 279                 break;
 280         case 4:
 281                 ctrl |= JZ_LCD_CTRL_BPP_4;
 282                 break;
 283         case 8:
 284                 ctrl |= JZ_LCD_CTRL_BPP_8;
 285         break;
 286         case 15:
 287                 ctrl |= JZ_LCD_CTRL_RGB555; /* Falltrough */
 288         case 16:
 289                 ctrl |= JZ_LCD_CTRL_BPP_15_16;
 290                 break;
 291         case 18:
 292         case 24:
 293         case 32:
 294                 ctrl |= JZ_LCD_CTRL_BPP_18_24;
 295                 break;
 296         default:
 297                 break;
 298         }
 299         writel(ctrl, jzfb->base + JZ_REG_LCD_CTRL);
 300
 301         return 0;
 302 }
 303
 304 static int jzfb_blank(int blank_mode, struct fb_info *info)
 305 {
 306         struct jzfb* jzfb = info->par;
 307         uint32_t ctrl;
 308
 309         switch (blank_mode) {
 310         case FB_BLANK_UNBLANK:
 311                 if (jzfb->is_enabled)
 312                         return 0;
 313
 314                 jz_gpio_bulk_resume(jz_lcd_pins, ARRAY_SIZE(jz_lcd_pins));
 315                 clk_enable(jzfb->lpclk);
 316
 317                 writel(0, jzfb->base + JZ_REG_LCD_STATE);
 318
 319                 writel(jzfb->framedesc->next, jzfb->base + JZ_REG_LCD_DA0);
 320
 321                 ctrl = readl(jzfb->base + JZ_REG_LCD_CTRL);
 322                 ctrl |= JZ_LCD_CTRL_ENABLE;
 323                 ctrl &= ~JZ_LCD_CTRL_DISABLE;
 324                 writel(ctrl, jzfb->base + JZ_REG_LCD_CTRL);
 325
 326                 jzfb->is_enabled = 1;
 327                 break;
 328         default:
 329                 if (!jzfb->is_enabled)
 330                         return 0;
 331
 332                 ctrl = readl(jzfb->base + JZ_REG_LCD_CTRL);
 333                 ctrl |= JZ_LCD_CTRL_DISABLE;
 334                 writel(ctrl, jzfb->base + JZ_REG_LCD_CTRL);
 335                 do {
 336                         ctrl = readl(jzfb->base + JZ_REG_LCD_STATE);
 337                 } while (!(ctrl & JZ_LCD_STATE_DISABLED));
 338
 339                 clk_disable(jzfb->lpclk);
 340                 jz_gpio_bulk_suspend(jz_lcd_pins, ARRAY_SIZE(jz_lcd_pins));
 341                 jzfb->is_enabled = 0;
 342                 break;
 343         }
 344
 345         return 0;
 346 }
 347
 348
 349 static int jzfb_alloc_vidmem(struct jzfb *jzfb)
 350 {
 351         size_t devmem_size;
 352         int max_videosize = 0;
 353         struct fb_videomode *mode = jzfb->pdata->modes;
 354         struct jzfb_framedesc *framedesc;
 355         void *page;
 356         int i;
 357
 358         for (i = 0; i < jzfb->pdata->num_modes; ++mode, ++i) {
 359                 if (max_videosize < mode->xres * mode->yres)
 360                         max_videosize = mode->xres * mode->yres;
 361         }
 362
 363         max_videosize *= jzfb_get_controller_bpp(jzfb) >> 3;
 364
 365         devmem_size = max_videosize + sizeof(struct jzfb_framedesc);
 366
 367         jzfb->devmem_size = devmem_size;
 368         jzfb->devmem = dma_alloc_coherent(&jzfb->pdev->dev,
 369                                                 PAGE_ALIGN(devmem_size),
 370                                                 &jzfb->devmem_phys, GFP_KERNEL);
 371
 372         if (!jzfb->devmem) {
 373                 return -ENOMEM;
 374         }
 375
 376         for (page = jzfb->vidmem;
 377                  page < jzfb->vidmem + PAGE_ALIGN(jzfb->vidmem_size);
 378                  page += PAGE_SIZE) {
 379                 SetPageReserved(virt_to_page(page));
 380         }
 381
 382
 383         framedesc = jzfb->devmem  + max_videosize;
 384         jzfb->vidmem = jzfb->devmem;
 385         jzfb->vidmem_phys = jzfb->devmem_phys;
 386
 387         framedesc->next = jzfb->devmem_phys + max_videosize;
 388         framedesc->addr = jzfb->devmem_phys;
 389         framedesc->id = 0;
 390         framedesc->cmd = 0;
 391         framedesc->cmd |= max_videosize / 4;
 392
 393         jzfb->framedesc = framedesc;
 394
 395
 396         return 0;
 397 }
 398
 399 static void jzfb_free_devmem(struct jzfb *jzfb)
 400 {
 401         dma_free_coherent(&jzfb->pdev->dev, jzfb->devmem_size, jzfb->devmem,
 402                           jzfb->devmem_phys);
 403 }
 404
 405 static struct  fb_ops jzfb_ops = {
 406         .owner = THIS_MODULE,
 407         .fb_check_var = jzfb_check_var,
 408         .fb_set_par = jzfb_set_par,
 409         .fb_blank = jzfb_blank,
 410         .fb_fillrect    = sys_fillrect,
 411         .fb_copyarea    = sys_copyarea,
 412         .fb_imageblit   = sys_imageblit,
 413         .fb_setcolreg = jzfb_setcolreg,
 414 };
 415
 416 static int __devinit jzfb_probe(struct platform_device *pdev)
 417 {
 418         int ret;
 419         struct jzfb *jzfb;
 420         struct fb_info *fb;
 421         struct jz4740_fb_platform_data *pdata = pdev->dev.platform_data;
 422         struct resource *mem;
 423
 424         if (!pdata) {
 425                 dev_err(&pdev->dev, "Missing platform data\n");
 426                 return -ENOENT;
 427         }
 428
 429         mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
 430
 431         if (!mem) {
 432                 dev_err(&pdev->dev, "Failed to get register memory resource\n");
 433                 return -ENOENT;
 434         }
 435
 436         mem = request_mem_region(mem->start, resource_size(mem), pdev->name);
 437
 438         if (!mem) {
 439                 dev_err(&pdev->dev, "Failed to request register memory region\n");
 440                 return -EBUSY;
 441         }
 442
 443
 444         fb = framebuffer_alloc(sizeof(struct jzfb), &pdev->dev);
 445
 446         if (!fb) {
 447                 dev_err(&pdev->dev, "Failed to allocate framebuffer device\n");
 448                 ret = -ENOMEM;
 449                 goto err_release_mem_region;
 450         }
 451
 452         fb->fbops = &jzfb_ops;
 453         fb->flags = FBINFO_DEFAULT;
 454
 455         jzfb = fb->par;
 456         jzfb->pdev = pdev;
 457         jzfb->pdata = pdata;
 458         jzfb->mem = mem;
 459
 460         jzfb->ldclk = clk_get(&pdev->dev, "lcd");
 461         jzfb->lpclk = clk_get(&pdev->dev, "lcd_pclk");
 462
 463         jzfb->is_enabled = 1;
 464
 465         if (IS_ERR(jzfb->ldclk)) {
 466                 ret = PTR_ERR(jzfb->ldclk);
 467                 dev_err(&pdev->dev, "Faild to get device clock: %d\n", ret);
 468                 goto err_framebuffer_release;
 469         }
 470
 471         if (IS_ERR(jzfb->lpclk)) {
 472                 ret = PTR_ERR(jzfb->ldclk);
 473                 dev_err(&pdev->dev, "Faild to get pixel clock: %d\n", ret);
 474                 goto err_framebuffer_release;
 475         }
 476
 477
 478         jzfb->base = ioremap(mem->start, resource_size(mem));
 479
 480         if (!jzfb->base) {
 481                 dev_err(&pdev->dev, "Failed to ioremap register memory region\n");
 482                 ret = -EBUSY;
 483                 goto err_framebuffer_release;
 484         }
 485
 486         platform_set_drvdata(pdev, jzfb);
 487
 488         fb_videomode_to_modelist(pdata->modes, pdata->num_modes,
 489                                  &fb->modelist);
 490         fb->mode = pdata->modes;
 491
 492         fb_videomode_to_var(&fb->var, fb->mode);
 493         fb->var.bits_per_pixel = pdata->bpp;
 494         jzfb_check_var(&fb->var, fb);
 495
 496         ret = jzfb_alloc_vidmem(jzfb);
 497         if (ret) {
 498                 dev_err(&pdev->dev, "Failed to allocate video memory\n");
 499                 goto err_iounmap;
 500         }
 501
 502         fb->fix = jzfb_fix;
 503         fb->fix.line_length = fb->var.bits_per_pixel * fb->var.xres / 8;
 504         fb->fix.mmio_start = mem->start;
 505         fb->fix.mmio_len = resource_size(mem);
 506         fb->fix.smem_start = jzfb->vidmem_phys;
 507         fb->fix.smem_len =  fb->fix.line_length * fb->var.yres;
 508         fb->screen_base = jzfb->vidmem;
 509         fb->pseudo_palette = jzfb->pseudo_palette;
 510
 511         fb_alloc_cmap(&fb->cmap, 256, 0);
 512
 513         clk_enable(jzfb->ldclk);
 514
 515         jzfb_set_par(fb);
 516         writel(jzfb->framedesc->next, jzfb->base + JZ_REG_LCD_DA0);
 517
 518         jz_gpio_bulk_request(jz_lcd_pins, ARRAY_SIZE(jz_lcd_pins));
 519
 520         ret = register_framebuffer(fb);
 521         if (ret) {
 522                 dev_err(&pdev->dev, "Failed to register framebuffer: %d\n", ret);
 523                 goto err_free_devmem;
 524         }
 525
 526         return 0;
 527 err_free_devmem:
 528         jzfb_free_devmem(jzfb);
 529 err_iounmap:
 530         iounmap(jzfb->base);
 531 err_framebuffer_release:
 532         framebuffer_release(fb);
 533 err_release_mem_region:
 534         release_mem_region(mem->start, resource_size(mem));
 535         return ret;
 536 }
 537
 538 static int __devexit jzfb_remove(struct platform_device *pdev)
 539 {
 540         struct jzfb *jzfb = platform_get_drvdata(pdev);
 541
 542         jz_gpio_bulk_free(jz_lcd_pins, ARRAY_SIZE(jz_lcd_pins));
 543         iounmap(jzfb->base);
 544         release_mem_region(jzfb->mem->start, resource_size(jzfb->mem));
 545         jzfb_free_devmem(jzfb);
 546         platform_set_drvdata(pdev, NULL);
 547         framebuffer_release(jzfb->fb);
 548         return 0;
 549 }
 550
 551 #ifdef CONFIG_PM
 552
 553 static int jzfb_suspend(struct device *dev)
 554 {
 555         struct jzfb *jzfb = dev_get_drvdata(dev);
 556         clk_disable(jzfb->ldclk);
 557
 558         return 0;
 559 }
 560
 561 static int jzfb_resume(struct device *dev)
 562 {
 563         struct jzfb *jzfb = dev_get_drvdata(dev);
 564         clk_enable(jzfb->ldclk);
 565
 566         return 0;
 567 }
 568
 569 static const struct dev_pm_ops jzfb_pm_ops = {
 570         .suspend        = jzfb_suspend,
 571         .resume         = jzfb_resume,
 572         .poweroff       = jzfb_suspend,
 573         .restore        = jzfb_resume,
 574 };
 575
 576 #define JZFB_PM_OPS (&jzfb_pm_ops)
 577
 578 #else
 579 #define JZFB_PM_OPS NULL
 580 #endif
 581
 582 static struct platform_driver jzfb_driver = {
 583         .probe = jzfb_probe,
 584         .remove = __devexit_p(jzfb_remove),
 585
 586         .driver = {
 587                 .name = "jz4740-fb",
 588                 .pm = JZFB_PM_OPS,
 589         },
 590 };
 591
 592 int __init jzfb_init(void)
 593 {
 594         return platform_driver_register(&jzfb_driver);
 595 }
 596 module_init(jzfb_init);
 597
 598 void __exit jzfb_exit(void)
 599 {
 600         platform_driver_unregister(&jzfb_driver);
 601 }
 602 module_exit(jzfb_exit);
 603
 604 MODULE_LICENSE("GPL");
 605 MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
 606 MODULE_DESCRIPTION("JZ4720/JZ4740 SoC LCD framebuffer driver");
 607 MODULE_ALIAS("platform:jz4740-fb");
 608 MODULE_ALIAS("platform:jz4720-fb");