package/boot/uboot-mediatek/patches/100-12-mtd-mtk-snand-add-NMBM-support-for-SPL.patch

   1 From 9e8ac4fc7125795ac5e8834aaf454fd45b99c580 Mon Sep 17 00:00:00 2001
   2 From: Weijie Gao <weijie.gao@mediatek.com>
   3 Date: Mon, 25 Jul 2022 10:53:03 +0800
   4 Subject: [PATCH 46/71] mtd: mtk-snand: add NMBM support for SPL
   5
   6 Add NMBM support for mtk-snand SPL loader
   7
   8 Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
   9 ---
  10  drivers/mtd/mtk-snand/mtk-snand-spl.c | 127 ++++++++++++++++++++++++++
  11  1 file changed, 127 insertions(+)
  12
  13 --- a/drivers/mtd/mtk-snand/mtk-snand-spl.c
  14 +++ b/drivers/mtd/mtk-snand/mtk-snand-spl.c
  15 @@ -13,12 +13,134 @@
  16  #include <mtd.h>
  17  #include <watchdog.h>
  18
  19 +#include <nmbm/nmbm.h>
  20 +
  21  #include "mtk-snand.h"
  22
  23  static struct mtk_snand *snf;
  24  static struct mtk_snand_chip_info cinfo;
  25  static u32 oobavail;
  26
  27 +#ifdef CONFIG_ENABLE_NAND_NMBM
  28 +static struct nmbm_instance *ni;
  29 +
  30 +static int nmbm_lower_read_page(void *arg, uint64_t addr, void *buf, void *oob,
  31 +                               enum nmbm_oob_mode mode)
  32 +{
  33 +       int ret;
  34 +       bool raw = mode == NMBM_MODE_RAW ? true : false;
  35 +
  36 +       if (mode == NMBM_MODE_AUTO_OOB) {
  37 +               ret = mtk_snand_read_page_auto_oob(snf, addr, buf, oob,
  38 +                       oobavail, NULL, false);
  39 +       } else {
  40 +               ret = mtk_snand_read_page(snf, addr, buf, oob, raw);
  41 +       }
  42 +
  43 +       if (ret == -EBADMSG)
  44 +               return 1;
  45 +       else if (ret >= 0)
  46 +               return 0;
  47 +
  48 +       return ret;
  49 +}
  50 +
  51 +static int nmbm_lower_write_page(void *arg, uint64_t addr, const void *buf,
  52 +                                const void *oob, enum nmbm_oob_mode mode)
  53 +{
  54 +       bool raw = mode == NMBM_MODE_RAW ? true : false;
  55 +
  56 +       if (mode == NMBM_MODE_AUTO_OOB) {
  57 +               return mtk_snand_write_page_auto_oob(snf, addr, buf, oob,
  58 +                       oobavail, NULL, false);
  59 +       }
  60 +
  61 +       return mtk_snand_write_page(snf, addr, buf, oob, raw);
  62 +}
  63 +
  64 +static int nmbm_lower_erase_block(void *arg, uint64_t addr)
  65 +{
  66 +       return mtk_snand_erase_block(snf, addr);
  67 +}
  68 +
  69 +static int nmbm_lower_is_bad_block(void *arg, uint64_t addr)
  70 +{
  71 +       return mtk_snand_block_isbad(snf, addr);
  72 +}
  73 +
  74 +static int nmbm_lower_mark_bad_block(void *arg, uint64_t addr)
  75 +{
  76 +       return mtk_snand_block_markbad(snf, addr);
  77 +}
  78 +
  79 +static void nmbm_lower_log(void *arg, enum nmbm_log_category level,
  80 +                          const char *fmt, va_list ap)
  81 +{
  82 +       vprintf(fmt, ap);
  83 +}
  84 +
  85 +static int nmbm_init(void)
  86 +{
  87 +       struct nmbm_lower_device nld;
  88 +       size_t ni_size;
  89 +       int ret;
  90 +
  91 +       memset(&nld, 0, sizeof(nld));
  92 +
  93 +       nld.flags = NMBM_F_CREATE;
  94 +       nld.max_ratio = CONFIG_NMBM_MAX_RATIO;
  95 +       nld.max_reserved_blocks = CONFIG_NMBM_MAX_BLOCKS;
  96 +
  97 +       nld.size = cinfo.chipsize;
  98 +       nld.erasesize = cinfo.blocksize;
  99 +       nld.writesize = cinfo.pagesize;
 100 +       nld.oobsize = cinfo.sparesize;
 101 +       nld.oobavail = oobavail;
 102 +
 103 +       nld.read_page = nmbm_lower_read_page;
 104 +       nld.write_page = nmbm_lower_write_page;
 105 +       nld.erase_block = nmbm_lower_erase_block;
 106 +       nld.is_bad_block = nmbm_lower_is_bad_block;
 107 +       nld.mark_bad_block = nmbm_lower_mark_bad_block;
 108 +
 109 +       nld.logprint = nmbm_lower_log;
 110 +
 111 +       ni_size = nmbm_calc_structure_size(&nld);
 112 +       ni = malloc(ni_size);
 113 +       if (!ni) {
 114 +               printf("Failed to allocate memory (0x%u) for NMBM instance\n",
 115 +                      ni_size);
 116 +               return -ENOMEM;
 117 +       }
 118 +
 119 +       memset(ni, 0, ni_size);
 120 +
 121 +       printf("Initializing NMBM ...\n");
 122 +
 123 +       ret = nmbm_attach(&nld, ni);
 124 +       if (ret) {
 125 +               ni = NULL;
 126 +               return ret;
 127 +       }
 128 +
 129 +       return 0;
 130 +}
 131 +
 132 +int nand_spl_load_image(uint32_t offs, unsigned int size, void *dst)
 133 +{
 134 +       size_t retlen;
 135 +
 136 +       if (!ni)
 137 +               return -ENODEV;
 138 +
 139 +       nmbm_read_range(ni, offs, size, dst, NMBM_MODE_PLACE_OOB, &retlen);
 140 +       if (retlen != size)
 141 +               return -EIO;
 142 +
 143 +       return 0;
 144 +}
 145 +
 146 +#else
 147  static u8 *page_cache;
 148
 149  int nand_spl_load_image(uint32_t offs, unsigned int size, void *dst)
 150 @@ -60,6 +182,7 @@ int nand_spl_load_image(uint32_t offs, u
 151
 152         return ret;
 153  }
 154 +#endif
 155
 156  void nand_init(void)
 157  {
 158 @@ -105,11 +228,15 @@ void nand_init(void)
 159         printf("SPI-NAND: %s (%uMB)\n", cinfo.model,
 160                (u32)(cinfo.chipsize >> 20));
 161
 162 +#ifdef CONFIG_ENABLE_NAND_NMBM
 163 +       nmbm_init();
 164 +#else
 165         page_cache = malloc(cinfo.pagesize + cinfo.sparesize);
 166         if (!page_cache) {
 167                 mtk_snand_cleanup(snf);
 168                 printf("mtk-snand-spl: failed to allocate page cache\n");
 169         }
 170 +#endif
 171  }
 172
 173  void nand_deselect(void)