package/boot/uboot-zynq/patches/025-v2018.09-arm-zynq-add-support-for-the-zybo-z7-board.patch

   1 From 58f449676ac29938ea2970e240a2defe99240a8e Mon Sep 17 00:00:00 2001
   2 From: Luis Araneda <luaraneda@gmail.com>
   3 Date: Tue, 24 Jul 2018 11:31:19 -0400
   4 Subject: [PATCH] arm: zynq: add support for the zybo z7 board
   5
   6 The board is manufactured by Digilent
   7 Main features:
   8 - Soc: XC7Z010 (Z7-10) or XC7Z020 (Z7-20)
   9 - RAM: 1 GB DDR3L
  10 - FLASH: 16 MB QSPI
  11 - 1 Gbps Ethernet
  12 - USB 2.0
  13 - microSD slot
  14 - Pcam camera connector
  15 - HDMI Tx and Rx
  16 - Audio codec: stereo out, stereo in, mic
  17 - 5 (Z7-10) or 6 (Z7-20) Pmod ports
  18 - 6 push-buttons, 4 switches, 5 LEDs
  19 - 1 (Z7-10) or 2 (Z7-20) RGB LEDs
  20
  21 Signed-off-by: Luis Araneda <luaraneda@gmail.com>
  22 Signed-off-by: Michal Simek <michal.simek@xilinx.com>
  23 ---
  24  arch/arm/dts/Makefile                         |   3 +-
  25  arch/arm/dts/zynq-zybo-z7.dts                 |  81 +++++
  26  board/xilinx/zynq/zynq-zybo-z7/ps7_init_gpl.c | 297 ++++++++++++++++++
  27  configs/zynq_zybo_z7_defconfig                |  68 ++++
  28  4 files changed, 448 insertions(+), 1 deletion(-)
  29  create mode 100644 arch/arm/dts/zynq-zybo-z7.dts
  30  create mode 100644 board/xilinx/zynq/zynq-zybo-z7/ps7_init_gpl.c
  31  create mode 100644 configs/zynq_zybo_z7_defconfig
  32
  33 --- a/arch/arm/dts/Makefile
  34 +++ b/arch/arm/dts/Makefile
  35 @@ -145,7 +145,8 @@ dtb-$(CONFIG_ARCH_ZYNQ) += \
  36         zynq-zc770-xm013.dtb \
  37         zynq-zed.dtb \
  38         zynq-zturn.dtb \
  39 -       zynq-zybo.dtb
  40 +       zynq-zybo.dtb \
  41 +       zynq-zybo-z7.dtb
  42  dtb-$(CONFIG_ARCH_ZYNQMP) += \
  43         zynqmp-mini-emmc0.dtb                   \
  44         zynqmp-mini-emmc1.dtb                   \
  45 --- /dev/null
  46 +++ b/arch/arm/dts/zynq-zybo-z7.dts
  47 @@ -0,0 +1,81 @@
  48 +// SPDX-License-Identifier: GPL-2.0+
  49 +/*
  50 + *  Copyright (C) 2011 - 2015 Xilinx
  51 + *  Copyright (C) 2012 National Instruments Corp.
  52 + */
  53 +/dts-v1/;
  54 +#include "zynq-7000.dtsi"
  55 +#include <dt-bindings/gpio/gpio.h>
  56 +
  57 +/ {
  58 +       model = "Digilent Zybo Z7 board";
  59 +       compatible = "digilent,zynq-zybo-z7", "xlnx,zynq-7000";
  60 +
  61 +       aliases {
  62 +               ethernet0 = &gem0;
  63 +               serial0 = &uart1;
  64 +               spi0 = &qspi;
  65 +               mmc0 = &sdhci0;
  66 +       };
  67 +
  68 +       memory@0 {
  69 +               device_type = "memory";
  70 +               reg = <0x0 0x40000000>;
  71 +       };
  72 +
  73 +       chosen {
  74 +               bootargs = "";
  75 +               stdout-path = "serial0:115200n8";
  76 +       };
  77 +
  78 +       gpio-leds {
  79 +               compatible = "gpio-leds";
  80 +
  81 +               ld4 {
  82 +                       label = "zynq-zybo-z7:green:ld4";
  83 +                       gpios = <&gpio0 7 GPIO_ACTIVE_HIGH>;
  84 +               };
  85 +       };
  86 +
  87 +       usb_phy0: phy0 {
  88 +               #phy-cells = <0>;
  89 +               compatible = "usb-nop-xceiv";
  90 +               reset-gpios = <&gpio0 46 GPIO_ACTIVE_LOW>;
  91 +       };
  92 +};
  93 +
  94 +&clkc {
  95 +       ps-clk-frequency = <33333333>;
  96 +};
  97 +
  98 +&gem0 {
  99 +       status = "okay";
 100 +       phy-mode = "rgmii-id";
 101 +       phy-handle = <&ethernet_phy>;
 102 +
 103 +       ethernet_phy: ethernet-phy@0 {
 104 +               reg = <0>;
 105 +               device_type = "ethernet-phy";
 106 +       };
 107 +};
 108 +
 109 +&qspi {
 110 +       u-boot,dm-pre-reloc;
 111 +       status = "okay";
 112 +};
 113 +
 114 +&sdhci0 {
 115 +       u-boot,dm-pre-reloc;
 116 +       status = "okay";
 117 +};
 118 +
 119 +&uart1 {
 120 +       u-boot,dm-pre-reloc;
 121 +       status = "okay";
 122 +};
 123 +
 124 +&usb0 {
 125 +       status = "okay";
 126 +       dr_mode = "host";
 127 +       usb-phy = <&usb_phy0>;
 128 +};
 129 --- /dev/null
 130 +++ b/board/xilinx/zynq/zynq-zybo-z7/ps7_init_gpl.c
 131 @@ -0,0 +1,297 @@
 132 +// SPDX-License-Identifier: GPL-2.0+
 133 +/*
 134 + * (c) Copyright 2010-2014 Xilinx, Inc. All rights reserved.
 135 + *
 136 + * Procedure to generate this file (using Vivado Webpack 2018.2):
 137 + * + Install board files from digilent/vivado-boards repository
 138 + *   (commit 6a45981 from 2018-06-05)
 139 + * + Start Vivado and create a new RTL project with the Zybo-z7-20 board
 140 + * + Create a block design
 141 + *   - Add "ZYNQ7 Processing System" IP
 142 + *   - Run "Block Automation" (Check "Apply Board Preset")
 143 + *   - Connect ports FCLK_CLK0 and M_AXI_GP0_ACLK
 144 + *   - Save diagram changes
 145 + *   - Go to sources view, select the block diagram,
 146 + *     and select "Generate Output Products"
 147 + * + Copy the generated "ps7_init_gpl.c" file
 148 + * + Perform manual editions based on existing Zynq boards
 149 + *   and the checkpatch.pl script
 150 + *
 151 + */
 152 +
 153 +#include <asm/arch/ps7_init_gpl.h>
 154 +
 155 +static unsigned long ps7_pll_init_data_3_0[] = {
 156 +       EMIT_WRITE(0xF8000008, 0x0000DF0DU),
 157 +       EMIT_MASKWRITE(0xF8000110, 0x003FFFF0U, 0x000FA220U),
 158 +       EMIT_MASKWRITE(0xF8000100, 0x0007F000U, 0x00028000U),
 159 +       EMIT_MASKWRITE(0xF8000100, 0x00000010U, 0x00000010U),
 160 +       EMIT_MASKWRITE(0xF8000100, 0x00000001U, 0x00000001U),
 161 +       EMIT_MASKWRITE(0xF8000100, 0x00000001U, 0x00000000U),
 162 +       EMIT_MASKPOLL(0xF800010C, 0x00000001U),
 163 +       EMIT_MASKWRITE(0xF8000100, 0x00000010U, 0x00000000U),
 164 +       EMIT_MASKWRITE(0xF8000120, 0x1F003F30U, 0x1F000200U),
 165 +       EMIT_MASKWRITE(0xF8000114, 0x003FFFF0U, 0x0012C220U),
 166 +       EMIT_MASKWRITE(0xF8000104, 0x0007F000U, 0x00020000U),
 167 +       EMIT_MASKWRITE(0xF8000104, 0x00000010U, 0x00000010U),
 168 +       EMIT_MASKWRITE(0xF8000104, 0x00000001U, 0x00000001U),
 169 +       EMIT_MASKWRITE(0xF8000104, 0x00000001U, 0x00000000U),
 170 +       EMIT_MASKPOLL(0xF800010C, 0x00000002U),
 171 +       EMIT_MASKWRITE(0xF8000104, 0x00000010U, 0x00000000U),
 172 +       EMIT_MASKWRITE(0xF8000124, 0xFFF00003U, 0x0C200003U),
 173 +       EMIT_MASKWRITE(0xF8000118, 0x003FFFF0U, 0x001452C0U),
 174 +       EMIT_MASKWRITE(0xF8000108, 0x0007F000U, 0x0001E000U),
 175 +       EMIT_MASKWRITE(0xF8000108, 0x00000010U, 0x00000010U),
 176 +       EMIT_MASKWRITE(0xF8000108, 0x00000001U, 0x00000001U),
 177 +       EMIT_MASKWRITE(0xF8000108, 0x00000001U, 0x00000000U),
 178 +       EMIT_MASKPOLL(0xF800010C, 0x00000004U),
 179 +       EMIT_MASKWRITE(0xF8000108, 0x00000010U, 0x00000000U),
 180 +       EMIT_WRITE(0xF8000004, 0x0000767BU),
 181 +       EMIT_EXIT(),
 182 +};
 183 +
 184 +static unsigned long ps7_clock_init_data_3_0[] = {
 185 +       EMIT_WRITE(0xF8000008, 0x0000DF0DU),
 186 +       EMIT_MASKWRITE(0xF8000128, 0x03F03F01U, 0x00700F01U),
 187 +       EMIT_MASKWRITE(0xF8000138, 0x00000011U, 0x00000001U),
 188 +       EMIT_MASKWRITE(0xF8000140, 0x03F03F71U, 0x00100801U),
 189 +       EMIT_MASKWRITE(0xF800014C, 0x00003F31U, 0x00000501U),
 190 +       EMIT_MASKWRITE(0xF8000150, 0x00003F33U, 0x00001401U),
 191 +       EMIT_MASKWRITE(0xF8000154, 0x00003F33U, 0x00000A02U),
 192 +       EMIT_MASKWRITE(0xF8000168, 0x00003F31U, 0x00000501U),
 193 +       EMIT_MASKWRITE(0xF8000170, 0x03F03F30U, 0x00400500U),
 194 +       EMIT_MASKWRITE(0xF80001C4, 0x00000001U, 0x00000001U),
 195 +       EMIT_MASKWRITE(0xF800012C, 0x01FFCCCDU, 0x01EC044DU),
 196 +       EMIT_WRITE(0xF8000004, 0x0000767BU),
 197 +       EMIT_EXIT(),
 198 +};
 199 +
 200 +static unsigned long ps7_ddr_init_data_3_0[] = {
 201 +       EMIT_MASKWRITE(0xF8006000, 0x0001FFFFU, 0x00000080U),
 202 +       EMIT_MASKWRITE(0xF8006004, 0x0007FFFFU, 0x00001081U),
 203 +       EMIT_MASKWRITE(0xF8006008, 0x03FFFFFFU, 0x03C0780FU),
 204 +       EMIT_MASKWRITE(0xF800600C, 0x03FFFFFFU, 0x02001001U),
 205 +       EMIT_MASKWRITE(0xF8006010, 0x03FFFFFFU, 0x00014001U),
 206 +       EMIT_MASKWRITE(0xF8006014, 0x001FFFFFU, 0x0004281AU),
 207 +       EMIT_MASKWRITE(0xF8006018, 0xF7FFFFFFU, 0x44E458D2U),
 208 +       EMIT_MASKWRITE(0xF800601C, 0xFFFFFFFFU, 0x720238E5U),
 209 +       EMIT_MASKWRITE(0xF8006020, 0x7FDFFFFCU, 0x270872D0U),
 210 +       EMIT_MASKWRITE(0xF8006024, 0x0FFFFFC3U, 0x00000000U),
 211 +       EMIT_MASKWRITE(0xF8006028, 0x00003FFFU, 0x00002007U),
 212 +       EMIT_MASKWRITE(0xF800602C, 0xFFFFFFFFU, 0x00000008U),
 213 +       EMIT_MASKWRITE(0xF8006030, 0xFFFFFFFFU, 0x00040930U),
 214 +       EMIT_MASKWRITE(0xF8006034, 0x13FF3FFFU, 0x000116D4U),
 215 +       EMIT_MASKWRITE(0xF8006038, 0x00000003U, 0x00000000U),
 216 +       EMIT_MASKWRITE(0xF800603C, 0x000FFFFFU, 0x00000777U),
 217 +       EMIT_MASKWRITE(0xF8006040, 0xFFFFFFFFU, 0xFFF00000U),
 218 +       EMIT_MASKWRITE(0xF8006044, 0x0FFFFFFFU, 0x0F666666U),
 219 +       EMIT_MASKWRITE(0xF8006048, 0x0003F03FU, 0x0003C008U),
 220 +       EMIT_MASKWRITE(0xF8006050, 0xFF0F8FFFU, 0x77010800U),
 221 +       EMIT_MASKWRITE(0xF8006058, 0x00010000U, 0x00000000U),
 222 +       EMIT_MASKWRITE(0xF800605C, 0x0000FFFFU, 0x00005003U),
 223 +       EMIT_MASKWRITE(0xF8006060, 0x000017FFU, 0x0000003EU),
 224 +       EMIT_MASKWRITE(0xF8006064, 0x00021FE0U, 0x00020000U),
 225 +       EMIT_MASKWRITE(0xF8006068, 0x03FFFFFFU, 0x00284141U),
 226 +       EMIT_MASKWRITE(0xF800606C, 0x0000FFFFU, 0x00001610U),
 227 +       EMIT_MASKWRITE(0xF8006078, 0x03FFFFFFU, 0x00466111U),
 228 +       EMIT_MASKWRITE(0xF800607C, 0x000FFFFFU, 0x00032222U),
 229 +       EMIT_MASKWRITE(0xF80060A4, 0xFFFFFFFFU, 0x10200802U),
 230 +       EMIT_MASKWRITE(0xF80060A8, 0x0FFFFFFFU, 0x0690CB73U),
 231 +       EMIT_MASKWRITE(0xF80060AC, 0x000001FFU, 0x000001FEU),
 232 +       EMIT_MASKWRITE(0xF80060B0, 0x1FFFFFFFU, 0x1CFFFFFFU),
 233 +       EMIT_MASKWRITE(0xF80060B4, 0x00000200U, 0x00000200U),
 234 +       EMIT_MASKWRITE(0xF80060B8, 0x01FFFFFFU, 0x00200066U),
 235 +       EMIT_MASKWRITE(0xF80060C4, 0x00000003U, 0x00000000U),
 236 +       EMIT_MASKWRITE(0xF80060C8, 0x000000FFU, 0x00000000U),
 237 +       EMIT_MASKWRITE(0xF80060DC, 0x00000001U, 0x00000000U),
 238 +       EMIT_MASKWRITE(0xF80060F0, 0x0000FFFFU, 0x00000000U),
 239 +       EMIT_MASKWRITE(0xF80060F4, 0x0000000FU, 0x00000008U),
 240 +       EMIT_MASKWRITE(0xF8006114, 0x000000FFU, 0x00000000U),
 241 +       EMIT_MASKWRITE(0xF8006118, 0x7FFFFFCFU, 0x40000001U),
 242 +       EMIT_MASKWRITE(0xF800611C, 0x7FFFFFCFU, 0x40000001U),
 243 +       EMIT_MASKWRITE(0xF8006120, 0x7FFFFFCFU, 0x40000001U),
 244 +       EMIT_MASKWRITE(0xF8006124, 0x7FFFFFCFU, 0x40000001U),
 245 +       EMIT_MASKWRITE(0xF800612C, 0x000FFFFFU, 0x00027000U),
 246 +       EMIT_MASKWRITE(0xF8006130, 0x000FFFFFU, 0x00027000U),
 247 +       EMIT_MASKWRITE(0xF8006134, 0x000FFFFFU, 0x00026C00U),
 248 +       EMIT_MASKWRITE(0xF8006138, 0x000FFFFFU, 0x00028800U),
 249 +       EMIT_MASKWRITE(0xF8006140, 0x000FFFFFU, 0x00000035U),
 250 +       EMIT_MASKWRITE(0xF8006144, 0x000FFFFFU, 0x00000035U),
 251 +       EMIT_MASKWRITE(0xF8006148, 0x000FFFFFU, 0x00000035U),
 252 +       EMIT_MASKWRITE(0xF800614C, 0x000FFFFFU, 0x00000035U),
 253 +       EMIT_MASKWRITE(0xF8006154, 0x000FFFFFU, 0x0000007AU),
 254 +       EMIT_MASKWRITE(0xF8006158, 0x000FFFFFU, 0x0000007AU),
 255 +       EMIT_MASKWRITE(0xF800615C, 0x000FFFFFU, 0x0000007CU),
 256 +       EMIT_MASKWRITE(0xF8006160, 0x000FFFFFU, 0x00000073U),
 257 +       EMIT_MASKWRITE(0xF8006168, 0x001FFFFFU, 0x000000F1U),
 258 +       EMIT_MASKWRITE(0xF800616C, 0x001FFFFFU, 0x000000F1U),
 259 +       EMIT_MASKWRITE(0xF8006170, 0x001FFFFFU, 0x000000F0U),
 260 +       EMIT_MASKWRITE(0xF8006174, 0x001FFFFFU, 0x000000F7U),
 261 +       EMIT_MASKWRITE(0xF800617C, 0x000FFFFFU, 0x000000BAU),
 262 +       EMIT_MASKWRITE(0xF8006180, 0x000FFFFFU, 0x000000BAU),
 263 +       EMIT_MASKWRITE(0xF8006184, 0x000FFFFFU, 0x000000BCU),
 264 +       EMIT_MASKWRITE(0xF8006188, 0x000FFFFFU, 0x000000B3U),
 265 +       EMIT_MASKWRITE(0xF8006190, 0x6FFFFEFEU, 0x00040080U),
 266 +       EMIT_MASKWRITE(0xF8006194, 0x000FFFFFU, 0x0001FC82U),
 267 +       EMIT_MASKWRITE(0xF8006204, 0xFFFFFFFFU, 0x00000000U),
 268 +       EMIT_MASKWRITE(0xF8006208, 0x000703FFU, 0x000003FFU),
 269 +       EMIT_MASKWRITE(0xF800620C, 0x000703FFU, 0x000003FFU),
 270 +       EMIT_MASKWRITE(0xF8006210, 0x000703FFU, 0x000003FFU),
 271 +       EMIT_MASKWRITE(0xF8006214, 0x000703FFU, 0x000003FFU),
 272 +       EMIT_MASKWRITE(0xF8006218, 0x000F03FFU, 0x000003FFU),
 273 +       EMIT_MASKWRITE(0xF800621C, 0x000F03FFU, 0x000003FFU),
 274 +       EMIT_MASKWRITE(0xF8006220, 0x000F03FFU, 0x000003FFU),
 275 +       EMIT_MASKWRITE(0xF8006224, 0x000F03FFU, 0x000003FFU),
 276 +       EMIT_MASKWRITE(0xF80062A8, 0x00000FF5U, 0x00000000U),
 277 +       EMIT_MASKWRITE(0xF80062AC, 0xFFFFFFFFU, 0x00000000U),
 278 +       EMIT_MASKWRITE(0xF80062B0, 0x003FFFFFU, 0x00005125U),
 279 +       EMIT_MASKWRITE(0xF80062B4, 0x0003FFFFU, 0x000012A8U),
 280 +       EMIT_MASKPOLL(0xF8000B74, 0x00002000U),
 281 +       EMIT_MASKWRITE(0xF8006000, 0x0001FFFFU, 0x00000081U),
 282 +       EMIT_MASKPOLL(0xF8006054, 0x00000007U),
 283 +       EMIT_EXIT(),
 284 +};
 285 +
 286 +static unsigned long ps7_mio_init_data_3_0[] = {
 287 +       EMIT_WRITE(0xF8000008, 0x0000DF0DU),
 288 +       EMIT_MASKWRITE(0xF8000B40, 0x00000FFFU, 0x00000600U),
 289 +       EMIT_MASKWRITE(0xF8000B44, 0x00000FFFU, 0x00000600U),
 290 +       EMIT_MASKWRITE(0xF8000B48, 0x00000FFFU, 0x00000672U),
 291 +       EMIT_MASKWRITE(0xF8000B4C, 0x00000FFFU, 0x00000672U),
 292 +       EMIT_MASKWRITE(0xF8000B50, 0x00000FFFU, 0x00000674U),
 293 +       EMIT_MASKWRITE(0xF8000B54, 0x00000FFFU, 0x00000674U),
 294 +       EMIT_MASKWRITE(0xF8000B58, 0x00000FFFU, 0x00000600U),
 295 +       EMIT_MASKWRITE(0xF8000B5C, 0xFFFFFFFFU, 0x0018C068U),
 296 +       EMIT_MASKWRITE(0xF8000B60, 0xFFFFFFFFU, 0x00F98068U),
 297 +       EMIT_MASKWRITE(0xF8000B64, 0xFFFFFFFFU, 0x00F98068U),
 298 +       EMIT_MASKWRITE(0xF8000B68, 0xFFFFFFFFU, 0x00F98068U),
 299 +       EMIT_MASKWRITE(0xF8000B6C, 0x00007FFFU, 0x00000260U),
 300 +       EMIT_MASKWRITE(0xF8000B70, 0x00000001U, 0x00000001U),
 301 +       EMIT_MASKWRITE(0xF8000B70, 0x00000021U, 0x00000020U),
 302 +       EMIT_MASKWRITE(0xF8000B70, 0x07FEFFFFU, 0x00000823U),
 303 +       EMIT_MASKWRITE(0xF8000700, 0x00003FFFU, 0x00001600U),
 304 +       EMIT_MASKWRITE(0xF8000704, 0x00003FFFU, 0x00001602U),
 305 +       EMIT_MASKWRITE(0xF8000708, 0x00003FFFU, 0x00000602U),
 306 +       EMIT_MASKWRITE(0xF800070C, 0x00003FFFU, 0x00000602U),
 307 +       EMIT_MASKWRITE(0xF8000710, 0x00003FFFU, 0x00000602U),
 308 +       EMIT_MASKWRITE(0xF8000714, 0x00003FFFU, 0x00000602U),
 309 +       EMIT_MASKWRITE(0xF8000718, 0x00003FFFU, 0x00000602U),
 310 +       EMIT_MASKWRITE(0xF800071C, 0x00003FFFU, 0x00000600U),
 311 +       EMIT_MASKWRITE(0xF8000720, 0x00003FFFU, 0x00000602U),
 312 +       EMIT_MASKWRITE(0xF8000724, 0x00003FFFU, 0x00001600U),
 313 +       EMIT_MASKWRITE(0xF8000728, 0x00003FFFU, 0x00001600U),
 314 +       EMIT_MASKWRITE(0xF800072C, 0x00003FFFU, 0x00001600U),
 315 +       EMIT_MASKWRITE(0xF8000730, 0x00003FFFU, 0x00001600U),
 316 +       EMIT_MASKWRITE(0xF8000734, 0x00003FFFU, 0x00001600U),
 317 +       EMIT_MASKWRITE(0xF8000738, 0x00003FFFU, 0x00001600U),
 318 +       EMIT_MASKWRITE(0xF800073C, 0x00003FFFU, 0x00001600U),
 319 +       EMIT_MASKWRITE(0xF8000740, 0x00003FFFU, 0x00001302U),
 320 +       EMIT_MASKWRITE(0xF8000744, 0x00003FFFU, 0x00001302U),
 321 +       EMIT_MASKWRITE(0xF8000748, 0x00003FFFU, 0x00001302U),
 322 +       EMIT_MASKWRITE(0xF800074C, 0x00003FFFU, 0x00001302U),
 323 +       EMIT_MASKWRITE(0xF8000750, 0x00003FFFU, 0x00001302U),
 324 +       EMIT_MASKWRITE(0xF8000754, 0x00003FFFU, 0x00001302U),
 325 +       EMIT_MASKWRITE(0xF8000758, 0x00003FFFU, 0x00001303U),
 326 +       EMIT_MASKWRITE(0xF800075C, 0x00003FFFU, 0x00001303U),
 327 +       EMIT_MASKWRITE(0xF8000760, 0x00003FFFU, 0x00001303U),
 328 +       EMIT_MASKWRITE(0xF8000764, 0x00003FFFU, 0x00001303U),
 329 +       EMIT_MASKWRITE(0xF8000768, 0x00003FFFU, 0x00001303U),
 330 +       EMIT_MASKWRITE(0xF800076C, 0x00003FFFU, 0x00001303U),
 331 +       EMIT_MASKWRITE(0xF8000770, 0x00003FFFU, 0x00001304U),
 332 +       EMIT_MASKWRITE(0xF8000774, 0x00003FFFU, 0x00001305U),
 333 +       EMIT_MASKWRITE(0xF8000778, 0x00003FFFU, 0x00001304U),
 334 +       EMIT_MASKWRITE(0xF800077C, 0x00003FFFU, 0x00001305U),
 335 +       EMIT_MASKWRITE(0xF8000780, 0x00003FFFU, 0x00001304U),
 336 +       EMIT_MASKWRITE(0xF8000784, 0x00003FFFU, 0x00001304U),
 337 +       EMIT_MASKWRITE(0xF8000788, 0x00003FFFU, 0x00001304U),
 338 +       EMIT_MASKWRITE(0xF800078C, 0x00003FFFU, 0x00001304U),
 339 +       EMIT_MASKWRITE(0xF8000790, 0x00003FFFU, 0x00001305U),
 340 +       EMIT_MASKWRITE(0xF8000794, 0x00003FFFU, 0x00001304U),
 341 +       EMIT_MASKWRITE(0xF8000798, 0x00003FFFU, 0x00001304U),
 342 +       EMIT_MASKWRITE(0xF800079C, 0x00003FFFU, 0x00001304U),
 343 +       EMIT_MASKWRITE(0xF80007A0, 0x00003FFFU, 0x00001280U),
 344 +       EMIT_MASKWRITE(0xF80007A4, 0x00003FFFU, 0x00001280U),
 345 +       EMIT_MASKWRITE(0xF80007A8, 0x00003FFFU, 0x00001280U),
 346 +       EMIT_MASKWRITE(0xF80007AC, 0x00003FFFU, 0x00001280U),
 347 +       EMIT_MASKWRITE(0xF80007B0, 0x00003FFFU, 0x00001280U),
 348 +       EMIT_MASKWRITE(0xF80007B4, 0x00003FFFU, 0x00001280U),
 349 +       EMIT_MASKWRITE(0xF80007B8, 0x00003FFFU, 0x00001200U),
 350 +       EMIT_MASKWRITE(0xF80007BC, 0x00003F01U, 0x00001201U),
 351 +       EMIT_MASKWRITE(0xF80007C0, 0x00003FFFU, 0x000012E0U),
 352 +       EMIT_MASKWRITE(0xF80007C4, 0x00003FFFU, 0x000012E1U),
 353 +       EMIT_MASKWRITE(0xF80007C8, 0x00003FFFU, 0x00001200U),
 354 +       EMIT_MASKWRITE(0xF80007CC, 0x00003FFFU, 0x00001200U),
 355 +       EMIT_MASKWRITE(0xF80007D0, 0x00003FFFU, 0x00001280U),
 356 +       EMIT_MASKWRITE(0xF80007D4, 0x00003FFFU, 0x00001280U),
 357 +       EMIT_MASKWRITE(0xF8000830, 0x003F003FU, 0x002F0037U),
 358 +       EMIT_WRITE(0xF8000004, 0x0000767BU),
 359 +       EMIT_EXIT(),
 360 +};
 361 +
 362 +static unsigned long ps7_peripherals_init_data_3_0[] = {
 363 +       EMIT_WRITE(0xF8000008, 0x0000DF0DU),
 364 +       EMIT_MASKWRITE(0xF8000B48, 0x00000180U, 0x00000180U),
 365 +       EMIT_MASKWRITE(0xF8000B4C, 0x00000180U, 0x00000180U),
 366 +       EMIT_MASKWRITE(0xF8000B50, 0x00000180U, 0x00000180U),
 367 +       EMIT_MASKWRITE(0xF8000B54, 0x00000180U, 0x00000180U),
 368 +       EMIT_WRITE(0xF8000004, 0x0000767BU),
 369 +       EMIT_MASKWRITE(0xE0001034, 0x000000FFU, 0x00000006U),
 370 +       EMIT_MASKWRITE(0xE0001018, 0x0000FFFFU, 0x0000007CU),
 371 +       EMIT_MASKWRITE(0xE0001000, 0x000001FFU, 0x00000017U),
 372 +       EMIT_MASKWRITE(0xE0001004, 0x000003FFU, 0x00000020U),
 373 +       EMIT_MASKWRITE(0xE000D000, 0x00080000U, 0x00080000U),
 374 +       EMIT_MASKWRITE(0xF8007000, 0x20000000U, 0x00000000U),
 375 +       EMIT_MASKWRITE(0xE000A244, 0x003FFFFFU, 0x00004000U),
 376 +       EMIT_MASKWRITE(0xE000A008, 0xFFFFFFFFU, 0xBFFF4000U),
 377 +       EMIT_MASKWRITE(0xE000A248, 0x003FFFFFU, 0x00004000U),
 378 +       EMIT_MASKWRITE(0xE000A008, 0xFFFFFFFFU, 0xBFFF0000U),
 379 +       EMIT_MASKDELAY(0xF8F00200, 1),
 380 +       EMIT_MASKWRITE(0xE000A008, 0xFFFFFFFFU, 0xBFFF4000U),
 381 +       EMIT_EXIT(),
 382 +};
 383 +
 384 +static unsigned long ps7_post_config_3_0[] = {
 385 +       EMIT_WRITE(0xF8000008, 0x0000DF0DU),
 386 +       EMIT_MASKWRITE(0xF8000900, 0x0000000FU, 0x0000000FU),
 387 +       EMIT_MASKWRITE(0xF8000240, 0xFFFFFFFFU, 0x00000000U),
 388 +       EMIT_WRITE(0xF8000004, 0x0000767BU),
 389 +       EMIT_EXIT(),
 390 +};
 391 +
 392 +int ps7_post_config(void)
 393 +{
 394 +       int ret = -1;
 395 +
 396 +       ret = ps7_config(ps7_post_config_3_0);
 397 +       if (ret != PS7_INIT_SUCCESS)
 398 +               return ret;
 399 +
 400 +       return PS7_INIT_SUCCESS;
 401 +}
 402 +
 403 +int ps7_init(void)
 404 +{
 405 +       int ret;
 406 +
 407 +       ret = ps7_config(ps7_mio_init_data_3_0);
 408 +       if (ret != PS7_INIT_SUCCESS)
 409 +               return ret;
 410 +
 411 +       ret = ps7_config(ps7_pll_init_data_3_0);
 412 +       if (ret != PS7_INIT_SUCCESS)
 413 +               return ret;
 414 +
 415 +       ret = ps7_config(ps7_clock_init_data_3_0);
 416 +       if (ret != PS7_INIT_SUCCESS)
 417 +               return ret;
 418 +
 419 +       ret = ps7_config(ps7_ddr_init_data_3_0);
 420 +       if (ret != PS7_INIT_SUCCESS)
 421 +               return ret;
 422 +
 423 +       ret = ps7_config(ps7_peripherals_init_data_3_0);
 424 +       if (ret != PS7_INIT_SUCCESS)
 425 +               return ret;
 426 +
 427 +       return PS7_INIT_SUCCESS;
 428 +}
 429 --- /dev/null
 430 +++ b/configs/zynq_zybo_z7_defconfig
 431 @@ -0,0 +1,68 @@
 432 +CONFIG_ARM=y
 433 +CONFIG_ARCH_ZYNQ=y
 434 +CONFIG_SYS_TEXT_BASE=0x4000000
 435 +CONFIG_SPL=y
 436 +CONFIG_DEBUG_UART_BASE=0xe0001000
 437 +CONFIG_DEBUG_UART_CLOCK=50000000
 438 +CONFIG_SPL_STACK_R_ADDR=0x200000
 439 +CONFIG_DEFAULT_DEVICE_TREE="zynq-zybo-z7"
 440 +CONFIG_DEBUG_UART=y
 441 +CONFIG_DISTRO_DEFAULTS=y
 442 +CONFIG_FIT=y
 443 +CONFIG_FIT_SIGNATURE=y
 444 +CONFIG_FIT_VERBOSE=y
 445 +CONFIG_IMAGE_FORMAT_LEGACY=y
 446 +CONFIG_BOOTCOMMAND="run $modeboot || run distro_bootcmd"
 447 +CONFIG_SPL_STACK_R=y
 448 +CONFIG_SPL_OS_BOOT=y
 449 +CONFIG_SPL_SPI_LOAD=y
 450 +CONFIG_SYS_PROMPT="Zynq> "
 451 +CONFIG_CMD_THOR_DOWNLOAD=y
 452 +CONFIG_CMD_DFU=y
 453 +# CONFIG_CMD_FLASH is not set
 454 +CONFIG_CMD_FPGA_LOADBP=y
 455 +CONFIG_CMD_FPGA_LOADFS=y
 456 +CONFIG_CMD_FPGA_LOADMK=y
 457 +CONFIG_CMD_FPGA_LOADP=y
 458 +CONFIG_CMD_GPIO=y
 459 +CONFIG_CMD_I2C=y
 460 +CONFIG_CMD_MMC=y
 461 +CONFIG_CMD_SF=y
 462 +CONFIG_CMD_USB=y
 463 +# CONFIG_CMD_SETEXPR is not set
 464 +CONFIG_CMD_TFTPPUT=y
 465 +CONFIG_CMD_CACHE=y
 466 +CONFIG_CMD_EXT4_WRITE=y
 467 +CONFIG_ENV_IS_IN_SPI_FLASH=y
 468 +CONFIG_NET_RANDOM_ETHADDR=y
 469 +CONFIG_SPL_DM_SEQ_ALIAS=y
 470 +CONFIG_DFU_MMC=y
 471 +CONFIG_DFU_RAM=y
 472 +CONFIG_FPGA_XILINX=y
 473 +CONFIG_FPGA_ZYNQPL=y
 474 +CONFIG_DM_GPIO=y
 475 +CONFIG_SYS_I2C_ZYNQ=y
 476 +CONFIG_ZYNQ_I2C0=y
 477 +CONFIG_ZYNQ_I2C1=y
 478 +CONFIG_MMC_SDHCI=y
 479 +CONFIG_MMC_SDHCI_ZYNQ=y
 480 +CONFIG_SPI_FLASH=y
 481 +CONFIG_SPI_FLASH_BAR=y
 482 +CONFIG_SPI_FLASH_SPANSION=y
 483 +CONFIG_PHY_REALTEK=y
 484 +CONFIG_ZYNQ_GEM=y
 485 +CONFIG_DEBUG_UART_ZYNQ=y
 486 +CONFIG_ZYNQ_SERIAL=y
 487 +CONFIG_ZYNQ_QSPI=y
 488 +CONFIG_USB=y
 489 +CONFIG_USB_EHCI_HCD=y
 490 +CONFIG_USB_ULPI_VIEWPORT=y
 491 +CONFIG_USB_ULPI=y
 492 +CONFIG_USB_STORAGE=y
 493 +CONFIG_USB_GADGET=y
 494 +CONFIG_USB_GADGET_MANUFACTURER="Xilinx"
 495 +CONFIG_USB_GADGET_VENDOR_NUM=0x03fd
 496 +CONFIG_USB_GADGET_PRODUCT_NUM=0x0300
 497 +CONFIG_CI_UDC=y
 498 +CONFIG_USB_GADGET_DOWNLOAD=y
 499 +CONFIG_USB_FUNCTION_THOR=y