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4d3edc858c0f1d8f88f8de35f94cb6a99ad9b111
[openwrt/staging/mkresin.git] / package / mac80211 / patches / 300-pending_work.patch
1 --- a/net/mac80211/agg-rx.c
2 +++ b/net/mac80211/agg-rx.c
3 @@ -203,6 +203,8 @@ static void ieee80211_send_addba_resp(st
4 memcpy(mgmt->bssid, sdata->u.mgd.bssid, ETH_ALEN);
5 else if (sdata->vif.type == NL80211_IFTYPE_ADHOC)
6 memcpy(mgmt->bssid, sdata->u.ibss.bssid, ETH_ALEN);
7 + else if (sdata->vif.type == NL80211_IFTYPE_WDS)
8 + memcpy(mgmt->bssid, da, ETH_ALEN);
9
10 mgmt->frame_control = cpu_to_le16(IEEE80211_FTYPE_MGMT |
11 IEEE80211_STYPE_ACTION);
12 --- a/net/mac80211/agg-tx.c
13 +++ b/net/mac80211/agg-tx.c
14 @@ -81,7 +81,8 @@ static void ieee80211_send_addba_request
15 memcpy(mgmt->sa, sdata->vif.addr, ETH_ALEN);
16 if (sdata->vif.type == NL80211_IFTYPE_AP ||
17 sdata->vif.type == NL80211_IFTYPE_AP_VLAN ||
18 - sdata->vif.type == NL80211_IFTYPE_MESH_POINT)
19 + sdata->vif.type == NL80211_IFTYPE_MESH_POINT ||
20 + sdata->vif.type == NL80211_IFTYPE_WDS)
21 memcpy(mgmt->bssid, sdata->vif.addr, ETH_ALEN);
22 else if (sdata->vif.type == NL80211_IFTYPE_STATION)
23 memcpy(mgmt->bssid, sdata->u.mgd.bssid, ETH_ALEN);
24 @@ -520,6 +521,7 @@ int ieee80211_start_tx_ba_session(struct
25 sdata->vif.type != NL80211_IFTYPE_MESH_POINT &&
26 sdata->vif.type != NL80211_IFTYPE_AP_VLAN &&
27 sdata->vif.type != NL80211_IFTYPE_AP &&
28 + sdata->vif.type != NL80211_IFTYPE_WDS &&
29 sdata->vif.type != NL80211_IFTYPE_ADHOC)
30 return -EINVAL;
31
32 --- a/net/mac80211/debugfs_sta.c
33 +++ b/net/mac80211/debugfs_sta.c
34 @@ -65,11 +65,11 @@ static ssize_t sta_flags_read(struct fil
35 test_sta_flag(sta, WLAN_STA_##flg) ? #flg "\n" : ""
36
37 int res = scnprintf(buf, sizeof(buf),
38 - "%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s",
39 + "%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s",
40 TEST(AUTH), TEST(ASSOC), TEST(PS_STA),
41 TEST(PS_DRIVER), TEST(AUTHORIZED),
42 TEST(SHORT_PREAMBLE),
43 - TEST(WME), TEST(WDS), TEST(CLEAR_PS_FILT),
44 + TEST(WME), TEST(CLEAR_PS_FILT),
45 TEST(MFP), TEST(BLOCK_BA), TEST(PSPOLL),
46 TEST(UAPSD), TEST(SP), TEST(TDLS_PEER),
47 TEST(TDLS_PEER_AUTH), TEST(4ADDR_EVENT),
48 --- a/net/mac80211/iface.c
49 +++ b/net/mac80211/iface.c
50 @@ -501,7 +501,6 @@ int ieee80211_do_open(struct wireless_de
51 struct ieee80211_sub_if_data *sdata = IEEE80211_WDEV_TO_SUB_IF(wdev);
52 struct net_device *dev = wdev->netdev;
53 struct ieee80211_local *local = sdata->local;
54 - struct sta_info *sta;
55 u32 changed = 0;
56 int res;
57 u32 hw_reconf_flags = 0;
58 @@ -658,30 +657,8 @@ int ieee80211_do_open(struct wireless_de
59
60 set_bit(SDATA_STATE_RUNNING, &sdata->state);
61
62 - if (sdata->vif.type == NL80211_IFTYPE_WDS) {
63 - /* Create STA entry for the WDS peer */
64 - sta = sta_info_alloc(sdata, sdata->u.wds.remote_addr,
65 - GFP_KERNEL);
66 - if (!sta) {
67 - res = -ENOMEM;
68 - goto err_del_interface;
69 - }
70 -
71 - sta_info_pre_move_state(sta, IEEE80211_STA_AUTH);
72 - sta_info_pre_move_state(sta, IEEE80211_STA_ASSOC);
73 - sta_info_pre_move_state(sta, IEEE80211_STA_AUTHORIZED);
74 -
75 - res = sta_info_insert(sta);
76 - if (res) {
77 - /* STA has been freed */
78 - goto err_del_interface;
79 - }
80 -
81 - rate_control_rate_init(sta);
82 - netif_carrier_on(dev);
83 - } else if (sdata->vif.type == NL80211_IFTYPE_P2P_DEVICE) {
84 + if (sdata->vif.type == NL80211_IFTYPE_P2P_DEVICE)
85 rcu_assign_pointer(local->p2p_sdata, sdata);
86 - }
87
88 /*
89 * set_multicast_list will be invoked by the networking core
90 @@ -1066,6 +1043,72 @@ static void ieee80211_if_setup(struct ne
91 dev->destructor = free_netdev;
92 }
93
94 +static void ieee80211_wds_rx_queued_mgmt(struct ieee80211_sub_if_data *sdata,
95 + struct sk_buff *skb)
96 +{
97 + struct ieee80211_local *local = sdata->local;
98 + struct ieee80211_rx_status *rx_status;
99 + struct ieee802_11_elems elems;
100 + struct ieee80211_mgmt *mgmt;
101 + struct sta_info *sta;
102 + size_t baselen;
103 + u32 rates = 0;
104 + u16 stype;
105 + bool new = false;
106 + enum ieee80211_band band = local->hw.conf.channel->band;
107 + struct ieee80211_supported_band *sband = local->hw.wiphy->bands[band];
108 +
109 + rx_status = IEEE80211_SKB_RXCB(skb);
110 + mgmt = (struct ieee80211_mgmt *) skb->data;
111 + stype = le16_to_cpu(mgmt->frame_control) & IEEE80211_FCTL_STYPE;
112 +
113 + if (stype != IEEE80211_STYPE_BEACON)
114 + return;
115 +
116 + baselen = (u8 *) mgmt->u.probe_resp.variable - (u8 *) mgmt;
117 + if (baselen > skb->len)
118 + return;
119 +
120 + ieee802_11_parse_elems(mgmt->u.probe_resp.variable,
121 + skb->len - baselen, &elems);
122 +
123 + rates = ieee80211_sta_get_rates(local, &elems, band, NULL);
124 +
125 + rcu_read_lock();
126 +
127 + sta = sta_info_get(sdata, sdata->u.wds.remote_addr);
128 +
129 + if (!sta) {
130 + rcu_read_unlock();
131 + sta = sta_info_alloc(sdata, sdata->u.wds.remote_addr,
132 + GFP_KERNEL);
133 + if (!sta)
134 + return;
135 +
136 + new = true;
137 + }
138 +
139 + sta->last_rx = jiffies;
140 + sta->sta.supp_rates[local->hw.conf.channel->band] = rates;
141 +
142 + if (elems.ht_cap_elem)
143 + ieee80211_ht_cap_ie_to_sta_ht_cap(sdata, sband,
144 + elems.ht_cap_elem, &sta->sta.ht_cap);
145 +
146 + if (elems.wmm_param)
147 + set_sta_flag(sta, WLAN_STA_WME);
148 +
149 + if (new) {
150 + sta_info_pre_move_state(sta, IEEE80211_STA_AUTH);
151 + sta_info_pre_move_state(sta, IEEE80211_STA_ASSOC);
152 + sta_info_pre_move_state(sta, IEEE80211_STA_AUTHORIZED);
153 + rate_control_rate_init(sta);
154 + sta_info_insert_rcu(sta);
155 + }
156 +
157 + rcu_read_unlock();
158 +}
159 +
160 static void ieee80211_iface_work(struct work_struct *work)
161 {
162 struct ieee80211_sub_if_data *sdata =
163 @@ -1170,6 +1213,9 @@ static void ieee80211_iface_work(struct
164 break;
165 ieee80211_mesh_rx_queued_mgmt(sdata, skb);
166 break;
167 + case NL80211_IFTYPE_WDS:
168 + ieee80211_wds_rx_queued_mgmt(sdata, skb);
169 + break;
170 default:
171 WARN(1, "frame for unexpected interface type");
172 break;
173 --- a/net/mac80211/rx.c
174 +++ b/net/mac80211/rx.c
175 @@ -2350,6 +2350,7 @@ ieee80211_rx_h_action(struct ieee80211_r
176 sdata->vif.type != NL80211_IFTYPE_MESH_POINT &&
177 sdata->vif.type != NL80211_IFTYPE_AP_VLAN &&
178 sdata->vif.type != NL80211_IFTYPE_AP &&
179 + sdata->vif.type != NL80211_IFTYPE_WDS &&
180 sdata->vif.type != NL80211_IFTYPE_ADHOC)
181 break;
182
183 @@ -2655,14 +2656,15 @@ ieee80211_rx_h_mgmt(struct ieee80211_rx_
184
185 if (!ieee80211_vif_is_mesh(&sdata->vif) &&
186 sdata->vif.type != NL80211_IFTYPE_ADHOC &&
187 - sdata->vif.type != NL80211_IFTYPE_STATION)
188 + sdata->vif.type != NL80211_IFTYPE_STATION &&
189 + sdata->vif.type != NL80211_IFTYPE_WDS)
190 return RX_DROP_MONITOR;
191
192 switch (stype) {
193 case cpu_to_le16(IEEE80211_STYPE_AUTH):
194 case cpu_to_le16(IEEE80211_STYPE_BEACON):
195 case cpu_to_le16(IEEE80211_STYPE_PROBE_RESP):
196 - /* process for all: mesh, mlme, ibss */
197 + /* process for all: mesh, mlme, ibss, wds */
198 break;
199 case cpu_to_le16(IEEE80211_STYPE_ASSOC_RESP):
200 case cpu_to_le16(IEEE80211_STYPE_REASSOC_RESP):
201 @@ -2987,10 +2989,16 @@ static int prepare_for_handlers(struct i
202 }
203 break;
204 case NL80211_IFTYPE_WDS:
205 - if (bssid || !ieee80211_is_data(hdr->frame_control))
206 - return 0;
207 if (!ether_addr_equal(sdata->u.wds.remote_addr, hdr->addr2))
208 return 0;
209 +
210 + if (ieee80211_is_data(hdr->frame_control) ||
211 + ieee80211_is_action(hdr->frame_control)) {
212 + if (compare_ether_addr(sdata->vif.addr, hdr->addr1))
213 + return 0;
214 + } else if (!ieee80211_is_beacon(hdr->frame_control))
215 + return 0;
216 +
217 break;
218 case NL80211_IFTYPE_P2P_DEVICE:
219 if (!ieee80211_is_public_action(hdr, skb->len) &&
220 --- a/net/mac80211/sta_info.h
221 +++ b/net/mac80211/sta_info.h
222 @@ -32,7 +32,6 @@
223 * @WLAN_STA_SHORT_PREAMBLE: Station is capable of receiving short-preamble
224 * frames.
225 * @WLAN_STA_WME: Station is a QoS-STA.
226 - * @WLAN_STA_WDS: Station is one of our WDS peers.
227 * @WLAN_STA_CLEAR_PS_FILT: Clear PS filter in hardware (using the
228 * IEEE80211_TX_CTL_CLEAR_PS_FILT control flag) when the next
229 * frame to this station is transmitted.
230 @@ -64,7 +63,6 @@ enum ieee80211_sta_info_flags {
231 WLAN_STA_AUTHORIZED,
232 WLAN_STA_SHORT_PREAMBLE,
233 WLAN_STA_WME,
234 - WLAN_STA_WDS,
235 WLAN_STA_CLEAR_PS_FILT,
236 WLAN_STA_MFP,
237 WLAN_STA_BLOCK_BA,
238 --- a/drivers/net/wireless/ath/ath9k/ath9k.h
239 +++ b/drivers/net/wireless/ath/ath9k/ath9k.h
240 @@ -314,7 +314,6 @@ struct ath_rx {
241 u32 *rxlink;
242 u32 num_pkts;
243 unsigned int rxfilter;
244 - spinlock_t rxbuflock;
245 struct list_head rxbuf;
246 struct ath_descdma rxdma;
247 struct ath_rx_edma rx_edma[ATH9K_RX_QUEUE_MAX];
248 @@ -324,7 +323,6 @@ struct ath_rx {
249
250 int ath_startrecv(struct ath_softc *sc);
251 bool ath_stoprecv(struct ath_softc *sc);
252 -void ath_flushrecv(struct ath_softc *sc);
253 u32 ath_calcrxfilter(struct ath_softc *sc);
254 int ath_rx_init(struct ath_softc *sc, int nbufs);
255 void ath_rx_cleanup(struct ath_softc *sc);
256 @@ -334,9 +332,8 @@ void ath_txq_lock(struct ath_softc *sc,
257 void ath_txq_unlock(struct ath_softc *sc, struct ath_txq *txq);
258 void ath_txq_unlock_complete(struct ath_softc *sc, struct ath_txq *txq);
259 void ath_tx_cleanupq(struct ath_softc *sc, struct ath_txq *txq);
260 -bool ath_drain_all_txq(struct ath_softc *sc, bool retry_tx);
261 -void ath_draintxq(struct ath_softc *sc,
262 - struct ath_txq *txq, bool retry_tx);
263 +bool ath_drain_all_txq(struct ath_softc *sc);
264 +void ath_draintxq(struct ath_softc *sc, struct ath_txq *txq);
265 void ath_tx_node_init(struct ath_softc *sc, struct ath_node *an);
266 void ath_tx_node_cleanup(struct ath_softc *sc, struct ath_node *an);
267 void ath_txq_schedule(struct ath_softc *sc, struct ath_txq *txq);
268 @@ -641,7 +638,6 @@ void ath_ant_comb_update(struct ath_soft
269 enum sc_op_flags {
270 SC_OP_INVALID,
271 SC_OP_BEACONS,
272 - SC_OP_RXFLUSH,
273 SC_OP_ANI_RUN,
274 SC_OP_PRIM_STA_VIF,
275 SC_OP_HW_RESET,
276 --- a/drivers/net/wireless/ath/ath9k/beacon.c
277 +++ b/drivers/net/wireless/ath/ath9k/beacon.c
278 @@ -147,6 +147,7 @@ static struct ath_buf *ath9k_beacon_gene
279 skb->len, DMA_TO_DEVICE);
280 dev_kfree_skb_any(skb);
281 bf->bf_buf_addr = 0;
282 + bf->bf_mpdu = NULL;
283 }
284
285 skb = ieee80211_beacon_get(hw, vif);
286 @@ -198,7 +199,7 @@ static struct ath_buf *ath9k_beacon_gene
287 if (sc->nvifs > 1) {
288 ath_dbg(common, BEACON,
289 "Flushing previous cabq traffic\n");
290 - ath_draintxq(sc, cabq, false);
291 + ath_draintxq(sc, cabq);
292 }
293 }
294
295 @@ -359,7 +360,6 @@ void ath9k_beacon_tasklet(unsigned long
296 return;
297
298 bf = ath9k_beacon_generate(sc->hw, vif);
299 - WARN_ON(!bf);
300
301 if (sc->beacon.bmisscnt != 0) {
302 ath_dbg(common, BSTUCK, "resume beacon xmit after %u misses\n",
303 --- a/drivers/net/wireless/ath/ath9k/debug.c
304 +++ b/drivers/net/wireless/ath/ath9k/debug.c
305 @@ -861,7 +861,6 @@ static ssize_t read_file_recv(struct fil
306 RXS_ERR("RX-LENGTH-ERR", rx_len_err);
307 RXS_ERR("RX-OOM-ERR", rx_oom_err);
308 RXS_ERR("RX-RATE-ERR", rx_rate_err);
309 - RXS_ERR("RX-DROP-RXFLUSH", rx_drop_rxflush);
310 RXS_ERR("RX-TOO-MANY-FRAGS", rx_too_many_frags_err);
311
312 PHY_ERR("UNDERRUN ERR", ATH9K_PHYERR_UNDERRUN);
313 --- a/drivers/net/wireless/ath/ath9k/debug.h
314 +++ b/drivers/net/wireless/ath/ath9k/debug.h
315 @@ -216,7 +216,6 @@ struct ath_tx_stats {
316 * @rx_oom_err: No. of frames dropped due to OOM issues.
317 * @rx_rate_err: No. of frames dropped due to rate errors.
318 * @rx_too_many_frags_err: Frames dropped due to too-many-frags received.
319 - * @rx_drop_rxflush: No. of frames dropped due to RX-FLUSH.
320 * @rx_beacons: No. of beacons received.
321 * @rx_frags: No. of rx-fragements received.
322 */
323 @@ -235,7 +234,6 @@ struct ath_rx_stats {
324 u32 rx_oom_err;
325 u32 rx_rate_err;
326 u32 rx_too_many_frags_err;
327 - u32 rx_drop_rxflush;
328 u32 rx_beacons;
329 u32 rx_frags;
330 };
331 --- a/drivers/net/wireless/ath/ath9k/main.c
332 +++ b/drivers/net/wireless/ath/ath9k/main.c
333 @@ -182,7 +182,7 @@ static void ath_restart_work(struct ath_
334 ath_start_ani(sc);
335 }
336
337 -static bool ath_prepare_reset(struct ath_softc *sc, bool retry_tx, bool flush)
338 +static bool ath_prepare_reset(struct ath_softc *sc)
339 {
340 struct ath_hw *ah = sc->sc_ah;
341 bool ret = true;
342 @@ -196,20 +196,12 @@ static bool ath_prepare_reset(struct ath
343 ath9k_debug_samp_bb_mac(sc);
344 ath9k_hw_disable_interrupts(ah);
345
346 - if (!ath_stoprecv(sc))
347 + if (!ath_drain_all_txq(sc))
348 ret = false;
349
350 - if (!ath_drain_all_txq(sc, retry_tx))
351 + if (!ath_stoprecv(sc))
352 ret = false;
353
354 - if (!flush) {
355 - if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
356 - ath_rx_tasklet(sc, 1, true);
357 - ath_rx_tasklet(sc, 1, false);
358 - } else {
359 - ath_flushrecv(sc);
360 - }
361 -
362 return ret;
363 }
364
365 @@ -255,18 +247,17 @@ static bool ath_complete_reset(struct at
366 return true;
367 }
368
369 -static int ath_reset_internal(struct ath_softc *sc, struct ath9k_channel *hchan,
370 - bool retry_tx)
371 +static int ath_reset_internal(struct ath_softc *sc, struct ath9k_channel *hchan)
372 {
373 struct ath_hw *ah = sc->sc_ah;
374 struct ath_common *common = ath9k_hw_common(ah);
375 struct ath9k_hw_cal_data *caldata = NULL;
376 bool fastcc = true;
377 - bool flush = false;
378 int r;
379
380 __ath_cancel_work(sc);
381
382 + tasklet_disable(&sc->intr_tq);
383 spin_lock_bh(&sc->sc_pcu_lock);
384
385 if (!(sc->hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)) {
386 @@ -276,11 +267,10 @@ static int ath_reset_internal(struct ath
387
388 if (!hchan) {
389 fastcc = false;
390 - flush = true;
391 hchan = ah->curchan;
392 }
393
394 - if (!ath_prepare_reset(sc, retry_tx, flush))
395 + if (!ath_prepare_reset(sc))
396 fastcc = false;
397
398 ath_dbg(common, CONFIG, "Reset to %u MHz, HT40: %d fastcc: %d\n",
399 @@ -302,6 +292,8 @@ static int ath_reset_internal(struct ath
400
401 out:
402 spin_unlock_bh(&sc->sc_pcu_lock);
403 + tasklet_enable(&sc->intr_tq);
404 +
405 return r;
406 }
407
408 @@ -319,7 +311,7 @@ static int ath_set_channel(struct ath_so
409 if (test_bit(SC_OP_INVALID, &sc->sc_flags))
410 return -EIO;
411
412 - r = ath_reset_internal(sc, hchan, false);
413 + r = ath_reset_internal(sc, hchan);
414
415 return r;
416 }
417 @@ -549,23 +541,21 @@ chip_reset:
418 #undef SCHED_INTR
419 }
420
421 -static int ath_reset(struct ath_softc *sc, bool retry_tx)
422 +static int ath_reset(struct ath_softc *sc)
423 {
424 - int r;
425 + int i, r;
426
427 ath9k_ps_wakeup(sc);
428
429 - r = ath_reset_internal(sc, NULL, retry_tx);
430 + r = ath_reset_internal(sc, NULL);
431
432 - if (retry_tx) {
433 - int i;
434 - for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
435 - if (ATH_TXQ_SETUP(sc, i)) {
436 - spin_lock_bh(&sc->tx.txq[i].axq_lock);
437 - ath_txq_schedule(sc, &sc->tx.txq[i]);
438 - spin_unlock_bh(&sc->tx.txq[i].axq_lock);
439 - }
440 - }
441 + for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
442 + if (!ATH_TXQ_SETUP(sc, i))
443 + continue;
444 +
445 + spin_lock_bh(&sc->tx.txq[i].axq_lock);
446 + ath_txq_schedule(sc, &sc->tx.txq[i]);
447 + spin_unlock_bh(&sc->tx.txq[i].axq_lock);
448 }
449
450 ath9k_ps_restore(sc);
451 @@ -586,7 +576,7 @@ void ath_reset_work(struct work_struct *
452 {
453 struct ath_softc *sc = container_of(work, struct ath_softc, hw_reset_work);
454
455 - ath_reset(sc, true);
456 + ath_reset(sc);
457 }
458
459 /**********************/
460 @@ -804,7 +794,7 @@ static void ath9k_stop(struct ieee80211_
461 ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
462 }
463
464 - ath_prepare_reset(sc, false, true);
465 + ath_prepare_reset(sc);
466
467 if (sc->rx.frag) {
468 dev_kfree_skb_any(sc->rx.frag);
469 @@ -1731,11 +1721,11 @@ static void ath9k_flush(struct ieee80211
470 if (drop) {
471 ath9k_ps_wakeup(sc);
472 spin_lock_bh(&sc->sc_pcu_lock);
473 - drain_txq = ath_drain_all_txq(sc, false);
474 + drain_txq = ath_drain_all_txq(sc);
475 spin_unlock_bh(&sc->sc_pcu_lock);
476
477 if (!drain_txq)
478 - ath_reset(sc, false);
479 + ath_reset(sc);
480
481 ath9k_ps_restore(sc);
482 ieee80211_wake_queues(hw);
483 --- a/drivers/net/wireless/ath/ath9k/recv.c
484 +++ b/drivers/net/wireless/ath/ath9k/recv.c
485 @@ -248,8 +248,6 @@ rx_init_fail:
486
487 static void ath_edma_start_recv(struct ath_softc *sc)
488 {
489 - spin_lock_bh(&sc->rx.rxbuflock);
490 -
491 ath9k_hw_rxena(sc->sc_ah);
492
493 ath_rx_addbuffer_edma(sc, ATH9K_RX_QUEUE_HP,
494 @@ -261,8 +259,6 @@ static void ath_edma_start_recv(struct a
495 ath_opmode_init(sc);
496
497 ath9k_hw_startpcureceive(sc->sc_ah, !!(sc->hw->conf.flags & IEEE80211_CONF_OFFCHANNEL));
498 -
499 - spin_unlock_bh(&sc->rx.rxbuflock);
500 }
501
502 static void ath_edma_stop_recv(struct ath_softc *sc)
503 @@ -279,8 +275,6 @@ int ath_rx_init(struct ath_softc *sc, in
504 int error = 0;
505
506 spin_lock_init(&sc->sc_pcu_lock);
507 - spin_lock_init(&sc->rx.rxbuflock);
508 - clear_bit(SC_OP_RXFLUSH, &sc->sc_flags);
509
510 common->rx_bufsize = IEEE80211_MAX_MPDU_LEN / 2 +
511 sc->sc_ah->caps.rx_status_len;
512 @@ -438,7 +432,6 @@ int ath_startrecv(struct ath_softc *sc)
513 return 0;
514 }
515
516 - spin_lock_bh(&sc->rx.rxbuflock);
517 if (list_empty(&sc->rx.rxbuf))
518 goto start_recv;
519
520 @@ -459,26 +452,31 @@ start_recv:
521 ath_opmode_init(sc);
522 ath9k_hw_startpcureceive(ah, !!(sc->hw->conf.flags & IEEE80211_CONF_OFFCHANNEL));
523
524 - spin_unlock_bh(&sc->rx.rxbuflock);
525 -
526 return 0;
527 }
528
529 +static void ath_flushrecv(struct ath_softc *sc)
530 +{
531 + if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
532 + ath_rx_tasklet(sc, 1, true);
533 + ath_rx_tasklet(sc, 1, false);
534 +}
535 +
536 bool ath_stoprecv(struct ath_softc *sc)
537 {
538 struct ath_hw *ah = sc->sc_ah;
539 bool stopped, reset = false;
540
541 - spin_lock_bh(&sc->rx.rxbuflock);
542 ath9k_hw_abortpcurecv(ah);
543 ath9k_hw_setrxfilter(ah, 0);
544 stopped = ath9k_hw_stopdmarecv(ah, &reset);
545
546 + ath_flushrecv(sc);
547 +
548 if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
549 ath_edma_stop_recv(sc);
550 else
551 sc->rx.rxlink = NULL;
552 - spin_unlock_bh(&sc->rx.rxbuflock);
553
554 if (!(ah->ah_flags & AH_UNPLUGGED) &&
555 unlikely(!stopped)) {
556 @@ -490,15 +488,6 @@ bool ath_stoprecv(struct ath_softc *sc)
557 return stopped && !reset;
558 }
559
560 -void ath_flushrecv(struct ath_softc *sc)
561 -{
562 - set_bit(SC_OP_RXFLUSH, &sc->sc_flags);
563 - if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
564 - ath_rx_tasklet(sc, 1, true);
565 - ath_rx_tasklet(sc, 1, false);
566 - clear_bit(SC_OP_RXFLUSH, &sc->sc_flags);
567 -}
568 -
569 static bool ath_beacon_dtim_pending_cab(struct sk_buff *skb)
570 {
571 /* Check whether the Beacon frame has DTIM indicating buffered bc/mc */
572 @@ -735,6 +724,7 @@ static struct ath_buf *ath_get_next_rx_b
573 return NULL;
574 }
575
576 + list_del(&bf->list);
577 if (!bf->bf_mpdu)
578 return bf;
579
580 @@ -1050,16 +1040,12 @@ int ath_rx_tasklet(struct ath_softc *sc,
581 dma_type = DMA_FROM_DEVICE;
582
583 qtype = hp ? ATH9K_RX_QUEUE_HP : ATH9K_RX_QUEUE_LP;
584 - spin_lock_bh(&sc->rx.rxbuflock);
585
586 tsf = ath9k_hw_gettsf64(ah);
587 tsf_lower = tsf & 0xffffffff;
588
589 do {
590 bool decrypt_error = false;
591 - /* If handling rx interrupt and flush is in progress => exit */
592 - if (test_bit(SC_OP_RXFLUSH, &sc->sc_flags) && (flush == 0))
593 - break;
594
595 memset(&rs, 0, sizeof(rs));
596 if (edma)
597 @@ -1102,15 +1088,6 @@ int ath_rx_tasklet(struct ath_softc *sc,
598
599 ath_debug_stat_rx(sc, &rs);
600
601 - /*
602 - * If we're asked to flush receive queue, directly
603 - * chain it back at the queue without processing it.
604 - */
605 - if (test_bit(SC_OP_RXFLUSH, &sc->sc_flags)) {
606 - RX_STAT_INC(rx_drop_rxflush);
607 - goto requeue_drop_frag;
608 - }
609 -
610 memset(rxs, 0, sizeof(struct ieee80211_rx_status));
611
612 rxs->mactime = (tsf & ~0xffffffffULL) | rs.rs_tstamp;
613 @@ -1245,19 +1222,18 @@ requeue_drop_frag:
614 sc->rx.frag = NULL;
615 }
616 requeue:
617 + list_add_tail(&bf->list, &sc->rx.rxbuf);
618 + if (flush)
619 + continue;
620 +
621 if (edma) {
622 - list_add_tail(&bf->list, &sc->rx.rxbuf);
623 ath_rx_edma_buf_link(sc, qtype);
624 } else {
625 - list_move_tail(&bf->list, &sc->rx.rxbuf);
626 ath_rx_buf_link(sc, bf);
627 - if (!flush)
628 - ath9k_hw_rxena(ah);
629 + ath9k_hw_rxena(ah);
630 }
631 } while (1);
632
633 - spin_unlock_bh(&sc->rx.rxbuflock);
634 -
635 if (!(ah->imask & ATH9K_INT_RXEOL)) {
636 ah->imask |= (ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
637 ath9k_hw_set_interrupts(ah);
638 --- a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
639 +++ b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
640 @@ -4586,14 +4586,14 @@ static int ar9003_hw_cal_pier_get(struct
641 return 0;
642 }
643
644 -static int ar9003_hw_power_control_override(struct ath_hw *ah,
645 - int frequency,
646 - int *correction,
647 - int *voltage, int *temperature)
648 +static void ar9003_hw_power_control_override(struct ath_hw *ah,
649 + int frequency,
650 + int *correction,
651 + int *voltage, int *temperature)
652 {
653 - int tempSlope = 0;
654 + int temp_slope = 0, temp_slope1 = 0, temp_slope2 = 0;
655 struct ar9300_eeprom *eep = &ah->eeprom.ar9300_eep;
656 - int f[8], t[8], i;
657 + int f[8], t[8], t1[3], t2[3], i;
658
659 REG_RMW(ah, AR_PHY_TPC_11_B0,
660 (correction[0] << AR_PHY_TPC_OLPC_GAIN_DELTA_S),
661 @@ -4624,38 +4624,108 @@ static int ar9003_hw_power_control_overr
662 * enable temperature compensation
663 * Need to use register names
664 */
665 - if (frequency < 4000)
666 - tempSlope = eep->modalHeader2G.tempSlope;
667 - else if ((eep->baseEepHeader.miscConfiguration & 0x20) != 0) {
668 - for (i = 0; i < 8; i++) {
669 - t[i] = eep->base_ext1.tempslopextension[i];
670 - f[i] = FBIN2FREQ(eep->calFreqPier5G[i], 0);
671 - }
672 - tempSlope = ar9003_hw_power_interpolate((s32) frequency,
673 - f, t, 8);
674 - } else if (eep->base_ext2.tempSlopeLow != 0) {
675 - t[0] = eep->base_ext2.tempSlopeLow;
676 - f[0] = 5180;
677 - t[1] = eep->modalHeader5G.tempSlope;
678 - f[1] = 5500;
679 - t[2] = eep->base_ext2.tempSlopeHigh;
680 - f[2] = 5785;
681 - tempSlope = ar9003_hw_power_interpolate((s32) frequency,
682 - f, t, 3);
683 - } else
684 - tempSlope = eep->modalHeader5G.tempSlope;
685 + if (frequency < 4000) {
686 + temp_slope = eep->modalHeader2G.tempSlope;
687 + } else {
688 + if (AR_SREV_9550(ah)) {
689 + t[0] = eep->base_ext1.tempslopextension[2];
690 + t1[0] = eep->base_ext1.tempslopextension[3];
691 + t2[0] = eep->base_ext1.tempslopextension[4];
692 + f[0] = 5180;
693 +
694 + t[1] = eep->modalHeader5G.tempSlope;
695 + t1[1] = eep->base_ext1.tempslopextension[0];
696 + t2[1] = eep->base_ext1.tempslopextension[1];
697 + f[1] = 5500;
698 +
699 + t[2] = eep->base_ext1.tempslopextension[5];
700 + t1[2] = eep->base_ext1.tempslopextension[6];
701 + t2[2] = eep->base_ext1.tempslopextension[7];
702 + f[2] = 5785;
703 +
704 + temp_slope = ar9003_hw_power_interpolate(frequency,
705 + f, t, 3);
706 + temp_slope1 = ar9003_hw_power_interpolate(frequency,
707 + f, t1, 3);
708 + temp_slope2 = ar9003_hw_power_interpolate(frequency,
709 + f, t2, 3);
710 +
711 + goto tempslope;
712 + }
713 +
714 + if ((eep->baseEepHeader.miscConfiguration & 0x20) != 0) {
715 + for (i = 0; i < 8; i++) {
716 + t[i] = eep->base_ext1.tempslopextension[i];
717 + f[i] = FBIN2FREQ(eep->calFreqPier5G[i], 0);
718 + }
719 + temp_slope = ar9003_hw_power_interpolate((s32) frequency,
720 + f, t, 8);
721 + } else if (eep->base_ext2.tempSlopeLow != 0) {
722 + t[0] = eep->base_ext2.tempSlopeLow;
723 + f[0] = 5180;
724 + t[1] = eep->modalHeader5G.tempSlope;
725 + f[1] = 5500;
726 + t[2] = eep->base_ext2.tempSlopeHigh;
727 + f[2] = 5785;
728 + temp_slope = ar9003_hw_power_interpolate((s32) frequency,
729 + f, t, 3);
730 + } else {
731 + temp_slope = eep->modalHeader5G.tempSlope;
732 + }
733 + }
734
735 - REG_RMW_FIELD(ah, AR_PHY_TPC_19, AR_PHY_TPC_19_ALPHA_THERM, tempSlope);
736 +tempslope:
737 + if (AR_SREV_9550(ah)) {
738 + /*
739 + * AR955x has tempSlope register for each chain.
740 + * Check whether temp_compensation feature is enabled or not.
741 + */
742 + if (eep->baseEepHeader.featureEnable & 0x1) {
743 + if (frequency < 4000) {
744 + REG_RMW_FIELD(ah, AR_PHY_TPC_19,
745 + AR_PHY_TPC_19_ALPHA_THERM,
746 + eep->base_ext2.tempSlopeLow);
747 + REG_RMW_FIELD(ah, AR_PHY_TPC_19_B1,
748 + AR_PHY_TPC_19_ALPHA_THERM,
749 + temp_slope);
750 + REG_RMW_FIELD(ah, AR_PHY_TPC_19_B2,
751 + AR_PHY_TPC_19_ALPHA_THERM,
752 + eep->base_ext2.tempSlopeHigh);
753 + } else {
754 + REG_RMW_FIELD(ah, AR_PHY_TPC_19,
755 + AR_PHY_TPC_19_ALPHA_THERM,
756 + temp_slope);
757 + REG_RMW_FIELD(ah, AR_PHY_TPC_19_B1,
758 + AR_PHY_TPC_19_ALPHA_THERM,
759 + temp_slope1);
760 + REG_RMW_FIELD(ah, AR_PHY_TPC_19_B2,
761 + AR_PHY_TPC_19_ALPHA_THERM,
762 + temp_slope2);
763 + }
764 + } else {
765 + /*
766 + * If temp compensation is not enabled,
767 + * set all registers to 0.
768 + */
769 + REG_RMW_FIELD(ah, AR_PHY_TPC_19,
770 + AR_PHY_TPC_19_ALPHA_THERM, 0);
771 + REG_RMW_FIELD(ah, AR_PHY_TPC_19_B1,
772 + AR_PHY_TPC_19_ALPHA_THERM, 0);
773 + REG_RMW_FIELD(ah, AR_PHY_TPC_19_B2,
774 + AR_PHY_TPC_19_ALPHA_THERM, 0);
775 + }
776 + } else {
777 + REG_RMW_FIELD(ah, AR_PHY_TPC_19,
778 + AR_PHY_TPC_19_ALPHA_THERM, temp_slope);
779 + }
780
781 if (AR_SREV_9462_20(ah))
782 REG_RMW_FIELD(ah, AR_PHY_TPC_19_B1,
783 - AR_PHY_TPC_19_B1_ALPHA_THERM, tempSlope);
784 + AR_PHY_TPC_19_B1_ALPHA_THERM, temp_slope);
785
786
787 REG_RMW_FIELD(ah, AR_PHY_TPC_18, AR_PHY_TPC_18_THERM_CAL_VALUE,
788 temperature[0]);
789 -
790 - return 0;
791 }
792
793 /* Apply the recorded correction values. */
794 --- a/drivers/net/wireless/ath/ath9k/ar9003_phy.c
795 +++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.c
796 @@ -68,7 +68,7 @@ static const int m2ThreshExt_off = 127;
797 static int ar9003_hw_set_channel(struct ath_hw *ah, struct ath9k_channel *chan)
798 {
799 u16 bMode, fracMode = 0, aModeRefSel = 0;
800 - u32 freq, channelSel = 0, reg32 = 0;
801 + u32 freq, chan_frac, div, channelSel = 0, reg32 = 0;
802 struct chan_centers centers;
803 int loadSynthChannel;
804
805 @@ -77,9 +77,6 @@ static int ar9003_hw_set_channel(struct
806
807 if (freq < 4800) { /* 2 GHz, fractional mode */
808 if (AR_SREV_9330(ah)) {
809 - u32 chan_frac;
810 - u32 div;
811 -
812 if (ah->is_clk_25mhz)
813 div = 75;
814 else
815 @@ -89,34 +86,40 @@ static int ar9003_hw_set_channel(struct
816 chan_frac = (((freq * 4) % div) * 0x20000) / div;
817 channelSel = (channelSel << 17) | chan_frac;
818 } else if (AR_SREV_9485(ah) || AR_SREV_9565(ah)) {
819 - u32 chan_frac;
820 -
821 /*
822 - * freq_ref = 40 / (refdiva >> amoderefsel); where refdiva=1 and amoderefsel=0
823 + * freq_ref = 40 / (refdiva >> amoderefsel);
824 + * where refdiva=1 and amoderefsel=0
825 * ndiv = ((chan_mhz * 4) / 3) / freq_ref;
826 * chansel = int(ndiv), chanfrac = (ndiv - chansel) * 0x20000
827 */
828 channelSel = (freq * 4) / 120;
829 chan_frac = (((freq * 4) % 120) * 0x20000) / 120;
830 channelSel = (channelSel << 17) | chan_frac;
831 - } else if (AR_SREV_9340(ah) || AR_SREV_9550(ah)) {
832 + } else if (AR_SREV_9340(ah)) {
833 if (ah->is_clk_25mhz) {
834 - u32 chan_frac;
835 -
836 channelSel = (freq * 2) / 75;
837 chan_frac = (((freq * 2) % 75) * 0x20000) / 75;
838 channelSel = (channelSel << 17) | chan_frac;
839 - } else
840 + } else {
841 channelSel = CHANSEL_2G(freq) >> 1;
842 - } else
843 + }
844 + } else if (AR_SREV_9550(ah)) {
845 + if (ah->is_clk_25mhz)
846 + div = 75;
847 + else
848 + div = 120;
849 +
850 + channelSel = (freq * 4) / div;
851 + chan_frac = (((freq * 4) % div) * 0x20000) / div;
852 + channelSel = (channelSel << 17) | chan_frac;
853 + } else {
854 channelSel = CHANSEL_2G(freq);
855 + }
856 /* Set to 2G mode */
857 bMode = 1;
858 } else {
859 if ((AR_SREV_9340(ah) || AR_SREV_9550(ah)) &&
860 ah->is_clk_25mhz) {
861 - u32 chan_frac;
862 -
863 channelSel = freq / 75;
864 chan_frac = ((freq % 75) * 0x20000) / 75;
865 channelSel = (channelSel << 17) | chan_frac;
866 --- a/drivers/net/wireless/ath/ath9k/ar9003_phy.h
867 +++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.h
868 @@ -1028,7 +1028,7 @@
869 #define AR_PHY_TPC_5_B2 (AR_SM2_BASE + 0x208)
870 #define AR_PHY_TPC_6_B2 (AR_SM2_BASE + 0x20c)
871 #define AR_PHY_TPC_11_B2 (AR_SM2_BASE + 0x220)
872 -#define AR_PHY_PDADC_TAB_2 (AR_SM2_BASE + 0x240)
873 +#define AR_PHY_TPC_19_B2 (AR_SM2_BASE + 0x240)
874 #define AR_PHY_TX_IQCAL_STATUS_B2 (AR_SM2_BASE + 0x48c)
875 #define AR_PHY_TX_IQCAL_CORR_COEFF_B2(_i) (AR_SM2_BASE + 0x450 + ((_i) << 2))
876
877 --- a/drivers/net/wireless/ath/ath9k/ar955x_1p0_initvals.h
878 +++ b/drivers/net/wireless/ath/ath9k/ar955x_1p0_initvals.h
879 @@ -23,16 +23,16 @@
880 static const u32 ar955x_1p0_radio_postamble[][5] = {
881 /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
882 {0x00016098, 0xd2dd5554, 0xd2dd5554, 0xd28b3330, 0xd28b3330},
883 - {0x0001609c, 0x0a566f3a, 0x0a566f3a, 0x06345f2a, 0x06345f2a},
884 - {0x000160ac, 0xa4647c00, 0xa4647c00, 0xa4646800, 0xa4646800},
885 - {0x000160b0, 0x01885f52, 0x01885f52, 0x04accf3a, 0x04accf3a},
886 - {0x00016104, 0xb7a00001, 0xb7a00001, 0xb7a00001, 0xb7a00001},
887 + {0x0001609c, 0x0a566f3a, 0x0a566f3a, 0x0a566f3a, 0x0a566f3a},
888 + {0x000160ac, 0xa4647c00, 0xa4647c00, 0x24647c00, 0x24647c00},
889 + {0x000160b0, 0x01885f52, 0x01885f52, 0x01885f52, 0x01885f52},
890 + {0x00016104, 0xb7a00000, 0xb7a00000, 0xb7a00001, 0xb7a00001},
891 {0x0001610c, 0xc0000000, 0xc0000000, 0xc0000000, 0xc0000000},
892 {0x00016140, 0x10804008, 0x10804008, 0x10804008, 0x10804008},
893 - {0x00016504, 0xb7a00001, 0xb7a00001, 0xb7a00001, 0xb7a00001},
894 + {0x00016504, 0xb7a00000, 0xb7a00000, 0xb7a00001, 0xb7a00001},
895 {0x0001650c, 0xc0000000, 0xc0000000, 0xc0000000, 0xc0000000},
896 {0x00016540, 0x10804008, 0x10804008, 0x10804008, 0x10804008},
897 - {0x00016904, 0xb7a00001, 0xb7a00001, 0xb7a00001, 0xb7a00001},
898 + {0x00016904, 0xb7a00000, 0xb7a00000, 0xb7a00001, 0xb7a00001},
899 {0x0001690c, 0xc0000000, 0xc0000000, 0xc0000000, 0xc0000000},
900 {0x00016940, 0x10804008, 0x10804008, 0x10804008, 0x10804008},
901 };
902 @@ -69,15 +69,15 @@ static const u32 ar955x_1p0_baseband_pos
903 {0x0000a204, 0x005c0ec0, 0x005c0ec4, 0x005c0ec4, 0x005c0ec0},
904 {0x0000a208, 0x00000104, 0x00000104, 0x00000004, 0x00000004},
905 {0x0000a22c, 0x07e26a2f, 0x07e26a2f, 0x01026a2f, 0x01026a2f},
906 - {0x0000a230, 0x0000000a, 0x00000014, 0x00000016, 0x0000000b},
907 + {0x0000a230, 0x0000400a, 0x00004014, 0x00004016, 0x0000400b},
908 {0x0000a234, 0x00000fff, 0x10000fff, 0x10000fff, 0x00000fff},
909 {0x0000a238, 0xffb01018, 0xffb01018, 0xffb01018, 0xffb01018},
910 {0x0000a250, 0x00000000, 0x00000000, 0x00000210, 0x00000108},
911 {0x0000a254, 0x000007d0, 0x00000fa0, 0x00001130, 0x00000898},
912 {0x0000a258, 0x02020002, 0x02020002, 0x02020002, 0x02020002},
913 - {0x0000a25c, 0x01000e0e, 0x01000e0e, 0x01000e0e, 0x01000e0e},
914 + {0x0000a25c, 0x01000e0e, 0x01000e0e, 0x01010e0e, 0x01010e0e},
915 {0x0000a260, 0x0a021501, 0x0a021501, 0x3a021501, 0x3a021501},
916 - {0x0000a264, 0x00000e0e, 0x00000e0e, 0x00000e0e, 0x00000e0e},
917 + {0x0000a264, 0x00000e0e, 0x00000e0e, 0x01000e0e, 0x01000e0e},
918 {0x0000a280, 0x00000007, 0x00000007, 0x0000000b, 0x0000000b},
919 {0x0000a284, 0x00000000, 0x00000000, 0x00000010, 0x00000010},
920 {0x0000a288, 0x00000110, 0x00000110, 0x00000110, 0x00000110},
921 @@ -125,7 +125,7 @@ static const u32 ar955x_1p0_radio_core[]
922 {0x00016094, 0x00000000},
923 {0x000160a0, 0x0a108ffe},
924 {0x000160a4, 0x812fc370},
925 - {0x000160a8, 0x423c8000},
926 + {0x000160a8, 0x423c8100},
927 {0x000160b4, 0x92480080},
928 {0x000160c0, 0x006db6d0},
929 {0x000160c4, 0x6db6db60},
930 @@ -134,7 +134,7 @@ static const u32 ar955x_1p0_radio_core[]
931 {0x00016100, 0x11999601},
932 {0x00016108, 0x00080010},
933 {0x00016144, 0x02084080},
934 - {0x00016148, 0x000080c0},
935 + {0x00016148, 0x00008040},
936 {0x00016280, 0x01800804},
937 {0x00016284, 0x00038dc5},
938 {0x00016288, 0x00000000},
939 @@ -178,7 +178,7 @@ static const u32 ar955x_1p0_radio_core[]
940 {0x00016500, 0x11999601},
941 {0x00016508, 0x00080010},
942 {0x00016544, 0x02084080},
943 - {0x00016548, 0x000080c0},
944 + {0x00016548, 0x00008040},
945 {0x00016780, 0x00000000},
946 {0x00016784, 0x00000000},
947 {0x00016788, 0x00400705},
948 @@ -218,7 +218,7 @@ static const u32 ar955x_1p0_radio_core[]
949 {0x00016900, 0x11999601},
950 {0x00016908, 0x00080010},
951 {0x00016944, 0x02084080},
952 - {0x00016948, 0x000080c0},
953 + {0x00016948, 0x00008040},
954 {0x00016b80, 0x00000000},
955 {0x00016b84, 0x00000000},
956 {0x00016b88, 0x00400705},
957 @@ -245,9 +245,9 @@ static const u32 ar955x_1p0_radio_core[]
958
959 static const u32 ar955x_1p0_modes_xpa_tx_gain_table[][9] = {
960 /* Addr 5G_HT20_L 5G_HT40_L 5G_HT20_M 5G_HT40_M 5G_HT20_H 5G_HT40_H 2G_HT40 2G_HT20 */
961 - {0x0000a2dc, 0xffffaaaa, 0xffffaaaa, 0xffffaaaa, 0xffffaaaa, 0xffffaaaa, 0xffffaaaa, 0xfffd5aaa, 0xfffd5aaa},
962 - {0x0000a2e0, 0xffffcccc, 0xffffcccc, 0xffffcccc, 0xffffcccc, 0xffffcccc, 0xffffcccc, 0xfffe9ccc, 0xfffe9ccc},
963 - {0x0000a2e4, 0xfffff0f0, 0xfffff0f0, 0xfffff0f0, 0xfffff0f0, 0xfffff0f0, 0xfffff0f0, 0xffffe0f0, 0xffffe0f0},
964 + {0x0000a2dc, 0xffff6aaa, 0xffff6aaa, 0xffff6aaa, 0xffff6aaa, 0xffff6aaa, 0xffff6aaa, 0xfffd5aaa, 0xfffd5aaa},
965 + {0x0000a2e0, 0xfffdcccc, 0xfffdcccc, 0xfffdcccc, 0xfffdcccc, 0xfffdcccc, 0xfffdcccc, 0xfffe9ccc, 0xfffe9ccc},
966 + {0x0000a2e4, 0xffe3b0f0, 0xffe3b0f0, 0xffe3b0f0, 0xffe3b0f0, 0xffe3b0f0, 0xffe3b0f0, 0xffffe0f0, 0xffffe0f0},
967 {0x0000a2e8, 0xffffff00, 0xffffff00, 0xffffff00, 0xffffff00, 0xffffff00, 0xffffff00, 0xfffcff00, 0xfffcff00},
968 {0x0000a410, 0x000050de, 0x000050de, 0x000050de, 0x000050de, 0x000050de, 0x000050de, 0x000050da, 0x000050da},
969 {0x0000a500, 0x00000003, 0x00000003, 0x00000003, 0x00000003, 0x00000003, 0x00000003, 0x00000000, 0x00000000},
970 @@ -256,63 +256,63 @@ static const u32 ar955x_1p0_modes_xpa_tx
971 {0x0000a50c, 0x0c00000b, 0x0c00000b, 0x0c00000b, 0x0c00000b, 0x0c00000b, 0x0c00000b, 0x0c000006, 0x0c000006},
972 {0x0000a510, 0x1000000d, 0x1000000d, 0x1000000d, 0x1000000d, 0x1000000d, 0x1000000d, 0x0f00000a, 0x0f00000a},
973 {0x0000a514, 0x14000011, 0x14000011, 0x14000011, 0x14000011, 0x14000011, 0x14000011, 0x1300000c, 0x1300000c},
974 - {0x0000a518, 0x19004008, 0x19004008, 0x19004008, 0x19004008, 0x18004008, 0x18004008, 0x1700000e, 0x1700000e},
975 - {0x0000a51c, 0x1d00400a, 0x1d00400a, 0x1d00400a, 0x1d00400a, 0x1c00400a, 0x1c00400a, 0x1b000064, 0x1b000064},
976 - {0x0000a520, 0x230020a2, 0x230020a2, 0x210020a2, 0x210020a2, 0x200020a2, 0x200020a2, 0x1f000242, 0x1f000242},
977 - {0x0000a524, 0x2500006e, 0x2500006e, 0x2500006e, 0x2500006e, 0x2400006e, 0x2400006e, 0x23000229, 0x23000229},
978 - {0x0000a528, 0x29022221, 0x29022221, 0x28022221, 0x28022221, 0x27022221, 0x27022221, 0x270002a2, 0x270002a2},
979 - {0x0000a52c, 0x2d00062a, 0x2d00062a, 0x2c00062a, 0x2c00062a, 0x2a00062a, 0x2a00062a, 0x2c001203, 0x2c001203},
980 - {0x0000a530, 0x340220a5, 0x340220a5, 0x320220a5, 0x320220a5, 0x2f0220a5, 0x2f0220a5, 0x30001803, 0x30001803},
981 - {0x0000a534, 0x380022c5, 0x380022c5, 0x350022c5, 0x350022c5, 0x320022c5, 0x320022c5, 0x33000881, 0x33000881},
982 - {0x0000a538, 0x3b002486, 0x3b002486, 0x39002486, 0x39002486, 0x36002486, 0x36002486, 0x38001809, 0x38001809},
983 - {0x0000a53c, 0x3f00248a, 0x3f00248a, 0x3d00248a, 0x3d00248a, 0x3a00248a, 0x3a00248a, 0x3a000814, 0x3a000814},
984 - {0x0000a540, 0x4202242c, 0x4202242c, 0x4102242c, 0x4102242c, 0x3f02242c, 0x3f02242c, 0x3f001a0c, 0x3f001a0c},
985 - {0x0000a544, 0x490044c6, 0x490044c6, 0x460044c6, 0x460044c6, 0x420044c6, 0x420044c6, 0x43001a0e, 0x43001a0e},
986 - {0x0000a548, 0x4d024485, 0x4d024485, 0x4a024485, 0x4a024485, 0x46024485, 0x46024485, 0x46001812, 0x46001812},
987 - {0x0000a54c, 0x51044483, 0x51044483, 0x4e044483, 0x4e044483, 0x4a044483, 0x4a044483, 0x49001884, 0x49001884},
988 - {0x0000a550, 0x5404a40c, 0x5404a40c, 0x5204a40c, 0x5204a40c, 0x4d04a40c, 0x4d04a40c, 0x4d001e84, 0x4d001e84},
989 - {0x0000a554, 0x57024632, 0x57024632, 0x55024632, 0x55024632, 0x52024632, 0x52024632, 0x50001e69, 0x50001e69},
990 - {0x0000a558, 0x5c00a634, 0x5c00a634, 0x5900a634, 0x5900a634, 0x5600a634, 0x5600a634, 0x550006f4, 0x550006f4},
991 - {0x0000a55c, 0x5f026832, 0x5f026832, 0x5d026832, 0x5d026832, 0x5a026832, 0x5a026832, 0x59000ad3, 0x59000ad3},
992 - {0x0000a560, 0x6602b012, 0x6602b012, 0x6202b012, 0x6202b012, 0x5d02b012, 0x5d02b012, 0x5e000ad5, 0x5e000ad5},
993 - {0x0000a564, 0x6e02d0e1, 0x6e02d0e1, 0x6802d0e1, 0x6802d0e1, 0x6002d0e1, 0x6002d0e1, 0x61001ced, 0x61001ced},
994 - {0x0000a568, 0x7202b4c4, 0x7202b4c4, 0x6c02b4c4, 0x6c02b4c4, 0x6502b4c4, 0x6502b4c4, 0x660018d4, 0x660018d4},
995 - {0x0000a56c, 0x75007894, 0x75007894, 0x70007894, 0x70007894, 0x6b007894, 0x6b007894, 0x660018d4, 0x660018d4},
996 - {0x0000a570, 0x7b025c74, 0x7b025c74, 0x75025c74, 0x75025c74, 0x70025c74, 0x70025c74, 0x660018d4, 0x660018d4},
997 - {0x0000a574, 0x8300bcb5, 0x8300bcb5, 0x7a00bcb5, 0x7a00bcb5, 0x7600bcb5, 0x7600bcb5, 0x660018d4, 0x660018d4},
998 - {0x0000a578, 0x8a04dc74, 0x8a04dc74, 0x7f04dc74, 0x7f04dc74, 0x7c04dc74, 0x7c04dc74, 0x660018d4, 0x660018d4},
999 - {0x0000a57c, 0x8a04dc74, 0x8a04dc74, 0x7f04dc74, 0x7f04dc74, 0x7c04dc74, 0x7c04dc74, 0x660018d4, 0x660018d4},
1000 + {0x0000a518, 0x1700002b, 0x1700002b, 0x1700002b, 0x1700002b, 0x1600002b, 0x1600002b, 0x1700000e, 0x1700000e},
1001 + {0x0000a51c, 0x1b00002d, 0x1b00002d, 0x1b00002d, 0x1b00002d, 0x1a00002d, 0x1a00002d, 0x1b000064, 0x1b000064},
1002 + {0x0000a520, 0x20000031, 0x20000031, 0x1f000031, 0x1f000031, 0x1e000031, 0x1e000031, 0x1f000242, 0x1f000242},
1003 + {0x0000a524, 0x24000051, 0x24000051, 0x23000051, 0x23000051, 0x23000051, 0x23000051, 0x23000229, 0x23000229},
1004 + {0x0000a528, 0x27000071, 0x27000071, 0x27000071, 0x27000071, 0x26000071, 0x26000071, 0x270002a2, 0x270002a2},
1005 + {0x0000a52c, 0x2b000092, 0x2b000092, 0x2b000092, 0x2b000092, 0x2b000092, 0x2b000092, 0x2c001203, 0x2c001203},
1006 + {0x0000a530, 0x3000028c, 0x3000028c, 0x2f00028c, 0x2f00028c, 0x2e00028c, 0x2e00028c, 0x30001803, 0x30001803},
1007 + {0x0000a534, 0x34000290, 0x34000290, 0x33000290, 0x33000290, 0x32000290, 0x32000290, 0x33000881, 0x33000881},
1008 + {0x0000a538, 0x37000292, 0x37000292, 0x36000292, 0x36000292, 0x35000292, 0x35000292, 0x38001809, 0x38001809},
1009 + {0x0000a53c, 0x3b02028d, 0x3b02028d, 0x3a02028d, 0x3a02028d, 0x3902028d, 0x3902028d, 0x3a000814, 0x3a000814},
1010 + {0x0000a540, 0x3f020291, 0x3f020291, 0x3e020291, 0x3e020291, 0x3d020291, 0x3d020291, 0x3f001a0c, 0x3f001a0c},
1011 + {0x0000a544, 0x44020490, 0x44020490, 0x43020490, 0x43020490, 0x42020490, 0x42020490, 0x43001a0e, 0x43001a0e},
1012 + {0x0000a548, 0x48020492, 0x48020492, 0x47020492, 0x47020492, 0x46020492, 0x46020492, 0x46001812, 0x46001812},
1013 + {0x0000a54c, 0x4c020692, 0x4c020692, 0x4b020692, 0x4b020692, 0x4a020692, 0x4a020692, 0x49001884, 0x49001884},
1014 + {0x0000a550, 0x50020892, 0x50020892, 0x4f020892, 0x4f020892, 0x4e020892, 0x4e020892, 0x4d001e84, 0x4d001e84},
1015 + {0x0000a554, 0x53040891, 0x53040891, 0x53040891, 0x53040891, 0x52040891, 0x52040891, 0x50001e69, 0x50001e69},
1016 + {0x0000a558, 0x58040893, 0x58040893, 0x57040893, 0x57040893, 0x56040893, 0x56040893, 0x550006f4, 0x550006f4},
1017 + {0x0000a55c, 0x5c0408b4, 0x5c0408b4, 0x5a0408b4, 0x5a0408b4, 0x5a0408b4, 0x5a0408b4, 0x59000ad3, 0x59000ad3},
1018 + {0x0000a560, 0x610408b6, 0x610408b6, 0x5e0408b6, 0x5e0408b6, 0x5e0408b6, 0x5e0408b6, 0x5e000ad5, 0x5e000ad5},
1019 + {0x0000a564, 0x670408f6, 0x670408f6, 0x620408f6, 0x620408f6, 0x620408f6, 0x620408f6, 0x61001ced, 0x61001ced},
1020 + {0x0000a568, 0x6a040cf6, 0x6a040cf6, 0x66040cf6, 0x66040cf6, 0x66040cf6, 0x66040cf6, 0x660018d4, 0x660018d4},
1021 + {0x0000a56c, 0x6d040d76, 0x6d040d76, 0x6a040d76, 0x6a040d76, 0x6a040d76, 0x6a040d76, 0x660018d4, 0x660018d4},
1022 + {0x0000a570, 0x70060db6, 0x70060db6, 0x6e060db6, 0x6e060db6, 0x6e060db6, 0x6e060db6, 0x660018d4, 0x660018d4},
1023 + {0x0000a574, 0x730a0df6, 0x730a0df6, 0x720a0df6, 0x720a0df6, 0x720a0df6, 0x720a0df6, 0x660018d4, 0x660018d4},
1024 + {0x0000a578, 0x770a13f6, 0x770a13f6, 0x760a13f6, 0x760a13f6, 0x760a13f6, 0x760a13f6, 0x660018d4, 0x660018d4},
1025 + {0x0000a57c, 0x770a13f6, 0x770a13f6, 0x760a13f6, 0x760a13f6, 0x760a13f6, 0x760a13f6, 0x660018d4, 0x660018d4},
1026 {0x0000a600, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
1027 {0x0000a604, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
1028 {0x0000a608, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
1029 - {0x0000a60c, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x03804000, 0x03804000},
1030 - {0x0000a610, 0x04c08c01, 0x04c08c01, 0x04808b01, 0x04808b01, 0x04808a01, 0x04808a01, 0x0300ca02, 0x0300ca02},
1031 - {0x0000a614, 0x00c0c303, 0x00c0c303, 0x00c0c303, 0x00c0c303, 0x00c0c303, 0x00c0c303, 0x00000e04, 0x00000e04},
1032 - {0x0000a618, 0x04010c01, 0x04010c01, 0x03c10b01, 0x03c10b01, 0x03810a01, 0x03810a01, 0x03014000, 0x03014000},
1033 - {0x0000a61c, 0x03814e05, 0x03814e05, 0x03414d05, 0x03414d05, 0x03414d05, 0x03414d05, 0x00000000, 0x00000000},
1034 - {0x0000a620, 0x04010303, 0x04010303, 0x03c10303, 0x03c10303, 0x03810303, 0x03810303, 0x00000000, 0x00000000},
1035 - {0x0000a624, 0x03814e05, 0x03814e05, 0x03414d05, 0x03414d05, 0x03414d05, 0x03414d05, 0x03014000, 0x03014000},
1036 - {0x0000a628, 0x00c0c000, 0x00c0c000, 0x00c0c000, 0x00c0c000, 0x00c0c000, 0x00c0c000, 0x03804c05, 0x03804c05},
1037 - {0x0000a62c, 0x00c0c303, 0x00c0c303, 0x00c0c303, 0x00c0c303, 0x00c0c303, 0x00c0c303, 0x0701de06, 0x0701de06},
1038 - {0x0000a630, 0x03418000, 0x03418000, 0x03018000, 0x03018000, 0x02c18000, 0x02c18000, 0x07819c07, 0x07819c07},
1039 - {0x0000a634, 0x03815004, 0x03815004, 0x03414f04, 0x03414f04, 0x03414e04, 0x03414e04, 0x0701dc07, 0x0701dc07},
1040 - {0x0000a638, 0x03005302, 0x03005302, 0x02c05202, 0x02c05202, 0x02805202, 0x02805202, 0x0701dc07, 0x0701dc07},
1041 - {0x0000a63c, 0x04c09302, 0x04c09302, 0x04809202, 0x04809202, 0x04809202, 0x04809202, 0x0701dc07, 0x0701dc07},
1042 - {0x0000b2dc, 0xffffaaaa, 0xffffaaaa, 0xffffaaaa, 0xffffaaaa, 0xffffaaaa, 0xffffaaaa, 0xfffd5aaa, 0xfffd5aaa},
1043 - {0x0000b2e0, 0xffffcccc, 0xffffcccc, 0xffffcccc, 0xffffcccc, 0xffffcccc, 0xffffcccc, 0xfffe9ccc, 0xfffe9ccc},
1044 - {0x0000b2e4, 0xfffff0f0, 0xfffff0f0, 0xfffff0f0, 0xfffff0f0, 0xfffff0f0, 0xfffff0f0, 0xffffe0f0, 0xffffe0f0},
1045 + {0x0000a60c, 0x02c04b01, 0x02c04b01, 0x02c04b01, 0x02c04b01, 0x02c04b01, 0x02c04b01, 0x03804000, 0x03804000},
1046 + {0x0000a610, 0x04008b01, 0x04008b01, 0x04008b01, 0x04008b01, 0x03c08b01, 0x03c08b01, 0x0300ca02, 0x0300ca02},
1047 + {0x0000a614, 0x05811403, 0x05811403, 0x05411303, 0x05411303, 0x05411303, 0x05411303, 0x00000e04, 0x00000e04},
1048 + {0x0000a618, 0x05811604, 0x05811604, 0x05411504, 0x05411504, 0x05411504, 0x05411504, 0x03014000, 0x03014000},
1049 + {0x0000a61c, 0x05811604, 0x05811604, 0x05411504, 0x05411504, 0x05411504, 0x05411504, 0x00000000, 0x00000000},
1050 + {0x0000a620, 0x05811604, 0x05811604, 0x05411504, 0x05411504, 0x05411504, 0x05411504, 0x00000000, 0x00000000},
1051 + {0x0000a624, 0x05811604, 0x05811604, 0x05411504, 0x05411504, 0x05411504, 0x05411504, 0x03014000, 0x03014000},
1052 + {0x0000a628, 0x05811604, 0x05811604, 0x05411504, 0x05411504, 0x05411504, 0x05411504, 0x03804c05, 0x03804c05},
1053 + {0x0000a62c, 0x06815604, 0x06815604, 0x06415504, 0x06415504, 0x06015504, 0x06015504, 0x0701de06, 0x0701de06},
1054 + {0x0000a630, 0x07819a05, 0x07819a05, 0x07419905, 0x07419905, 0x07019805, 0x07019805, 0x07819c07, 0x07819c07},
1055 + {0x0000a634, 0x07819e06, 0x07819e06, 0x07419d06, 0x07419d06, 0x07019c06, 0x07019c06, 0x0701dc07, 0x0701dc07},
1056 + {0x0000a638, 0x07819e06, 0x07819e06, 0x07419d06, 0x07419d06, 0x07019c06, 0x07019c06, 0x0701dc07, 0x0701dc07},
1057 + {0x0000a63c, 0x07819e06, 0x07819e06, 0x07419d06, 0x07419d06, 0x07019c06, 0x07019c06, 0x0701dc07, 0x0701dc07},
1058 + {0x0000b2dc, 0xffff6aaa, 0xffff6aaa, 0xffff6aaa, 0xffff6aaa, 0xffff6aaa, 0xffff6aaa, 0xfffd5aaa, 0xfffd5aaa},
1059 + {0x0000b2e0, 0xfffdcccc, 0xfffdcccc, 0xfffdcccc, 0xfffdcccc, 0xfffdcccc, 0xfffdcccc, 0xfffe9ccc, 0xfffe9ccc},
1060 + {0x0000b2e4, 0xffe3b0f0, 0xffe3b0f0, 0xffe3b0f0, 0xffe3b0f0, 0xffe3b0f0, 0xffe3b0f0, 0xffffe0f0, 0xffffe0f0},
1061 {0x0000b2e8, 0xffffff00, 0xffffff00, 0xffffff00, 0xffffff00, 0xffffff00, 0xffffff00, 0xfffcff00, 0xfffcff00},
1062 - {0x0000c2dc, 0xffffaaaa, 0xffffaaaa, 0xffffaaaa, 0xffffaaaa, 0xffffaaaa, 0xffffaaaa, 0xfffd5aaa, 0xfffd5aaa},
1063 - {0x0000c2e0, 0xffffcccc, 0xffffcccc, 0xffffcccc, 0xffffcccc, 0xffffcccc, 0xffffcccc, 0xfffe9ccc, 0xfffe9ccc},
1064 - {0x0000c2e4, 0xfffff0f0, 0xfffff0f0, 0xfffff0f0, 0xfffff0f0, 0xfffff0f0, 0xfffff0f0, 0xffffe0f0, 0xffffe0f0},
1065 + {0x0000c2dc, 0xffff6aaa, 0xffff6aaa, 0xffff6aaa, 0xffff6aaa, 0xffff6aaa, 0xffff6aaa, 0xfffd5aaa, 0xfffd5aaa},
1066 + {0x0000c2e0, 0xfffdcccc, 0xfffdcccc, 0xfffdcccc, 0xfffdcccc, 0xfffdcccc, 0xfffdcccc, 0xfffe9ccc, 0xfffe9ccc},
1067 + {0x0000c2e4, 0xffe3b0f0, 0xffe3b0f0, 0xffe3b0f0, 0xffe3b0f0, 0xffe3b0f0, 0xffe3b0f0, 0xffffe0f0, 0xffffe0f0},
1068 {0x0000c2e8, 0xffffff00, 0xffffff00, 0xffffff00, 0xffffff00, 0xffffff00, 0xffffff00, 0xfffcff00, 0xfffcff00},
1069 {0x00016044, 0x056db2d4, 0x056db2d4, 0x056db2d4, 0x056db2d4, 0x056db2d4, 0x056db2d4, 0x010002d4, 0x010002d4},
1070 - {0x00016048, 0x62482401, 0x62482401, 0x62482401, 0x62482401, 0x62482401, 0x62482401, 0x66482401, 0x66482401},
1071 + {0x00016048, 0x66482401, 0x66482401, 0x66482401, 0x66482401, 0x66482401, 0x66482401, 0x66482401, 0x66482401},
1072 {0x00016280, 0x01801e84, 0x01801e84, 0x01801e84, 0x01801e84, 0x01801e84, 0x01801e84, 0x01808e84, 0x01808e84},
1073 {0x00016444, 0x056db2d4, 0x056db2d4, 0x056db2d4, 0x056db2d4, 0x056db2d4, 0x056db2d4, 0x010002d4, 0x010002d4},
1074 - {0x00016448, 0x62482401, 0x62482401, 0x62482401, 0x62482401, 0x62482401, 0x62482401, 0x66482401, 0x66482401},
1075 + {0x00016448, 0x66482401, 0x66482401, 0x66482401, 0x66482401, 0x66482401, 0x66482401, 0x66482401, 0x66482401},
1076 {0x00016844, 0x056db2d4, 0x056db2d4, 0x056db2d4, 0x056db2d4, 0x056db2d4, 0x056db2d4, 0x010002d4, 0x010002d4},
1077 - {0x00016848, 0x62482401, 0x62482401, 0x62482401, 0x62482401, 0x62482401, 0x62482401, 0x66482401, 0x66482401},
1078 + {0x00016848, 0x66482401, 0x66482401, 0x66482401, 0x66482401, 0x66482401, 0x66482401, 0x66482401, 0x66482401},
1079 };
1080
1081 static const u32 ar955x_1p0_mac_core[][2] = {
1082 @@ -846,7 +846,7 @@ static const u32 ar955x_1p0_baseband_cor
1083 {0x0000a44c, 0x00000001},
1084 {0x0000a450, 0x00010000},
1085 {0x0000a458, 0x00000000},
1086 - {0x0000a644, 0x3fad9d74},
1087 + {0x0000a644, 0xbfad9d74},
1088 {0x0000a648, 0x0048060a},
1089 {0x0000a64c, 0x00003c37},
1090 {0x0000a670, 0x03020100},
1091 @@ -1277,7 +1277,7 @@ static const u32 ar955x_1p0_modes_fast_c
1092 {0x0000801c, 0x148ec02b, 0x148ec057},
1093 {0x00008318, 0x000044c0, 0x00008980},
1094 {0x00009e00, 0x0372131c, 0x0372131c},
1095 - {0x0000a230, 0x0000000b, 0x00000016},
1096 + {0x0000a230, 0x0000400b, 0x00004016},
1097 {0x0000a254, 0x00000898, 0x00001130},
1098 };
1099
1100 --- a/drivers/net/wireless/ath/ath9k/htc_hst.c
1101 +++ b/drivers/net/wireless/ath/ath9k/htc_hst.c
1102 @@ -347,6 +347,8 @@ void ath9k_htc_txcompletion_cb(struct ht
1103 endpoint->ep_callbacks.tx(endpoint->ep_callbacks.priv,
1104 skb, htc_hdr->endpoint_id,
1105 txok);
1106 + } else {
1107 + kfree_skb(skb);
1108 }
1109 }
1110
1111 --- a/net/wireless/reg.c
1112 +++ b/net/wireless/reg.c
1113 @@ -142,8 +142,8 @@ static void rcu_free_regdom(const struct
1114
1115 static struct regulatory_request *get_last_request(void)
1116 {
1117 - return rcu_dereference_protected(last_request,
1118 - lockdep_is_held(&reg_mutex));
1119 + return rcu_dereference_check(last_request,
1120 + lockdep_is_held(&reg_mutex));
1121 }
1122
1123 /* Used to queue up regulatory hints */
1124 @@ -1125,7 +1125,9 @@ static bool is_ht40_allowed(struct ieee8
1125 if (chan->flags & IEEE80211_CHAN_DISABLED)
1126 return false;
1127 /* This would happen when regulatory rules disallow HT40 completely */
1128 - return !(chan->flags & IEEE80211_CHAN_NO_HT40);
1129 + if ((chan->flags & IEEE80211_CHAN_NO_HT40) == IEEE80211_CHAN_NO_HT40)
1130 + return false;
1131 + return true;
1132 }
1133
1134 static void reg_process_ht_flags_channel(struct wiphy *wiphy,
1135 @@ -1850,7 +1852,7 @@ static void restore_regulatory_settings(
1136 mutex_lock(&cfg80211_mutex);
1137 mutex_lock(&reg_mutex);
1138
1139 - reset_regdomains(true, cfg80211_world_regdom);
1140 + reset_regdomains(true, &world_regdom);
1141 restore_alpha2(alpha2, reset_user);
1142
1143 /*
1144 @@ -2251,14 +2253,21 @@ int set_regdom(const struct ieee80211_re
1145
1146 int reg_device_uevent(struct device *dev, struct kobj_uevent_env *env)
1147 {
1148 - struct regulatory_request *lr = get_last_request();
1149 + struct regulatory_request *lr;
1150 + u8 alpha2[2];
1151 + bool add = false;
1152
1153 + rcu_read_lock();
1154 + lr = get_last_request();
1155 if (lr && !lr->processed) {
1156 - if (add_uevent_var(env, "COUNTRY=%c%c",
1157 - lr->alpha2[0], lr->alpha2[1]))
1158 - return -ENOMEM;
1159 + memcpy(alpha2, lr->alpha2, 2);
1160 + add = true;
1161 }
1162 + rcu_read_unlock();
1163
1164 + if (add)
1165 + return add_uevent_var(env, "COUNTRY=%c%c",
1166 + alpha2[0], alpha2[1]);
1167 return 0;
1168 }
1169
1170 --- a/drivers/net/wireless/ath/ath9k/ar9003_calib.c
1171 +++ b/drivers/net/wireless/ath/ath9k/ar9003_calib.c
1172 @@ -967,7 +967,7 @@ static bool ar9003_hw_init_cal(struct at
1173 struct ath9k_hw_cal_data *caldata = ah->caldata;
1174 bool txiqcal_done = false, txclcal_done = false;
1175 bool is_reusable = true, status = true;
1176 - bool run_rtt_cal = false, run_agc_cal;
1177 + bool run_rtt_cal = false, run_agc_cal, sep_iq_cal = false;
1178 bool rtt = !!(ah->caps.hw_caps & ATH9K_HW_CAP_RTT);
1179 u32 agc_ctrl = 0, agc_supp_cals = AR_PHY_AGC_CONTROL_OFFSET_CAL |
1180 AR_PHY_AGC_CONTROL_FLTR_CAL |
1181 @@ -1013,7 +1013,8 @@ static bool ar9003_hw_init_cal(struct at
1182 }
1183 }
1184
1185 - if (!(ah->enabled_cals & TX_IQ_CAL))
1186 + if ((IS_CHAN_HALF_RATE(chan) || IS_CHAN_QUARTER_RATE(chan)) ||
1187 + !(ah->enabled_cals & TX_IQ_CAL))
1188 goto skip_tx_iqcal;
1189
1190 /* Do Tx IQ Calibration */
1191 @@ -1033,21 +1034,22 @@ static bool ar9003_hw_init_cal(struct at
1192 REG_CLR_BIT(ah, AR_PHY_TX_IQCAL_CONTROL_0,
1193 AR_PHY_TX_IQCAL_CONTROL_0_ENABLE_TXIQ_CAL);
1194 txiqcal_done = run_agc_cal = true;
1195 - goto skip_tx_iqcal;
1196 - } else if (caldata && !caldata->done_txiqcal_once)
1197 + } else if (caldata && !caldata->done_txiqcal_once) {
1198 run_agc_cal = true;
1199 + sep_iq_cal = true;
1200 + }
1201
1202 +skip_tx_iqcal:
1203 if (ath9k_hw_mci_is_enabled(ah) && IS_CHAN_2GHZ(chan) && run_agc_cal)
1204 ar9003_mci_init_cal_req(ah, &is_reusable);
1205
1206 - if (!(IS_CHAN_HALF_RATE(chan) || IS_CHAN_QUARTER_RATE(chan))) {
1207 + if (sep_iq_cal) {
1208 txiqcal_done = ar9003_hw_tx_iq_cal_run(ah);
1209 REG_WRITE(ah, AR_PHY_ACTIVE, AR_PHY_ACTIVE_DIS);
1210 udelay(5);
1211 REG_WRITE(ah, AR_PHY_ACTIVE, AR_PHY_ACTIVE_EN);
1212 }
1213
1214 -skip_tx_iqcal:
1215 if (run_agc_cal || !(ah->ah_flags & AH_FASTCC)) {
1216 /* Calibrate the AGC */
1217 REG_WRITE(ah, AR_PHY_AGC_CONTROL,
1218 --- a/drivers/net/wireless/ath/ath9k/ar9003_2p2_initvals.h
1219 +++ b/drivers/net/wireless/ath/ath9k/ar9003_2p2_initvals.h
1220 @@ -744,6 +744,186 @@ static const u32 ar9300Modes_high_ob_db_
1221 {0x00016868, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
1222 };
1223
1224 +static const u32 ar9300Modes_mixed_ob_db_tx_gain_table_2p2[][5] = {
1225 + /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
1226 + {0x0000a2dc, 0x00033800, 0x00033800, 0x03aaa352, 0x03aaa352},
1227 + {0x0000a2e0, 0x0003c000, 0x0003c000, 0x03ccc584, 0x03ccc584},
1228 + {0x0000a2e4, 0x03fc0000, 0x03fc0000, 0x03f0f800, 0x03f0f800},
1229 + {0x0000a2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
1230 + {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d9, 0x000050d9},
1231 + {0x0000a500, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
1232 + {0x0000a504, 0x06000003, 0x06000003, 0x04000002, 0x04000002},
1233 + {0x0000a508, 0x0a000020, 0x0a000020, 0x08000004, 0x08000004},
1234 + {0x0000a50c, 0x10000023, 0x10000023, 0x0b000200, 0x0b000200},
1235 + {0x0000a510, 0x16000220, 0x16000220, 0x0f000202, 0x0f000202},
1236 + {0x0000a514, 0x1c000223, 0x1c000223, 0x11000400, 0x11000400},
1237 + {0x0000a518, 0x21002220, 0x21002220, 0x15000402, 0x15000402},
1238 + {0x0000a51c, 0x27002223, 0x27002223, 0x19000404, 0x19000404},
1239 + {0x0000a520, 0x2b022220, 0x2b022220, 0x1b000603, 0x1b000603},
1240 + {0x0000a524, 0x2f022222, 0x2f022222, 0x1f000a02, 0x1f000a02},
1241 + {0x0000a528, 0x34022225, 0x34022225, 0x23000a04, 0x23000a04},
1242 + {0x0000a52c, 0x3a02222a, 0x3a02222a, 0x26000a20, 0x26000a20},
1243 + {0x0000a530, 0x3e02222c, 0x3e02222c, 0x2a000e20, 0x2a000e20},
1244 + {0x0000a534, 0x4202242a, 0x4202242a, 0x2e000e22, 0x2e000e22},
1245 + {0x0000a538, 0x4702244a, 0x4702244a, 0x31000e24, 0x31000e24},
1246 + {0x0000a53c, 0x4b02244c, 0x4b02244c, 0x34001640, 0x34001640},
1247 + {0x0000a540, 0x4e02246c, 0x4e02246c, 0x38001660, 0x38001660},
1248 + {0x0000a544, 0x52022470, 0x52022470, 0x3b001861, 0x3b001861},
1249 + {0x0000a548, 0x55022490, 0x55022490, 0x3e001a81, 0x3e001a81},
1250 + {0x0000a54c, 0x59022492, 0x59022492, 0x42001a83, 0x42001a83},
1251 + {0x0000a550, 0x5d022692, 0x5d022692, 0x44001c84, 0x44001c84},
1252 + {0x0000a554, 0x61022892, 0x61022892, 0x48001ce3, 0x48001ce3},
1253 + {0x0000a558, 0x65024890, 0x65024890, 0x4c001ce5, 0x4c001ce5},
1254 + {0x0000a55c, 0x69024892, 0x69024892, 0x50001ce9, 0x50001ce9},
1255 + {0x0000a560, 0x6e024c92, 0x6e024c92, 0x54001ceb, 0x54001ceb},
1256 + {0x0000a564, 0x74026e92, 0x74026e92, 0x56001eec, 0x56001eec},
1257 + {0x0000a568, 0x74026e92, 0x74026e92, 0x56001eec, 0x56001eec},
1258 + {0x0000a56c, 0x74026e92, 0x74026e92, 0x56001eec, 0x56001eec},
1259 + {0x0000a570, 0x74026e92, 0x74026e92, 0x56001eec, 0x56001eec},
1260 + {0x0000a574, 0x74026e92, 0x74026e92, 0x56001eec, 0x56001eec},
1261 + {0x0000a578, 0x74026e92, 0x74026e92, 0x56001eec, 0x56001eec},
1262 + {0x0000a57c, 0x74026e92, 0x74026e92, 0x56001eec, 0x56001eec},
1263 + {0x0000a580, 0x00800000, 0x00800000, 0x00800000, 0x00800000},
1264 + {0x0000a584, 0x06800003, 0x06800003, 0x04800002, 0x04800002},
1265 + {0x0000a588, 0x0a800020, 0x0a800020, 0x08800004, 0x08800004},
1266 + {0x0000a58c, 0x10800023, 0x10800023, 0x0b800200, 0x0b800200},
1267 + {0x0000a590, 0x16800220, 0x16800220, 0x0f800202, 0x0f800202},
1268 + {0x0000a594, 0x1c800223, 0x1c800223, 0x11800400, 0x11800400},
1269 + {0x0000a598, 0x21802220, 0x21802220, 0x15800402, 0x15800402},
1270 + {0x0000a59c, 0x27802223, 0x27802223, 0x19800404, 0x19800404},
1271 + {0x0000a5a0, 0x2b822220, 0x2b822220, 0x1b800603, 0x1b800603},
1272 + {0x0000a5a4, 0x2f822222, 0x2f822222, 0x1f800a02, 0x1f800a02},
1273 + {0x0000a5a8, 0x34822225, 0x34822225, 0x23800a04, 0x23800a04},
1274 + {0x0000a5ac, 0x3a82222a, 0x3a82222a, 0x26800a20, 0x26800a20},
1275 + {0x0000a5b0, 0x3e82222c, 0x3e82222c, 0x2a800e20, 0x2a800e20},
1276 + {0x0000a5b4, 0x4282242a, 0x4282242a, 0x2e800e22, 0x2e800e22},
1277 + {0x0000a5b8, 0x4782244a, 0x4782244a, 0x31800e24, 0x31800e24},
1278 + {0x0000a5bc, 0x4b82244c, 0x4b82244c, 0x34801640, 0x34801640},
1279 + {0x0000a5c0, 0x4e82246c, 0x4e82246c, 0x38801660, 0x38801660},
1280 + {0x0000a5c4, 0x52822470, 0x52822470, 0x3b801861, 0x3b801861},
1281 + {0x0000a5c8, 0x55822490, 0x55822490, 0x3e801a81, 0x3e801a81},
1282 + {0x0000a5cc, 0x59822492, 0x59822492, 0x42801a83, 0x42801a83},
1283 + {0x0000a5d0, 0x5d822692, 0x5d822692, 0x44801c84, 0x44801c84},
1284 + {0x0000a5d4, 0x61822892, 0x61822892, 0x48801ce3, 0x48801ce3},
1285 + {0x0000a5d8, 0x65824890, 0x65824890, 0x4c801ce5, 0x4c801ce5},
1286 + {0x0000a5dc, 0x69824892, 0x69824892, 0x50801ce9, 0x50801ce9},
1287 + {0x0000a5e0, 0x6e824c92, 0x6e824c92, 0x54801ceb, 0x54801ceb},
1288 + {0x0000a5e4, 0x74826e92, 0x74826e92, 0x56801eec, 0x56801eec},
1289 + {0x0000a5e8, 0x74826e92, 0x74826e92, 0x56801eec, 0x56801eec},
1290 + {0x0000a5ec, 0x74826e92, 0x74826e92, 0x56801eec, 0x56801eec},
1291 + {0x0000a5f0, 0x74826e92, 0x74826e92, 0x56801eec, 0x56801eec},
1292 + {0x0000a5f4, 0x74826e92, 0x74826e92, 0x56801eec, 0x56801eec},
1293 + {0x0000a5f8, 0x74826e92, 0x74826e92, 0x56801eec, 0x56801eec},
1294 + {0x0000a5fc, 0x74826e92, 0x74826e92, 0x56801eec, 0x56801eec},
1295 + {0x0000a600, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
1296 + {0x0000a604, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
1297 + {0x0000a608, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
1298 + {0x0000a60c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
1299 + {0x0000a610, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
1300 + {0x0000a614, 0x02004000, 0x02004000, 0x01404000, 0x01404000},
1301 + {0x0000a618, 0x02004801, 0x02004801, 0x01404501, 0x01404501},
1302 + {0x0000a61c, 0x02808a02, 0x02808a02, 0x02008501, 0x02008501},
1303 + {0x0000a620, 0x0380ce03, 0x0380ce03, 0x0280ca03, 0x0280ca03},
1304 + {0x0000a624, 0x04411104, 0x04411104, 0x03010c04, 0x03010c04},
1305 + {0x0000a628, 0x04411104, 0x04411104, 0x04014c04, 0x04014c04},
1306 + {0x0000a62c, 0x04411104, 0x04411104, 0x04015005, 0x04015005},
1307 + {0x0000a630, 0x04411104, 0x04411104, 0x04015005, 0x04015005},
1308 + {0x0000a634, 0x04411104, 0x04411104, 0x04015005, 0x04015005},
1309 + {0x0000a638, 0x04411104, 0x04411104, 0x04015005, 0x04015005},
1310 + {0x0000a63c, 0x04411104, 0x04411104, 0x04015005, 0x04015005},
1311 + {0x0000b2dc, 0x00033800, 0x00033800, 0x03aaa352, 0x03aaa352},
1312 + {0x0000b2e0, 0x0003c000, 0x0003c000, 0x03ccc584, 0x03ccc584},
1313 + {0x0000b2e4, 0x03fc0000, 0x03fc0000, 0x03f0f800, 0x03f0f800},
1314 + {0x0000b2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
1315 + {0x0000c2dc, 0x00033800, 0x00033800, 0x03aaa352, 0x03aaa352},
1316 + {0x0000c2e0, 0x0003c000, 0x0003c000, 0x03ccc584, 0x03ccc584},
1317 + {0x0000c2e4, 0x03fc0000, 0x03fc0000, 0x03f0f800, 0x03f0f800},
1318 + {0x0000c2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
1319 + {0x00016044, 0x012492d4, 0x012492d4, 0x056db2e4, 0x056db2e4},
1320 + {0x00016048, 0x66480001, 0x66480001, 0x8e480001, 0x8e480001},
1321 + {0x00016068, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
1322 + {0x00016444, 0x012492d4, 0x012492d4, 0x056db2e4, 0x056db2e4},
1323 + {0x00016448, 0x66480001, 0x66480001, 0x8e480001, 0x8e480001},
1324 + {0x00016468, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
1325 + {0x00016844, 0x012492d4, 0x012492d4, 0x056db2e4, 0x056db2e4},
1326 + {0x00016848, 0x66480001, 0x66480001, 0x8e480001, 0x8e480001},
1327 + {0x00016868, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
1328 +};
1329 +
1330 +static const u32 ar9300Modes_type5_tx_gain_table_2p2[][5] = {
1331 + /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
1332 + {0x0000a2dc, 0x000cfff0, 0x000cfff0, 0x03aaa352, 0x03aaa352},
1333 + {0x0000a2e0, 0x000f0000, 0x000f0000, 0x03ccc584, 0x03ccc584},
1334 + {0x0000a2e4, 0x03f00000, 0x03f00000, 0x03f0f800, 0x03f0f800},
1335 + {0x0000a2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
1336 + {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d9, 0x000050d9},
1337 + {0x0000a500, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
1338 + {0x0000a504, 0x06000003, 0x06000003, 0x04000002, 0x04000002},
1339 + {0x0000a508, 0x0a000020, 0x0a000020, 0x08000004, 0x08000004},
1340 + {0x0000a50c, 0x10000023, 0x10000023, 0x0b000200, 0x0b000200},
1341 + {0x0000a510, 0x15000028, 0x15000028, 0x0f000202, 0x0f000202},
1342 + {0x0000a514, 0x1b00002b, 0x1b00002b, 0x12000400, 0x12000400},
1343 + {0x0000a518, 0x1f020028, 0x1f020028, 0x16000402, 0x16000402},
1344 + {0x0000a51c, 0x2502002b, 0x2502002b, 0x19000404, 0x19000404},
1345 + {0x0000a520, 0x2a04002a, 0x2a04002a, 0x1c000603, 0x1c000603},
1346 + {0x0000a524, 0x2e06002a, 0x2e06002a, 0x21000a02, 0x21000a02},
1347 + {0x0000a528, 0x3302202d, 0x3302202d, 0x25000a04, 0x25000a04},
1348 + {0x0000a52c, 0x3804202c, 0x3804202c, 0x28000a20, 0x28000a20},
1349 + {0x0000a530, 0x3c06202c, 0x3c06202c, 0x2c000e20, 0x2c000e20},
1350 + {0x0000a534, 0x4108202d, 0x4108202d, 0x30000e22, 0x30000e22},
1351 + {0x0000a538, 0x4506402d, 0x4506402d, 0x34000e24, 0x34000e24},
1352 + {0x0000a53c, 0x4906222d, 0x4906222d, 0x38001640, 0x38001640},
1353 + {0x0000a540, 0x4d062231, 0x4d062231, 0x3c001660, 0x3c001660},
1354 + {0x0000a544, 0x50082231, 0x50082231, 0x3f001861, 0x3f001861},
1355 + {0x0000a548, 0x5608422e, 0x5608422e, 0x43001a81, 0x43001a81},
1356 + {0x0000a54c, 0x5e08442e, 0x5e08442e, 0x47001a83, 0x47001a83},
1357 + {0x0000a550, 0x620a4431, 0x620a4431, 0x4a001c84, 0x4a001c84},
1358 + {0x0000a554, 0x640a4432, 0x640a4432, 0x4e001ce3, 0x4e001ce3},
1359 + {0x0000a558, 0x680a4434, 0x680a4434, 0x52001ce5, 0x52001ce5},
1360 + {0x0000a55c, 0x6c0a6434, 0x6c0a6434, 0x56001ce9, 0x56001ce9},
1361 + {0x0000a560, 0x6f0a6633, 0x6f0a6633, 0x5a001ceb, 0x5a001ceb},
1362 + {0x0000a564, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
1363 + {0x0000a568, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
1364 + {0x0000a56c, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
1365 + {0x0000a570, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
1366 + {0x0000a574, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
1367 + {0x0000a578, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
1368 + {0x0000a57c, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
1369 + {0x0000a600, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
1370 + {0x0000a604, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
1371 + {0x0000a608, 0x01804601, 0x01804601, 0x00000000, 0x00000000},
1372 + {0x0000a60c, 0x01804601, 0x01804601, 0x00000000, 0x00000000},
1373 + {0x0000a610, 0x01804601, 0x01804601, 0x00000000, 0x00000000},
1374 + {0x0000a614, 0x01804601, 0x01804601, 0x01404000, 0x01404000},
1375 + {0x0000a618, 0x01804601, 0x01804601, 0x01404501, 0x01404501},
1376 + {0x0000a61c, 0x01804601, 0x01804601, 0x02008501, 0x02008501},
1377 + {0x0000a620, 0x03408d02, 0x03408d02, 0x0280ca03, 0x0280ca03},
1378 + {0x0000a624, 0x0300cc03, 0x0300cc03, 0x03010c04, 0x03010c04},
1379 + {0x0000a628, 0x03410d04, 0x03410d04, 0x04014c04, 0x04014c04},
1380 + {0x0000a62c, 0x03410d04, 0x03410d04, 0x04015005, 0x04015005},
1381 + {0x0000a630, 0x03410d04, 0x03410d04, 0x04015005, 0x04015005},
1382 + {0x0000a634, 0x03410d04, 0x03410d04, 0x04015005, 0x04015005},
1383 + {0x0000a638, 0x03410d04, 0x03410d04, 0x04015005, 0x04015005},
1384 + {0x0000a63c, 0x03410d04, 0x03410d04, 0x04015005, 0x04015005},
1385 + {0x0000b2dc, 0x000cfff0, 0x000cfff0, 0x03aaa352, 0x03aaa352},
1386 + {0x0000b2e0, 0x000f0000, 0x000f0000, 0x03ccc584, 0x03ccc584},
1387 + {0x0000b2e4, 0x03f00000, 0x03f00000, 0x03f0f800, 0x03f0f800},
1388 + {0x0000b2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
1389 + {0x0000c2dc, 0x000cfff0, 0x000cfff0, 0x03aaa352, 0x03aaa352},
1390 + {0x0000c2e0, 0x000f0000, 0x000f0000, 0x03ccc584, 0x03ccc584},
1391 + {0x0000c2e4, 0x03f00000, 0x03f00000, 0x03f0f800, 0x03f0f800},
1392 + {0x0000c2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
1393 + {0x00016044, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4},
1394 + {0x00016048, 0x65240001, 0x65240001, 0x66480001, 0x66480001},
1395 + {0x00016068, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
1396 + {0x00016444, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4},
1397 + {0x00016448, 0x65240001, 0x65240001, 0x66480001, 0x66480001},
1398 + {0x00016468, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
1399 + {0x00016844, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4},
1400 + {0x00016848, 0x65240001, 0x65240001, 0x66480001, 0x66480001},
1401 + {0x00016868, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
1402 +};
1403 +
1404 static const u32 ar9300Common_rx_gain_table_2p2[][2] = {
1405 /* Addr allmodes */
1406 {0x0000a000, 0x00010000},
1407 --- a/drivers/net/wireless/ath/ath9k/ar9003_hw.c
1408 +++ b/drivers/net/wireless/ath/ath9k/ar9003_hw.c
1409 @@ -507,28 +507,59 @@ static void ar9003_tx_gain_table_mode4(s
1410 else if (AR_SREV_9580(ah))
1411 INIT_INI_ARRAY(&ah->iniModesTxGain,
1412 ar9580_1p0_mixed_ob_db_tx_gain_table);
1413 + else
1414 + INIT_INI_ARRAY(&ah->iniModesTxGain,
1415 + ar9300Modes_mixed_ob_db_tx_gain_table_2p2);
1416 +}
1417 +
1418 +static void ar9003_tx_gain_table_mode5(struct ath_hw *ah)
1419 +{
1420 + if (AR_SREV_9485_11(ah))
1421 + INIT_INI_ARRAY(&ah->iniModesTxGain,
1422 + ar9485Modes_green_ob_db_tx_gain_1_1);
1423 + else if (AR_SREV_9340(ah))
1424 + INIT_INI_ARRAY(&ah->iniModesTxGain,
1425 + ar9340Modes_ub124_tx_gain_table_1p0);
1426 + else if (AR_SREV_9580(ah))
1427 + INIT_INI_ARRAY(&ah->iniModesTxGain,
1428 + ar9580_1p0_type5_tx_gain_table);
1429 + else if (AR_SREV_9300_22(ah))
1430 + INIT_INI_ARRAY(&ah->iniModesTxGain,
1431 + ar9300Modes_type5_tx_gain_table_2p2);
1432 +}
1433 +
1434 +static void ar9003_tx_gain_table_mode6(struct ath_hw *ah)
1435 +{
1436 + if (AR_SREV_9340(ah))
1437 + INIT_INI_ARRAY(&ah->iniModesTxGain,
1438 + ar9340Modes_low_ob_db_and_spur_tx_gain_table_1p0);
1439 + else if (AR_SREV_9485_11(ah))
1440 + INIT_INI_ARRAY(&ah->iniModesTxGain,
1441 + ar9485Modes_green_spur_ob_db_tx_gain_1_1);
1442 + else if (AR_SREV_9580(ah))
1443 + INIT_INI_ARRAY(&ah->iniModesTxGain,
1444 + ar9580_1p0_type6_tx_gain_table);
1445 }
1446
1447 +typedef void (*ath_txgain_tab)(struct ath_hw *ah);
1448 +
1449 static void ar9003_tx_gain_table_apply(struct ath_hw *ah)
1450 {
1451 - switch (ar9003_hw_get_tx_gain_idx(ah)) {
1452 - case 0:
1453 - default:
1454 - ar9003_tx_gain_table_mode0(ah);
1455 - break;
1456 - case 1:
1457 - ar9003_tx_gain_table_mode1(ah);
1458 - break;
1459 - case 2:
1460 - ar9003_tx_gain_table_mode2(ah);
1461 - break;
1462 - case 3:
1463 - ar9003_tx_gain_table_mode3(ah);
1464 - break;
1465 - case 4:
1466 - ar9003_tx_gain_table_mode4(ah);
1467 - break;
1468 - }
1469 + static const ath_txgain_tab modes[] = {
1470 + ar9003_tx_gain_table_mode0,
1471 + ar9003_tx_gain_table_mode1,
1472 + ar9003_tx_gain_table_mode2,
1473 + ar9003_tx_gain_table_mode3,
1474 + ar9003_tx_gain_table_mode4,
1475 + ar9003_tx_gain_table_mode5,
1476 + ar9003_tx_gain_table_mode6,
1477 + };
1478 + int idx = ar9003_hw_get_tx_gain_idx(ah);
1479 +
1480 + if (idx >= ARRAY_SIZE(modes))
1481 + idx = 0;
1482 +
1483 + modes[idx](ah);
1484 }
1485
1486 static void ar9003_rx_gain_table_mode0(struct ath_hw *ah)
1487 @@ -673,7 +704,7 @@ void ar9003_hw_attach_ops(struct ath_hw
1488 struct ath_hw_private_ops *priv_ops = ath9k_hw_private_ops(ah);
1489 struct ath_hw_ops *ops = ath9k_hw_ops(ah);
1490
1491 - priv_ops->init_mode_regs = ar9003_hw_init_mode_regs;
1492 + ar9003_hw_init_mode_regs(ah);
1493 priv_ops->init_mode_gain_regs = ar9003_hw_init_mode_gain_regs;
1494
1495 ops->config_pci_powersave = ar9003_hw_configpcipowersave;
1496 --- a/drivers/net/wireless/ath/ath9k/ar9340_initvals.h
1497 +++ b/drivers/net/wireless/ath/ath9k/ar9340_initvals.h
1498 @@ -1172,6 +1172,106 @@ static const u32 ar9340Modes_mixed_ob_db
1499 {0x00016448, 0x24925666, 0x24925666, 0x8e481266, 0x8e481266},
1500 };
1501
1502 +static const u32 ar9340Modes_low_ob_db_and_spur_tx_gain_table_1p0[][5] = {
1503 + /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
1504 + {0x0000a2dc, 0x0380c7fc, 0x0380c7fc, 0x03eaac5a, 0x03eaac5a},
1505 + {0x0000a2e0, 0x0000f800, 0x0000f800, 0x03f330ac, 0x03f330ac},
1506 + {0x0000a2e4, 0x03ff0000, 0x03ff0000, 0x03fc3f00, 0x03fc3f00},
1507 + {0x0000a2e8, 0x00000000, 0x00000000, 0x03ffc000, 0x03ffc000},
1508 + {0x0000a394, 0x00000444, 0x00000444, 0x00000404, 0x00000404},
1509 + {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d9, 0x000050d9},
1510 + {0x0000a500, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
1511 + {0x0000a504, 0x06000003, 0x06000003, 0x02000001, 0x02000001},
1512 + {0x0000a508, 0x0a000020, 0x0a000020, 0x05000003, 0x05000003},
1513 + {0x0000a50c, 0x10000023, 0x10000023, 0x0a000005, 0x0a000005},
1514 + {0x0000a510, 0x16000220, 0x16000220, 0x0e000201, 0x0e000201},
1515 + {0x0000a514, 0x1c000223, 0x1c000223, 0x11000203, 0x11000203},
1516 + {0x0000a518, 0x21002220, 0x21002220, 0x14000401, 0x14000401},
1517 + {0x0000a51c, 0x27002223, 0x27002223, 0x18000403, 0x18000403},
1518 + {0x0000a520, 0x2b022220, 0x2b022220, 0x1b000602, 0x1b000602},
1519 + {0x0000a524, 0x2f022222, 0x2f022222, 0x1f000802, 0x1f000802},
1520 + {0x0000a528, 0x34022225, 0x34022225, 0x21000620, 0x21000620},
1521 + {0x0000a52c, 0x3a02222a, 0x3a02222a, 0x25000820, 0x25000820},
1522 + {0x0000a530, 0x3e02222c, 0x3e02222c, 0x29000822, 0x29000822},
1523 + {0x0000a534, 0x4202242a, 0x4202242a, 0x2d000824, 0x2d000824},
1524 + {0x0000a538, 0x4702244a, 0x4702244a, 0x30000828, 0x30000828},
1525 + {0x0000a53c, 0x4b02244c, 0x4b02244c, 0x3400082a, 0x3400082a},
1526 + {0x0000a540, 0x4e02246c, 0x4e02246c, 0x38000849, 0x38000849},
1527 + {0x0000a544, 0x5302266c, 0x5302266c, 0x3b000a2c, 0x3b000a2c},
1528 + {0x0000a548, 0x5702286c, 0x5702286c, 0x3e000e2b, 0x3e000e2b},
1529 + {0x0000a54c, 0x5c02486b, 0x5c02486b, 0x42000e2d, 0x42000e2d},
1530 + {0x0000a550, 0x61024a6c, 0x61024a6c, 0x4500124a, 0x4500124a},
1531 + {0x0000a554, 0x66026a6c, 0x66026a6c, 0x4900124c, 0x4900124c},
1532 + {0x0000a558, 0x6b026e6c, 0x6b026e6c, 0x4c00126c, 0x4c00126c},
1533 + {0x0000a55c, 0x7002708c, 0x7002708c, 0x4f00128c, 0x4f00128c},
1534 + {0x0000a560, 0x7302b08a, 0x7302b08a, 0x52001290, 0x52001290},
1535 + {0x0000a564, 0x7702b08c, 0x7702b08c, 0x56001292, 0x56001292},
1536 + {0x0000a568, 0x7702b08c, 0x7702b08c, 0x56001292, 0x56001292},
1537 + {0x0000a56c, 0x7702b08c, 0x7702b08c, 0x56001292, 0x56001292},
1538 + {0x0000a570, 0x7702b08c, 0x7702b08c, 0x56001292, 0x56001292},
1539 + {0x0000a574, 0x7702b08c, 0x7702b08c, 0x56001292, 0x56001292},
1540 + {0x0000a578, 0x7702b08c, 0x7702b08c, 0x56001292, 0x56001292},
1541 + {0x0000a57c, 0x7702b08c, 0x7702b08c, 0x56001292, 0x56001292},
1542 + {0x0000a580, 0x00800000, 0x00800000, 0x00800000, 0x00800000},
1543 + {0x0000a584, 0x06800003, 0x06800003, 0x02800001, 0x02800001},
1544 + {0x0000a588, 0x0a800020, 0x0a800020, 0x05800003, 0x05800003},
1545 + {0x0000a58c, 0x10800023, 0x10800023, 0x0a800005, 0x0a800005},
1546 + {0x0000a590, 0x16800220, 0x16800220, 0x0e800201, 0x0e800201},
1547 + {0x0000a594, 0x1c800223, 0x1c800223, 0x11800203, 0x11800203},
1548 + {0x0000a598, 0x21820220, 0x21820220, 0x14800401, 0x14800401},
1549 + {0x0000a59c, 0x27820223, 0x27820223, 0x18800403, 0x18800403},
1550 + {0x0000a5a0, 0x2b822220, 0x2b822220, 0x1b800602, 0x1b800602},
1551 + {0x0000a5a4, 0x2f822222, 0x2f822222, 0x1f800802, 0x1f800802},
1552 + {0x0000a5a8, 0x34822225, 0x34822225, 0x21800620, 0x21800620},
1553 + {0x0000a5ac, 0x3a82222a, 0x3a82222a, 0x25800820, 0x25800820},
1554 + {0x0000a5b0, 0x3e82222c, 0x3e82222c, 0x29800822, 0x29800822},
1555 + {0x0000a5b4, 0x4282242a, 0x4282242a, 0x2d800824, 0x2d800824},
1556 + {0x0000a5b8, 0x4782244a, 0x4782244a, 0x30800828, 0x30800828},
1557 + {0x0000a5bc, 0x4b82244c, 0x4b82244c, 0x3480082a, 0x3480082a},
1558 + {0x0000a5c0, 0x4e82246c, 0x4e82246c, 0x38800849, 0x38800849},
1559 + {0x0000a5c4, 0x5382266c, 0x5382266c, 0x3b800a2c, 0x3b800a2c},
1560 + {0x0000a5c8, 0x5782286c, 0x5782286c, 0x3e800e2b, 0x3e800e2b},
1561 + {0x0000a5cc, 0x5c84286b, 0x5c84286b, 0x42800e2d, 0x42800e2d},
1562 + {0x0000a5d0, 0x61842a6c, 0x61842a6c, 0x4580124a, 0x4580124a},
1563 + {0x0000a5d4, 0x66862a6c, 0x66862a6c, 0x4980124c, 0x4980124c},
1564 + {0x0000a5d8, 0x6b862e6c, 0x6b862e6c, 0x4c80126c, 0x4c80126c},
1565 + {0x0000a5dc, 0x7086308c, 0x7086308c, 0x4f80128c, 0x4f80128c},
1566 + {0x0000a5e0, 0x738a308a, 0x738a308a, 0x52801290, 0x52801290},
1567 + {0x0000a5e4, 0x778a308c, 0x778a308c, 0x56801292, 0x56801292},
1568 + {0x0000a5e8, 0x778a308c, 0x778a308c, 0x56801292, 0x56801292},
1569 + {0x0000a5ec, 0x778a308c, 0x778a308c, 0x56801292, 0x56801292},
1570 + {0x0000a5f0, 0x778a308c, 0x778a308c, 0x56801292, 0x56801292},
1571 + {0x0000a5f4, 0x778a308c, 0x778a308c, 0x56801292, 0x56801292},
1572 + {0x0000a5f8, 0x778a308c, 0x778a308c, 0x56801292, 0x56801292},
1573 + {0x0000a5fc, 0x778a308c, 0x778a308c, 0x56801292, 0x56801292},
1574 + {0x0000a600, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
1575 + {0x0000a604, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
1576 + {0x0000a608, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
1577 + {0x0000a60c, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
1578 + {0x0000a610, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
1579 + {0x0000a614, 0x01404000, 0x01404000, 0x01404501, 0x01404501},
1580 + {0x0000a618, 0x01404501, 0x01404501, 0x01404501, 0x01404501},
1581 + {0x0000a61c, 0x02008802, 0x02008802, 0x01404501, 0x01404501},
1582 + {0x0000a620, 0x0300cc03, 0x0300cc03, 0x03c0cf02, 0x03c0cf02},
1583 + {0x0000a624, 0x0300cc03, 0x0300cc03, 0x03c0cf03, 0x03c0cf03},
1584 + {0x0000a628, 0x0300cc03, 0x0300cc03, 0x04011004, 0x04011004},
1585 + {0x0000a62c, 0x03810c03, 0x03810c03, 0x05419405, 0x05419405},
1586 + {0x0000a630, 0x03810e04, 0x03810e04, 0x05419506, 0x05419506},
1587 + {0x0000a634, 0x03810e04, 0x03810e04, 0x05419506, 0x05419506},
1588 + {0x0000a638, 0x03810e04, 0x03810e04, 0x05419506, 0x05419506},
1589 + {0x0000a63c, 0x03810e04, 0x03810e04, 0x05419506, 0x05419506},
1590 + {0x0000b2dc, 0x0380c7fc, 0x0380c7fc, 0x03eaac5a, 0x03eaac5a},
1591 + {0x0000b2e0, 0x0000f800, 0x0000f800, 0x03f330ac, 0x03f330ac},
1592 + {0x0000b2e4, 0x03ff0000, 0x03ff0000, 0x03fc3f00, 0x03fc3f00},
1593 + {0x0000b2e8, 0x00000000, 0x00000000, 0x03ffc000, 0x03ffc000},
1594 + {0x00016044, 0x022492db, 0x022492db, 0x022492db, 0x022492db},
1595 + {0x00016048, 0x24925666, 0x24925666, 0x24925266, 0x24925266},
1596 + {0x00016280, 0x01000015, 0x01000015, 0x01001015, 0x01001015},
1597 + {0x00016288, 0xf0318000, 0xf0318000, 0xf0318000, 0xf0318000},
1598 + {0x00016444, 0x022492db, 0x022492db, 0x022492db, 0x022492db},
1599 + {0x00016448, 0x24925666, 0x24925666, 0x24925266, 0x24925266},
1600 +};
1601 +
1602 static const u32 ar9340_1p0_mac_core[][2] = {
1603 /* Addr allmodes */
1604 {0x00000008, 0x00000000},
1605 --- a/drivers/net/wireless/ath/ath9k/ar9485_initvals.h
1606 +++ b/drivers/net/wireless/ath/ath9k/ar9485_initvals.h
1607 @@ -260,6 +260,79 @@ static const u32 ar9485Modes_high_power_
1608 {0x00016048, 0x6c924260, 0x6c924260, 0x6c924260, 0x6c924260},
1609 };
1610
1611 +static const u32 ar9485Modes_green_ob_db_tx_gain_1_1[][5] = {
1612 + /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
1613 + {0x000098bc, 0x00000003, 0x00000003, 0x00000003, 0x00000003},
1614 + {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d8, 0x000050d8},
1615 + {0x0000a458, 0x80000000, 0x80000000, 0x80000000, 0x80000000},
1616 + {0x0000a500, 0x00022200, 0x00022200, 0x00000006, 0x00000006},
1617 + {0x0000a504, 0x05062002, 0x05062002, 0x03000201, 0x03000201},
1618 + {0x0000a508, 0x0c002e00, 0x0c002e00, 0x06000203, 0x06000203},
1619 + {0x0000a50c, 0x11062202, 0x11062202, 0x0a000401, 0x0a000401},
1620 + {0x0000a510, 0x17022e00, 0x17022e00, 0x0e000403, 0x0e000403},
1621 + {0x0000a514, 0x1d000ec2, 0x1d000ec2, 0x12000405, 0x12000405},
1622 + {0x0000a518, 0x25020ec0, 0x25020ec0, 0x15000604, 0x15000604},
1623 + {0x0000a51c, 0x2b020ec3, 0x2b020ec3, 0x18000605, 0x18000605},
1624 + {0x0000a520, 0x2f001f04, 0x2f001f04, 0x1c000a04, 0x1c000a04},
1625 + {0x0000a524, 0x35001fc4, 0x35001fc4, 0x21000a06, 0x21000a06},
1626 + {0x0000a528, 0x3c022f04, 0x3c022f04, 0x29000a24, 0x29000a24},
1627 + {0x0000a52c, 0x41023e85, 0x41023e85, 0x2f000e21, 0x2f000e21},
1628 + {0x0000a530, 0x48023ec6, 0x48023ec6, 0x31000e20, 0x31000e20},
1629 + {0x0000a534, 0x4d023f01, 0x4d023f01, 0x33000e20, 0x33000e20},
1630 + {0x0000a538, 0x53023f4b, 0x53023f4b, 0x43000e62, 0x43000e62},
1631 + {0x0000a53c, 0x5a027f09, 0x5a027f09, 0x45000e63, 0x45000e63},
1632 + {0x0000a540, 0x5f027fc9, 0x5f027fc9, 0x49000e65, 0x49000e65},
1633 + {0x0000a544, 0x6502feca, 0x6502feca, 0x4b000e66, 0x4b000e66},
1634 + {0x0000a548, 0x6b02ff4a, 0x6b02ff4a, 0x4d001645, 0x4d001645},
1635 + {0x0000a54c, 0x7203feca, 0x7203feca, 0x51001865, 0x51001865},
1636 + {0x0000a550, 0x7703ff0b, 0x7703ff0b, 0x55001a86, 0x55001a86},
1637 + {0x0000a554, 0x7d06ffcb, 0x7d06ffcb, 0x57001ce9, 0x57001ce9},
1638 + {0x0000a558, 0x8407ff0b, 0x8407ff0b, 0x5a001ceb, 0x5a001ceb},
1639 + {0x0000a55c, 0x8907ffcb, 0x8907ffcb, 0x5e001eeb, 0x5e001eeb},
1640 + {0x0000a560, 0x900fff0b, 0x900fff0b, 0x5e001eeb, 0x5e001eeb},
1641 + {0x0000a564, 0x960fffcb, 0x960fffcb, 0x5e001eeb, 0x5e001eeb},
1642 + {0x0000a568, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
1643 + {0x0000a56c, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
1644 + {0x0000a570, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
1645 + {0x0000a574, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
1646 + {0x0000a578, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
1647 + {0x0000a57c, 0x9c1fff0b, 0x9c1fff0b, 0x5e001eeb, 0x5e001eeb},
1648 + {0x0000b500, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
1649 + {0x0000b504, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
1650 + {0x0000b508, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
1651 + {0x0000b50c, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
1652 + {0x0000b510, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
1653 + {0x0000b514, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
1654 + {0x0000b518, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
1655 + {0x0000b51c, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
1656 + {0x0000b520, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
1657 + {0x0000b524, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
1658 + {0x0000b528, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
1659 + {0x0000b52c, 0x0000002a, 0x0000002a, 0x0000002a, 0x0000002a},
1660 + {0x0000b530, 0x0000003a, 0x0000003a, 0x0000003a, 0x0000003a},
1661 + {0x0000b534, 0x0000004a, 0x0000004a, 0x0000004a, 0x0000004a},
1662 + {0x0000b538, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
1663 + {0x0000b53c, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
1664 + {0x0000b540, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
1665 + {0x0000b544, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
1666 + {0x0000b548, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
1667 + {0x0000b54c, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
1668 + {0x0000b550, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
1669 + {0x0000b554, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
1670 + {0x0000b558, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
1671 + {0x0000b55c, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
1672 + {0x0000b560, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
1673 + {0x0000b564, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
1674 + {0x0000b568, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
1675 + {0x0000b56c, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
1676 + {0x0000b570, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
1677 + {0x0000b574, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
1678 + {0x0000b578, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
1679 + {0x0000b57c, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
1680 + {0x00016044, 0x05d6b2db, 0x05d6b2db, 0x05d6b2db, 0x05d6b2db},
1681 + {0x00016048, 0x6c924260, 0x6c924260, 0x6c924260, 0x6c924260},
1682 +};
1683 +
1684 static const u32 ar9485Modes_high_ob_db_tx_gain_1_1[][5] = {
1685 /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
1686 {0x000098bc, 0x00000002, 0x00000002, 0x00000002, 0x00000002},
1687 @@ -450,6 +523,79 @@ static const u32 ar9485Modes_low_ob_db_t
1688
1689 #define ar9485_modes_lowest_ob_db_tx_gain_1_1 ar9485Modes_low_ob_db_tx_gain_1_1
1690
1691 +static const u32 ar9485Modes_green_spur_ob_db_tx_gain_1_1[][5] = {
1692 + /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
1693 + {0x000098bc, 0x00000003, 0x00000003, 0x00000003, 0x00000003},
1694 + {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d8, 0x000050d8},
1695 + {0x0000a458, 0x80000000, 0x80000000, 0x80000000, 0x80000000},
1696 + {0x0000a500, 0x00022200, 0x00022200, 0x00000006, 0x00000006},
1697 + {0x0000a504, 0x05062002, 0x05062002, 0x03000201, 0x03000201},
1698 + {0x0000a508, 0x0c002e00, 0x0c002e00, 0x07000203, 0x07000203},
1699 + {0x0000a50c, 0x11062202, 0x11062202, 0x0a000401, 0x0a000401},
1700 + {0x0000a510, 0x17022e00, 0x17022e00, 0x0e000403, 0x0e000403},
1701 + {0x0000a514, 0x1d000ec2, 0x1d000ec2, 0x12000405, 0x12000405},
1702 + {0x0000a518, 0x25020ec0, 0x25020ec0, 0x14000406, 0x14000406},
1703 + {0x0000a51c, 0x2b020ec3, 0x2b020ec3, 0x1800040a, 0x1800040a},
1704 + {0x0000a520, 0x2f001f04, 0x2f001f04, 0x1c000460, 0x1c000460},
1705 + {0x0000a524, 0x35001fc4, 0x35001fc4, 0x22000463, 0x22000463},
1706 + {0x0000a528, 0x3c022f04, 0x3c022f04, 0x26000465, 0x26000465},
1707 + {0x0000a52c, 0x41023e85, 0x41023e85, 0x2e0006e0, 0x2e0006e0},
1708 + {0x0000a530, 0x48023ec6, 0x48023ec6, 0x310006e0, 0x310006e0},
1709 + {0x0000a534, 0x4d023f01, 0x4d023f01, 0x330006e0, 0x330006e0},
1710 + {0x0000a538, 0x53023f4b, 0x53023f4b, 0x3e0008e3, 0x3e0008e3},
1711 + {0x0000a53c, 0x5a027f09, 0x5a027f09, 0x410008e5, 0x410008e5},
1712 + {0x0000a540, 0x5f027fc9, 0x5f027fc9, 0x430008e6, 0x430008e6},
1713 + {0x0000a544, 0x6502feca, 0x6502feca, 0x4a0008ec, 0x4a0008ec},
1714 + {0x0000a548, 0x6b02ff4a, 0x6b02ff4a, 0x4e0008f1, 0x4e0008f1},
1715 + {0x0000a54c, 0x7203feca, 0x7203feca, 0x520008f3, 0x520008f3},
1716 + {0x0000a550, 0x7703ff0b, 0x7703ff0b, 0x54000eed, 0x54000eed},
1717 + {0x0000a554, 0x7d06ffcb, 0x7d06ffcb, 0x58000ef1, 0x58000ef1},
1718 + {0x0000a558, 0x8407ff0b, 0x8407ff0b, 0x5c000ef3, 0x5c000ef3},
1719 + {0x0000a55c, 0x8907ffcb, 0x8907ffcb, 0x60000ef5, 0x60000ef5},
1720 + {0x0000a560, 0x900fff0b, 0x900fff0b, 0x62000ef6, 0x62000ef6},
1721 + {0x0000a564, 0x960fffcb, 0x960fffcb, 0x62000ef6, 0x62000ef6},
1722 + {0x0000a568, 0x9c1fff0b, 0x9c1fff0b, 0x62000ef6, 0x62000ef6},
1723 + {0x0000a56c, 0x9c1fff0b, 0x9c1fff0b, 0x62000ef6, 0x62000ef6},
1724 + {0x0000a570, 0x9c1fff0b, 0x9c1fff0b, 0x62000ef6, 0x62000ef6},
1725 + {0x0000a574, 0x9c1fff0b, 0x9c1fff0b, 0x62000ef6, 0x62000ef6},
1726 + {0x0000a578, 0x9c1fff0b, 0x9c1fff0b, 0x62000ef6, 0x62000ef6},
1727 + {0x0000a57c, 0x9c1fff0b, 0x9c1fff0b, 0x62000ef6, 0x62000ef6},
1728 + {0x0000b500, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
1729 + {0x0000b504, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
1730 + {0x0000b508, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
1731 + {0x0000b50c, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
1732 + {0x0000b510, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
1733 + {0x0000b514, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
1734 + {0x0000b518, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
1735 + {0x0000b51c, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
1736 + {0x0000b520, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
1737 + {0x0000b524, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
1738 + {0x0000b528, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a},
1739 + {0x0000b52c, 0x0000002a, 0x0000002a, 0x0000002a, 0x0000002a},
1740 + {0x0000b530, 0x0000003a, 0x0000003a, 0x0000003a, 0x0000003a},
1741 + {0x0000b534, 0x0000004a, 0x0000004a, 0x0000004a, 0x0000004a},
1742 + {0x0000b538, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
1743 + {0x0000b53c, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
1744 + {0x0000b540, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
1745 + {0x0000b544, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
1746 + {0x0000b548, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
1747 + {0x0000b54c, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
1748 + {0x0000b550, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
1749 + {0x0000b554, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
1750 + {0x0000b558, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
1751 + {0x0000b55c, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
1752 + {0x0000b560, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
1753 + {0x0000b564, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
1754 + {0x0000b568, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
1755 + {0x0000b56c, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
1756 + {0x0000b570, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
1757 + {0x0000b574, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
1758 + {0x0000b578, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
1759 + {0x0000b57c, 0x0000005b, 0x0000005b, 0x0000005b, 0x0000005b},
1760 + {0x00016044, 0x05d6b2db, 0x05d6b2db, 0x05d6b2db, 0x05d6b2db},
1761 + {0x00016048, 0x6c924260, 0x6c924260, 0x6c924260, 0x6c924260},
1762 +};
1763 +
1764 static const u32 ar9485_1_1[][2] = {
1765 /* Addr allmodes */
1766 {0x0000a580, 0x00000000},
1767 --- a/drivers/net/wireless/ath/ath9k/ar9580_1p0_initvals.h
1768 +++ b/drivers/net/wireless/ath/ath9k/ar9580_1p0_initvals.h
1769 @@ -685,6 +685,82 @@ static const u32 ar9580_1p0_mixed_ob_db_
1770
1771 #define ar9580_1p0_high_ob_db_tx_gain_table ar9300Modes_high_ob_db_tx_gain_table_2p2
1772
1773 +#define ar9580_1p0_type5_tx_gain_table ar9300Modes_type5_tx_gain_table_2p2
1774 +
1775 +static const u32 ar9580_1p0_type6_tx_gain_table[][5] = {
1776 + /* Addr 5G_HT20 5G_HT40 2G_HT40 2G_HT20 */
1777 + {0x0000a2dc, 0x000cfff0, 0x000cfff0, 0x03aaa352, 0x03aaa352},
1778 + {0x0000a2e0, 0x000f0000, 0x000f0000, 0x03ccc584, 0x03ccc584},
1779 + {0x0000a2e4, 0x03f00000, 0x03f00000, 0x03f0f800, 0x03f0f800},
1780 + {0x0000a2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
1781 + {0x0000a410, 0x000050d9, 0x000050d9, 0x000050d9, 0x000050d9},
1782 + {0x0000a500, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
1783 + {0x0000a504, 0x06000003, 0x06000003, 0x04000002, 0x04000002},
1784 + {0x0000a508, 0x0a000020, 0x0a000020, 0x08000004, 0x08000004},
1785 + {0x0000a50c, 0x10000023, 0x10000023, 0x0b000200, 0x0b000200},
1786 + {0x0000a510, 0x15000028, 0x15000028, 0x0f000202, 0x0f000202},
1787 + {0x0000a514, 0x1b00002b, 0x1b00002b, 0x12000400, 0x12000400},
1788 + {0x0000a518, 0x1f020028, 0x1f020028, 0x16000402, 0x16000402},
1789 + {0x0000a51c, 0x2502002b, 0x2502002b, 0x19000404, 0x19000404},
1790 + {0x0000a520, 0x2a04002a, 0x2a04002a, 0x1c000603, 0x1c000603},
1791 + {0x0000a524, 0x2e06002a, 0x2e06002a, 0x21000a02, 0x21000a02},
1792 + {0x0000a528, 0x3302202d, 0x3302202d, 0x25000a04, 0x25000a04},
1793 + {0x0000a52c, 0x3804202c, 0x3804202c, 0x28000a20, 0x28000a20},
1794 + {0x0000a530, 0x3c06202c, 0x3c06202c, 0x2c000e20, 0x2c000e20},
1795 + {0x0000a534, 0x4108202d, 0x4108202d, 0x30000e22, 0x30000e22},
1796 + {0x0000a538, 0x4506402d, 0x4506402d, 0x34000e24, 0x34000e24},
1797 + {0x0000a53c, 0x4906222d, 0x4906222d, 0x38001640, 0x38001640},
1798 + {0x0000a540, 0x4d062231, 0x4d062231, 0x3c001660, 0x3c001660},
1799 + {0x0000a544, 0x50082231, 0x50082231, 0x3f001861, 0x3f001861},
1800 + {0x0000a548, 0x5608422e, 0x5608422e, 0x43001a81, 0x43001a81},
1801 + {0x0000a54c, 0x5e08442e, 0x5e08442e, 0x47001a83, 0x47001a83},
1802 + {0x0000a550, 0x620a4431, 0x620a4431, 0x4a001c84, 0x4a001c84},
1803 + {0x0000a554, 0x640a4432, 0x640a4432, 0x4e001ce3, 0x4e001ce3},
1804 + {0x0000a558, 0x680a4434, 0x680a4434, 0x52001ce5, 0x52001ce5},
1805 + {0x0000a55c, 0x6c0a6434, 0x6c0a6434, 0x56001ce9, 0x56001ce9},
1806 + {0x0000a560, 0x6f0a6633, 0x6f0a6633, 0x5a001ceb, 0x5a001ceb},
1807 + {0x0000a564, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
1808 + {0x0000a568, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
1809 + {0x0000a56c, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
1810 + {0x0000a570, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
1811 + {0x0000a574, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
1812 + {0x0000a578, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
1813 + {0x0000a57c, 0x730c6634, 0x730c6634, 0x5d001eec, 0x5d001eec},
1814 + {0x0000a600, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
1815 + {0x0000a604, 0x00000000, 0x00000000, 0x00000000, 0x00000000},
1816 + {0x0000a608, 0x01804601, 0x01804601, 0x00000000, 0x00000000},
1817 + {0x0000a60c, 0x01804601, 0x01804601, 0x00000000, 0x00000000},
1818 + {0x0000a610, 0x01804601, 0x01804601, 0x00000000, 0x00000000},
1819 + {0x0000a614, 0x01804601, 0x01804601, 0x01404000, 0x01404000},
1820 + {0x0000a618, 0x01804601, 0x01804601, 0x01404501, 0x01404501},
1821 + {0x0000a61c, 0x01804601, 0x01804601, 0x02008501, 0x02008501},
1822 + {0x0000a620, 0x03408d02, 0x03408d02, 0x0280ca03, 0x0280ca03},
1823 + {0x0000a624, 0x0300cc03, 0x0300cc03, 0x03010c04, 0x03010c04},
1824 + {0x0000a628, 0x03410d04, 0x03410d04, 0x04014c04, 0x04014c04},
1825 + {0x0000a62c, 0x03410d04, 0x03410d04, 0x04015005, 0x04015005},
1826 + {0x0000a630, 0x03410d04, 0x03410d04, 0x04015005, 0x04015005},
1827 + {0x0000a634, 0x03410d04, 0x03410d04, 0x04015005, 0x04015005},
1828 + {0x0000a638, 0x03410d04, 0x03410d04, 0x04015005, 0x04015005},
1829 + {0x0000a63c, 0x03410d04, 0x03410d04, 0x04015005, 0x04015005},
1830 + {0x0000b2dc, 0x000cfff0, 0x000cfff0, 0x03aaa352, 0x03aaa352},
1831 + {0x0000b2e0, 0x000f0000, 0x000f0000, 0x03ccc584, 0x03ccc584},
1832 + {0x0000b2e4, 0x03f00000, 0x03f00000, 0x03f0f800, 0x03f0f800},
1833 + {0x0000b2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
1834 + {0x0000c2dc, 0x000cfff0, 0x000cfff0, 0x03aaa352, 0x03aaa352},
1835 + {0x0000c2e0, 0x000f0000, 0x000f0000, 0x03ccc584, 0x03ccc584},
1836 + {0x0000c2e4, 0x03f00000, 0x03f00000, 0x03f0f800, 0x03f0f800},
1837 + {0x0000c2e8, 0x00000000, 0x00000000, 0x03ff0000, 0x03ff0000},
1838 + {0x00016044, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4},
1839 + {0x00016048, 0x61200001, 0x61200001, 0x66480001, 0x66480001},
1840 + {0x00016068, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
1841 + {0x00016444, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4},
1842 + {0x00016448, 0x61200001, 0x61200001, 0x66480001, 0x66480001},
1843 + {0x00016468, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
1844 + {0x00016844, 0x012492d4, 0x012492d4, 0x012492d4, 0x012492d4},
1845 + {0x00016848, 0x61200001, 0x61200001, 0x66480001, 0x66480001},
1846 + {0x00016868, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c, 0x6db6db6c},
1847 +};
1848 +
1849 static const u32 ar9580_1p0_soc_preamble[][2] = {
1850 /* Addr allmodes */
1851 {0x000040a4, 0x00a0c1c9},
1852 --- a/drivers/net/wireless/ath/ath9k/reg.h
1853 +++ b/drivers/net/wireless/ath/ath9k/reg.h
1854 @@ -789,6 +789,7 @@
1855 #define AR_SREV_REVISION_9271_11 1
1856 #define AR_SREV_VERSION_9300 0x1c0
1857 #define AR_SREV_REVISION_9300_20 2 /* 2.0 and 2.1 */
1858 +#define AR_SREV_REVISION_9300_22 3
1859 #define AR_SREV_VERSION_9330 0x200
1860 #define AR_SREV_REVISION_9330_10 0
1861 #define AR_SREV_REVISION_9330_11 1
1862 @@ -869,6 +870,9 @@
1863 (((_ah)->hw_version.macVersion == AR_SREV_VERSION_9300))
1864 #define AR_SREV_9300_20_OR_LATER(_ah) \
1865 ((_ah)->hw_version.macVersion >= AR_SREV_VERSION_9300)
1866 +#define AR_SREV_9300_22(_ah) \
1867 + (AR_SREV_9300(ah) && \
1868 + ((_ah)->hw_version.macRev == AR_SREV_REVISION_9300_22))
1869
1870 #define AR_SREV_9330(_ah) \
1871 (((_ah)->hw_version.macVersion == AR_SREV_VERSION_9330))
1872 --- a/net/mac80211/mlme.c
1873 +++ b/net/mac80211/mlme.c
1874 @@ -199,11 +199,11 @@ static u32 ieee80211_config_ht_tx(struct
1875 case NL80211_CHAN_WIDTH_40:
1876 if (sdata->vif.bss_conf.chandef.chan->center_freq >
1877 sdata->vif.bss_conf.chandef.center_freq1 &&
1878 - chan->flags & IEEE80211_CHAN_NO_HT40PLUS)
1879 + chan->flags & IEEE80211_CHAN_NO_HT40MINUS)
1880 disable_40 = true;
1881 if (sdata->vif.bss_conf.chandef.chan->center_freq <
1882 sdata->vif.bss_conf.chandef.center_freq1 &&
1883 - chan->flags & IEEE80211_CHAN_NO_HT40MINUS)
1884 + chan->flags & IEEE80211_CHAN_NO_HT40PLUS)
1885 disable_40 = true;
1886 break;
1887 default:
1888 --- a/drivers/net/wireless/ath/ath9k/ar5008_phy.c
1889 +++ b/drivers/net/wireless/ath/ath9k/ar5008_phy.c
1890 @@ -18,6 +18,7 @@
1891 #include "hw-ops.h"
1892 #include "../regd.h"
1893 #include "ar9002_phy.h"
1894 +#include "ar5008_initvals.h"
1895
1896 /* All code below is for AR5008, AR9001, AR9002 */
1897
1898 @@ -43,23 +44,16 @@ static const int m2ThreshLowExt_off = 12
1899 static const int m1ThreshExt_off = 127;
1900 static const int m2ThreshExt_off = 127;
1901
1902 +static const struct ar5416IniArray bank0 = STATIC_INI_ARRAY(ar5416Bank0);
1903 +static const struct ar5416IniArray bank1 = STATIC_INI_ARRAY(ar5416Bank1);
1904 +static const struct ar5416IniArray bank2 = STATIC_INI_ARRAY(ar5416Bank2);
1905 +static const struct ar5416IniArray bank3 = STATIC_INI_ARRAY(ar5416Bank3);
1906 +static const struct ar5416IniArray bank7 = STATIC_INI_ARRAY(ar5416Bank7);
1907
1908 -static void ar5008_rf_bank_setup(u32 *bank, struct ar5416IniArray *array,
1909 - int col)
1910 -{
1911 - int i;
1912 -
1913 - for (i = 0; i < array->ia_rows; i++)
1914 - bank[i] = INI_RA(array, i, col);
1915 -}
1916 -
1917 -
1918 -#define REG_WRITE_RF_ARRAY(iniarray, regData, regWr) \
1919 - ar5008_write_rf_array(ah, iniarray, regData, &(regWr))
1920 -
1921 -static void ar5008_write_rf_array(struct ath_hw *ah, struct ar5416IniArray *array,
1922 - u32 *data, unsigned int *writecnt)
1923 +static void ar5008_write_bank6(struct ath_hw *ah, unsigned int *writecnt)
1924 {
1925 + struct ar5416IniArray *array = &ah->iniBank6;
1926 + u32 *data = ah->analogBank6Data;
1927 int r;
1928
1929 ENABLE_REGWRITE_BUFFER(ah);
1930 @@ -165,7 +159,7 @@ static void ar5008_hw_force_bias(struct
1931 ar5008_hw_phy_modify_rx_buffer(ah->analogBank6Data, tmp_reg, 3, 181, 3);
1932
1933 /* write Bank 6 with new params */
1934 - REG_WRITE_RF_ARRAY(&ah->iniBank6, ah->analogBank6Data, reg_writes);
1935 + ar5008_write_bank6(ah, &reg_writes);
1936 }
1937
1938 /**
1939 @@ -469,31 +463,16 @@ static void ar5008_hw_spur_mitigate(stru
1940 */
1941 static int ar5008_hw_rf_alloc_ext_banks(struct ath_hw *ah)
1942 {
1943 -#define ATH_ALLOC_BANK(bank, size) do { \
1944 - bank = devm_kzalloc(ah->dev, sizeof(u32) * size, GFP_KERNEL); \
1945 - if (!bank) \
1946 - goto error; \
1947 - } while (0);
1948 -
1949 - struct ath_common *common = ath9k_hw_common(ah);
1950 + int size = ah->iniBank6.ia_rows * sizeof(u32);
1951
1952 if (AR_SREV_9280_20_OR_LATER(ah))
1953 return 0;
1954
1955 - ATH_ALLOC_BANK(ah->analogBank0Data, ah->iniBank0.ia_rows);
1956 - ATH_ALLOC_BANK(ah->analogBank1Data, ah->iniBank1.ia_rows);
1957 - ATH_ALLOC_BANK(ah->analogBank2Data, ah->iniBank2.ia_rows);
1958 - ATH_ALLOC_BANK(ah->analogBank3Data, ah->iniBank3.ia_rows);
1959 - ATH_ALLOC_BANK(ah->analogBank6Data, ah->iniBank6.ia_rows);
1960 - ATH_ALLOC_BANK(ah->analogBank6TPCData, ah->iniBank6TPC.ia_rows);
1961 - ATH_ALLOC_BANK(ah->analogBank7Data, ah->iniBank7.ia_rows);
1962 - ATH_ALLOC_BANK(ah->bank6Temp, ah->iniBank6.ia_rows);
1963 + ah->analogBank6Data = devm_kzalloc(ah->dev, size, GFP_KERNEL);
1964 + if (!ah->analogBank6Data)
1965 + return -ENOMEM;
1966
1967 return 0;
1968 -#undef ATH_ALLOC_BANK
1969 -error:
1970 - ath_err(common, "Cannot allocate RF banks\n");
1971 - return -ENOMEM;
1972 }
1973
1974
1975 @@ -517,6 +496,7 @@ static bool ar5008_hw_set_rf_regs(struct
1976 u32 ob5GHz = 0, db5GHz = 0;
1977 u32 ob2GHz = 0, db2GHz = 0;
1978 int regWrites = 0;
1979 + int i;
1980
1981 /*
1982 * Software does not need to program bank data
1983 @@ -529,25 +509,8 @@ static bool ar5008_hw_set_rf_regs(struct
1984 /* Setup rf parameters */
1985 eepMinorRev = ah->eep_ops->get_eeprom(ah, EEP_MINOR_REV);
1986
1987 - /* Setup Bank 0 Write */
1988 - ar5008_rf_bank_setup(ah->analogBank0Data, &ah->iniBank0, 1);
1989 -
1990 - /* Setup Bank 1 Write */
1991 - ar5008_rf_bank_setup(ah->analogBank1Data, &ah->iniBank1, 1);
1992 -
1993 - /* Setup Bank 2 Write */
1994 - ar5008_rf_bank_setup(ah->analogBank2Data, &ah->iniBank2, 1);
1995 -
1996 - /* Setup Bank 6 Write */
1997 - ar5008_rf_bank_setup(ah->analogBank3Data, &ah->iniBank3,
1998 - modesIndex);
1999 - {
2000 - int i;
2001 - for (i = 0; i < ah->iniBank6TPC.ia_rows; i++) {
2002 - ah->analogBank6Data[i] =
2003 - INI_RA(&ah->iniBank6TPC, i, modesIndex);
2004 - }
2005 - }
2006 + for (i = 0; i < ah->iniBank6.ia_rows; i++)
2007 + ah->analogBank6Data[i] = INI_RA(&ah->iniBank6, i, modesIndex);
2008
2009 /* Only the 5 or 2 GHz OB/DB need to be set for a mode */
2010 if (eepMinorRev >= 2) {
2011 @@ -568,22 +531,13 @@ static bool ar5008_hw_set_rf_regs(struct
2012 }
2013 }
2014
2015 - /* Setup Bank 7 Setup */
2016 - ar5008_rf_bank_setup(ah->analogBank7Data, &ah->iniBank7, 1);
2017 -
2018 /* Write Analog registers */
2019 - REG_WRITE_RF_ARRAY(&ah->iniBank0, ah->analogBank0Data,
2020 - regWrites);
2021 - REG_WRITE_RF_ARRAY(&ah->iniBank1, ah->analogBank1Data,
2022 - regWrites);
2023 - REG_WRITE_RF_ARRAY(&ah->iniBank2, ah->analogBank2Data,
2024 - regWrites);
2025 - REG_WRITE_RF_ARRAY(&ah->iniBank3, ah->analogBank3Data,
2026 - regWrites);
2027 - REG_WRITE_RF_ARRAY(&ah->iniBank6TPC, ah->analogBank6Data,
2028 - regWrites);
2029 - REG_WRITE_RF_ARRAY(&ah->iniBank7, ah->analogBank7Data,
2030 - regWrites);
2031 + REG_WRITE_ARRAY(&bank0, 1, regWrites);
2032 + REG_WRITE_ARRAY(&bank1, 1, regWrites);
2033 + REG_WRITE_ARRAY(&bank2, 1, regWrites);
2034 + REG_WRITE_ARRAY(&bank3, modesIndex, regWrites);
2035 + ar5008_write_bank6(ah, &regWrites);
2036 + REG_WRITE_ARRAY(&bank7, 1, regWrites);
2037
2038 return true;
2039 }
2040 --- a/drivers/net/wireless/ath/ath9k/ar9002_hw.c
2041 +++ b/drivers/net/wireless/ath/ath9k/ar9002_hw.c
2042 @@ -23,13 +23,13 @@
2043
2044 /* General hardware code for the A5008/AR9001/AR9002 hadware families */
2045
2046 -static void ar9002_hw_init_mode_regs(struct ath_hw *ah)
2047 +static int ar9002_hw_init_mode_regs(struct ath_hw *ah)
2048 {
2049 if (AR_SREV_9271(ah)) {
2050 INIT_INI_ARRAY(&ah->iniModes, ar9271Modes_9271);
2051 INIT_INI_ARRAY(&ah->iniCommon, ar9271Common_9271);
2052 INIT_INI_ARRAY(&ah->iniModes_9271_ANI_reg, ar9271Modes_9271_ANI_reg);
2053 - return;
2054 + return 0;
2055 }
2056
2057 if (ah->config.pcie_clock_req)
2058 @@ -67,12 +67,10 @@ static void ar9002_hw_init_mode_regs(str
2059 } else if (AR_SREV_9100_OR_LATER(ah)) {
2060 INIT_INI_ARRAY(&ah->iniModes, ar5416Modes_9100);
2061 INIT_INI_ARRAY(&ah->iniCommon, ar5416Common_9100);
2062 - INIT_INI_ARRAY(&ah->iniBank6, ar5416Bank6_9100);
2063 INIT_INI_ARRAY(&ah->iniAddac, ar5416Addac_9100);
2064 } else {
2065 INIT_INI_ARRAY(&ah->iniModes, ar5416Modes);
2066 INIT_INI_ARRAY(&ah->iniCommon, ar5416Common);
2067 - INIT_INI_ARRAY(&ah->iniBank6TPC, ar5416Bank6TPC);
2068 INIT_INI_ARRAY(&ah->iniAddac, ar5416Addac);
2069 }
2070
2071 @@ -80,20 +78,11 @@ static void ar9002_hw_init_mode_regs(str
2072 /* Common for AR5416, AR913x, AR9160 */
2073 INIT_INI_ARRAY(&ah->iniBB_RfGain, ar5416BB_RfGain);
2074
2075 - INIT_INI_ARRAY(&ah->iniBank0, ar5416Bank0);
2076 - INIT_INI_ARRAY(&ah->iniBank1, ar5416Bank1);
2077 - INIT_INI_ARRAY(&ah->iniBank2, ar5416Bank2);
2078 - INIT_INI_ARRAY(&ah->iniBank3, ar5416Bank3);
2079 - INIT_INI_ARRAY(&ah->iniBank7, ar5416Bank7);
2080 -
2081 - /* Common for AR5416, AR9160 */
2082 - if (!AR_SREV_9100(ah))
2083 - INIT_INI_ARRAY(&ah->iniBank6, ar5416Bank6);
2084 -
2085 /* Common for AR913x, AR9160 */
2086 if (!AR_SREV_5416(ah))
2087 - INIT_INI_ARRAY(&ah->iniBank6TPC,
2088 - ar5416Bank6TPC_9100);
2089 + INIT_INI_ARRAY(&ah->iniBank6, ar5416Bank6TPC_9100);
2090 + else
2091 + INIT_INI_ARRAY(&ah->iniBank6, ar5416Bank6TPC);
2092 }
2093
2094 /* iniAddac needs to be modified for these chips */
2095 @@ -104,7 +93,7 @@ static void ar9002_hw_init_mode_regs(str
2096
2097 data = devm_kzalloc(ah->dev, size, GFP_KERNEL);
2098 if (!data)
2099 - return;
2100 + return -ENOMEM;
2101
2102 memcpy(data, addac->ia_array, size);
2103 addac->ia_array = data;
2104 @@ -120,6 +109,7 @@ static void ar9002_hw_init_mode_regs(str
2105 INIT_INI_ARRAY(&ah->iniCckfirJapan2484,
2106 ar9287Common_japan_2484_cck_fir_coeff_9287_1_1);
2107 }
2108 + return 0;
2109 }
2110
2111 static void ar9280_20_hw_init_rxgain_ini(struct ath_hw *ah)
2112 @@ -415,7 +405,10 @@ int ar9002_hw_attach_ops(struct ath_hw *
2113 struct ath_hw_ops *ops = ath9k_hw_ops(ah);
2114 int ret;
2115
2116 - priv_ops->init_mode_regs = ar9002_hw_init_mode_regs;
2117 + ret = ar9002_hw_init_mode_regs(ah);
2118 + if (ret)
2119 + return ret;
2120 +
2121 priv_ops->init_mode_gain_regs = ar9002_hw_init_mode_gain_regs;
2122
2123 ops->config_pci_powersave = ar9002_hw_configpcipowersave;
2124 --- a/drivers/net/wireless/ath/ath9k/hw.c
2125 +++ b/drivers/net/wireless/ath/ath9k/hw.c
2126 @@ -54,11 +54,6 @@ static void ath9k_hw_init_cal_settings(s
2127 ath9k_hw_private_ops(ah)->init_cal_settings(ah);
2128 }
2129
2130 -static void ath9k_hw_init_mode_regs(struct ath_hw *ah)
2131 -{
2132 - ath9k_hw_private_ops(ah)->init_mode_regs(ah);
2133 -}
2134 -
2135 static u32 ath9k_hw_compute_pll_control(struct ath_hw *ah,
2136 struct ath9k_channel *chan)
2137 {
2138 @@ -208,7 +203,7 @@ void ath9k_hw_synth_delay(struct ath_hw
2139 udelay(hw_delay + BASE_ACTIVATE_DELAY);
2140 }
2141
2142 -void ath9k_hw_write_array(struct ath_hw *ah, struct ar5416IniArray *array,
2143 +void ath9k_hw_write_array(struct ath_hw *ah, const struct ar5416IniArray *array,
2144 int column, unsigned int *writecnt)
2145 {
2146 int r;
2147 @@ -554,10 +549,8 @@ static int ath9k_hw_post_init(struct ath
2148 ah->eep_ops->get_eeprom_ver(ah),
2149 ah->eep_ops->get_eeprom_rev(ah));
2150
2151 - if (ah->config.enable_ani) {
2152 - ath9k_hw_ani_setup(ah);
2153 + if (ah->config.enable_ani)
2154 ath9k_hw_ani_init(ah);
2155 - }
2156
2157 return 0;
2158 }
2159 @@ -670,8 +663,6 @@ static int __ath9k_hw_init(struct ath_hw
2160 if (!AR_SREV_9300_20_OR_LATER(ah))
2161 ah->ani_function &= ~ATH9K_ANI_MRC_CCK;
2162
2163 - ath9k_hw_init_mode_regs(ah);
2164 -
2165 if (!ah->is_pciexpress)
2166 ath9k_hw_disablepcie(ah);
2167
2168 --- a/drivers/net/wireless/ath/ath9k/hw.h
2169 +++ b/drivers/net/wireless/ath/ath9k/hw.h
2170 @@ -599,7 +599,6 @@ struct ath_hw_radar_conf {
2171 * @init_cal_settings: setup types of calibrations supported
2172 * @init_cal: starts actual calibration
2173 *
2174 - * @init_mode_regs: Initializes mode registers
2175 * @init_mode_gain_regs: Initialize TX/RX gain registers
2176 *
2177 * @rf_set_freq: change frequency
2178 @@ -618,7 +617,6 @@ struct ath_hw_private_ops {
2179 void (*init_cal_settings)(struct ath_hw *ah);
2180 bool (*init_cal)(struct ath_hw *ah, struct ath9k_channel *chan);
2181
2182 - void (*init_mode_regs)(struct ath_hw *ah);
2183 void (*init_mode_gain_regs)(struct ath_hw *ah);
2184 void (*setup_calibration)(struct ath_hw *ah,
2185 struct ath9k_cal_list *currCal);
2186 @@ -810,14 +808,7 @@ struct ath_hw {
2187 struct ath_hw_ops ops;
2188
2189 /* Used to program the radio on non single-chip devices */
2190 - u32 *analogBank0Data;
2191 - u32 *analogBank1Data;
2192 - u32 *analogBank2Data;
2193 - u32 *analogBank3Data;
2194 u32 *analogBank6Data;
2195 - u32 *analogBank6TPCData;
2196 - u32 *analogBank7Data;
2197 - u32 *bank6Temp;
2198
2199 int coverage_class;
2200 u32 slottime;
2201 @@ -826,10 +817,6 @@ struct ath_hw {
2202 /* ANI */
2203 u32 proc_phyerr;
2204 u32 aniperiod;
2205 - int totalSizeDesired[5];
2206 - int coarse_high[5];
2207 - int coarse_low[5];
2208 - int firpwr[5];
2209 enum ath9k_ani_cmd ani_function;
2210 u32 ani_skip_count;
2211
2212 @@ -852,14 +839,8 @@ struct ath_hw {
2213
2214 struct ar5416IniArray iniModes;
2215 struct ar5416IniArray iniCommon;
2216 - struct ar5416IniArray iniBank0;
2217 struct ar5416IniArray iniBB_RfGain;
2218 - struct ar5416IniArray iniBank1;
2219 - struct ar5416IniArray iniBank2;
2220 - struct ar5416IniArray iniBank3;
2221 struct ar5416IniArray iniBank6;
2222 - struct ar5416IniArray iniBank6TPC;
2223 - struct ar5416IniArray iniBank7;
2224 struct ar5416IniArray iniAddac;
2225 struct ar5416IniArray iniPcieSerdes;
2226 #ifdef CONFIG_PM_SLEEP
2227 @@ -975,7 +956,7 @@ void ath9k_hw_setantenna(struct ath_hw *
2228 void ath9k_hw_synth_delay(struct ath_hw *ah, struct ath9k_channel *chan,
2229 int hw_delay);
2230 bool ath9k_hw_wait(struct ath_hw *ah, u32 reg, u32 mask, u32 val, u32 timeout);
2231 -void ath9k_hw_write_array(struct ath_hw *ah, struct ar5416IniArray *array,
2232 +void ath9k_hw_write_array(struct ath_hw *ah, const struct ar5416IniArray *array,
2233 int column, unsigned int *writecnt);
2234 u32 ath9k_hw_reverse_bits(u32 val, u32 n);
2235 u16 ath9k_hw_computetxtime(struct ath_hw *ah,
2236 --- a/net/mac80211/tx.c
2237 +++ b/net/mac80211/tx.c
2238 @@ -1677,10 +1677,10 @@ netdev_tx_t ieee80211_monitor_start_xmit
2239 chanctx_conf =
2240 rcu_dereference(tmp_sdata->vif.chanctx_conf);
2241 }
2242 - if (!chanctx_conf)
2243 - goto fail_rcu;
2244 -
2245 - chan = chanctx_conf->def.chan;
2246 + if (chanctx_conf)
2247 + chan = chanctx_conf->def.chan;
2248 + else
2249 + chan = local->_oper_channel;
2250
2251 /*
2252 * Frame injection is not allowed if beaconing is not allowed
2253 --- a/drivers/net/wireless/ath/ath9k/ani.c
2254 +++ b/drivers/net/wireless/ath/ath9k/ani.c
2255 @@ -152,7 +152,8 @@ static void ath9k_hw_set_ofdm_nil(struct
2256 ath_dbg(common, ANI, "**** ofdmlevel %d=>%d, rssi=%d[lo=%d hi=%d]\n",
2257 aniState->ofdmNoiseImmunityLevel,
2258 immunityLevel, BEACON_RSSI(ah),
2259 - aniState->rssiThrLow, aniState->rssiThrHigh);
2260 + ATH9K_ANI_RSSI_THR_LOW,
2261 + ATH9K_ANI_RSSI_THR_HIGH);
2262
2263 if (!scan)
2264 aniState->ofdmNoiseImmunityLevel = immunityLevel;
2265 @@ -173,7 +174,7 @@ static void ath9k_hw_set_ofdm_nil(struct
2266
2267 weak_sig = entry_ofdm->ofdm_weak_signal_on;
2268 if (ah->opmode == NL80211_IFTYPE_STATION &&
2269 - BEACON_RSSI(ah) <= aniState->rssiThrHigh)
2270 + BEACON_RSSI(ah) <= ATH9K_ANI_RSSI_THR_HIGH)
2271 weak_sig = true;
2272
2273 if (aniState->ofdmWeakSigDetect != weak_sig)
2274 @@ -216,11 +217,11 @@ static void ath9k_hw_set_cck_nil(struct
2275
2276 ath_dbg(common, ANI, "**** ccklevel %d=>%d, rssi=%d[lo=%d hi=%d]\n",
2277 aniState->cckNoiseImmunityLevel, immunityLevel,
2278 - BEACON_RSSI(ah), aniState->rssiThrLow,
2279 - aniState->rssiThrHigh);
2280 + BEACON_RSSI(ah), ATH9K_ANI_RSSI_THR_LOW,
2281 + ATH9K_ANI_RSSI_THR_HIGH);
2282
2283 if (ah->opmode == NL80211_IFTYPE_STATION &&
2284 - BEACON_RSSI(ah) <= aniState->rssiThrLow &&
2285 + BEACON_RSSI(ah) <= ATH9K_ANI_RSSI_THR_LOW &&
2286 immunityLevel > ATH9K_ANI_CCK_MAX_LEVEL_LOW_RSSI)
2287 immunityLevel = ATH9K_ANI_CCK_MAX_LEVEL_LOW_RSSI;
2288
2289 @@ -418,9 +419,6 @@ void ath9k_hw_ani_monitor(struct ath_hw
2290 return;
2291
2292 aniState = &ah->curchan->ani;
2293 - if (WARN_ON(!aniState))
2294 - return;
2295 -
2296 if (!ath9k_hw_ani_read_counters(ah))
2297 return;
2298
2299 @@ -489,23 +487,6 @@ void ath9k_hw_disable_mib_counters(struc
2300 }
2301 EXPORT_SYMBOL(ath9k_hw_disable_mib_counters);
2302
2303 -void ath9k_hw_ani_setup(struct ath_hw *ah)
2304 -{
2305 - int i;
2306 -
2307 - static const int totalSizeDesired[] = { -55, -55, -55, -55, -62 };
2308 - static const int coarseHigh[] = { -14, -14, -14, -14, -12 };
2309 - static const int coarseLow[] = { -64, -64, -64, -64, -70 };
2310 - static const int firpwr[] = { -78, -78, -78, -78, -80 };
2311 -
2312 - for (i = 0; i < 5; i++) {
2313 - ah->totalSizeDesired[i] = totalSizeDesired[i];
2314 - ah->coarse_high[i] = coarseHigh[i];
2315 - ah->coarse_low[i] = coarseLow[i];
2316 - ah->firpwr[i] = firpwr[i];
2317 - }
2318 -}
2319 -
2320 void ath9k_hw_ani_init(struct ath_hw *ah)
2321 {
2322 struct ath_common *common = ath9k_hw_common(ah);
2323 @@ -531,8 +512,6 @@ void ath9k_hw_ani_init(struct ath_hw *ah
2324
2325 ani->ofdmsTurn = true;
2326
2327 - ani->rssiThrHigh = ATH9K_ANI_RSSI_THR_HIGH;
2328 - ani->rssiThrLow = ATH9K_ANI_RSSI_THR_LOW;
2329 ani->ofdmWeakSigDetect = ATH9K_ANI_USE_OFDM_WEAK_SIG;
2330 ani->cckNoiseImmunityLevel = ATH9K_ANI_CCK_DEF_LEVEL;
2331 ani->ofdmNoiseImmunityLevel = ATH9K_ANI_OFDM_DEF_LEVEL;
2332 --- a/drivers/net/wireless/ath/ath9k/ani.h
2333 +++ b/drivers/net/wireless/ath/ath9k/ani.h
2334 @@ -104,7 +104,6 @@ struct ath9k_ani_default {
2335 };
2336
2337 struct ar5416AniState {
2338 - struct ath9k_channel *c;
2339 u8 noiseImmunityLevel;
2340 u8 ofdmNoiseImmunityLevel;
2341 u8 cckNoiseImmunityLevel;
2342 @@ -113,15 +112,9 @@ struct ar5416AniState {
2343 u8 spurImmunityLevel;
2344 u8 firstepLevel;
2345 u8 ofdmWeakSigDetect;
2346 - u8 cckWeakSigThreshold;
2347 u32 listenTime;
2348 - int32_t rssiThrLow;
2349 - int32_t rssiThrHigh;
2350 u32 ofdmPhyErrCount;
2351 u32 cckPhyErrCount;
2352 - int16_t pktRssi[2];
2353 - int16_t ofdmErrRssi[2];
2354 - int16_t cckErrRssi[2];
2355 struct ath9k_ani_default iniDef;
2356 };
2357
2358 @@ -147,7 +140,6 @@ struct ar5416Stats {
2359
2360 void ath9k_enable_mib_counters(struct ath_hw *ah);
2361 void ath9k_hw_disable_mib_counters(struct ath_hw *ah);
2362 -void ath9k_hw_ani_setup(struct ath_hw *ah);
2363 void ath9k_hw_ani_init(struct ath_hw *ah);
2364
2365 #endif /* ANI_H */
2366 --- a/drivers/net/wireless/ath/ath9k/calib.h
2367 +++ b/drivers/net/wireless/ath/ath9k/calib.h
2368 @@ -33,6 +33,12 @@ struct ar5416IniArray {
2369 u32 ia_columns;
2370 };
2371
2372 +#define STATIC_INI_ARRAY(array) { \
2373 + .ia_array = (u32 *)(array), \
2374 + .ia_rows = ARRAY_SIZE(array), \
2375 + .ia_columns = ARRAY_SIZE(array[0]), \
2376 + }
2377 +
2378 #define INIT_INI_ARRAY(iniarray, array) do { \
2379 (iniarray)->ia_array = (u32 *)(array); \
2380 (iniarray)->ia_rows = ARRAY_SIZE(array); \
2381 --- a/drivers/net/wireless/ath/ath9k/xmit.c
2382 +++ b/drivers/net/wireless/ath/ath9k/xmit.c
2383 @@ -378,7 +378,7 @@ static void ath_tx_count_frames(struct a
2384
2385 static void ath_tx_complete_aggr(struct ath_softc *sc, struct ath_txq *txq,
2386 struct ath_buf *bf, struct list_head *bf_q,
2387 - struct ath_tx_status *ts, int txok, bool retry)
2388 + struct ath_tx_status *ts, int txok)
2389 {
2390 struct ath_node *an = NULL;
2391 struct sk_buff *skb;
2392 @@ -490,7 +490,7 @@ static void ath_tx_complete_aggr(struct
2393 } else if (!isaggr && txok) {
2394 /* transmit completion */
2395 acked_cnt++;
2396 - } else if ((tid->state & AGGR_CLEANUP) || !retry) {
2397 + } else if (tid->state & AGGR_CLEANUP) {
2398 /*
2399 * cleanup in progress, just fail
2400 * the un-acked sub-frames
2401 @@ -604,6 +604,37 @@ static void ath_tx_complete_aggr(struct
2402 ath9k_queue_reset(sc, RESET_TYPE_TX_ERROR);
2403 }
2404
2405 +static bool bf_is_ampdu_not_probing(struct ath_buf *bf)
2406 +{
2407 + struct ieee80211_tx_info *info = IEEE80211_SKB_CB(bf->bf_mpdu);
2408 + return bf_isampdu(bf) && !(info->flags & IEEE80211_TX_CTL_RATE_CTRL_PROBE);
2409 +}
2410 +
2411 +static void ath_tx_process_buffer(struct ath_softc *sc, struct ath_txq *txq,
2412 + struct ath_tx_status *ts, struct ath_buf *bf,
2413 + struct list_head *bf_head)
2414 +{
2415 + bool txok, flush;
2416 +
2417 + txok = !(ts->ts_status & ATH9K_TXERR_MASK);
2418 + flush = !!(ts->ts_status & ATH9K_TX_FLUSH);
2419 + txq->axq_tx_inprogress = false;
2420 +
2421 + txq->axq_depth--;
2422 + if (bf_is_ampdu_not_probing(bf))
2423 + txq->axq_ampdu_depth--;
2424 +
2425 + if (!bf_isampdu(bf)) {
2426 + if (!flush)
2427 + ath_tx_rc_status(sc, bf, ts, 1, txok ? 0 : 1, txok);
2428 + ath_tx_complete_buf(sc, bf, txq, bf_head, ts, txok);
2429 + } else
2430 + ath_tx_complete_aggr(sc, txq, bf, bf_head, ts, txok);
2431 +
2432 + if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_HT) && !flush)
2433 + ath_txq_schedule(sc, txq);
2434 +}
2435 +
2436 static bool ath_lookup_legacy(struct ath_buf *bf)
2437 {
2438 struct sk_buff *skb;
2439 @@ -1331,23 +1362,6 @@ void ath_tx_aggr_resume(struct ath_softc
2440 /* Queue Management */
2441 /********************/
2442
2443 -static void ath_txq_drain_pending_buffers(struct ath_softc *sc,
2444 - struct ath_txq *txq)
2445 -{
2446 - struct ath_atx_ac *ac, *ac_tmp;
2447 - struct ath_atx_tid *tid, *tid_tmp;
2448 -
2449 - list_for_each_entry_safe(ac, ac_tmp, &txq->axq_acq, list) {
2450 - list_del(&ac->list);
2451 - ac->sched = false;
2452 - list_for_each_entry_safe(tid, tid_tmp, &ac->tid_q, list) {
2453 - list_del(&tid->list);
2454 - tid->sched = false;
2455 - ath_tid_drain(sc, txq, tid);
2456 - }
2457 - }
2458 -}
2459 -
2460 struct ath_txq *ath_txq_setup(struct ath_softc *sc, int qtype, int subtype)
2461 {
2462 struct ath_hw *ah = sc->sc_ah;
2463 @@ -1470,14 +1484,8 @@ int ath_cabq_update(struct ath_softc *sc
2464 return 0;
2465 }
2466
2467 -static bool bf_is_ampdu_not_probing(struct ath_buf *bf)
2468 -{
2469 - struct ieee80211_tx_info *info = IEEE80211_SKB_CB(bf->bf_mpdu);
2470 - return bf_isampdu(bf) && !(info->flags & IEEE80211_TX_CTL_RATE_CTRL_PROBE);
2471 -}
2472 -
2473 static void ath_drain_txq_list(struct ath_softc *sc, struct ath_txq *txq,
2474 - struct list_head *list, bool retry_tx)
2475 + struct list_head *list)
2476 {
2477 struct ath_buf *bf, *lastbf;
2478 struct list_head bf_head;
2479 @@ -1499,16 +1507,7 @@ static void ath_drain_txq_list(struct at
2480
2481 lastbf = bf->bf_lastbf;
2482 list_cut_position(&bf_head, list, &lastbf->list);
2483 -
2484 - txq->axq_depth--;
2485 - if (bf_is_ampdu_not_probing(bf))
2486 - txq->axq_ampdu_depth--;
2487 -
2488 - if (bf_isampdu(bf))
2489 - ath_tx_complete_aggr(sc, txq, bf, &bf_head, &ts, 0,
2490 - retry_tx);
2491 - else
2492 - ath_tx_complete_buf(sc, bf, txq, &bf_head, &ts, 0);
2493 + ath_tx_process_buffer(sc, txq, &ts, bf, &bf_head);
2494 }
2495 }
2496
2497 @@ -1518,7 +1517,7 @@ static void ath_drain_txq_list(struct at
2498 * This assumes output has been stopped and
2499 * we do not need to block ath_tx_tasklet.
2500 */
2501 -void ath_draintxq(struct ath_softc *sc, struct ath_txq *txq, bool retry_tx)
2502 +void ath_draintxq(struct ath_softc *sc, struct ath_txq *txq)
2503 {
2504 ath_txq_lock(sc, txq);
2505
2506 @@ -1526,8 +1525,7 @@ void ath_draintxq(struct ath_softc *sc,
2507 int idx = txq->txq_tailidx;
2508
2509 while (!list_empty(&txq->txq_fifo[idx])) {
2510 - ath_drain_txq_list(sc, txq, &txq->txq_fifo[idx],
2511 - retry_tx);
2512 + ath_drain_txq_list(sc, txq, &txq->txq_fifo[idx]);
2513
2514 INCR(idx, ATH_TXFIFO_DEPTH);
2515 }
2516 @@ -1536,16 +1534,12 @@ void ath_draintxq(struct ath_softc *sc,
2517
2518 txq->axq_link = NULL;
2519 txq->axq_tx_inprogress = false;
2520 - ath_drain_txq_list(sc, txq, &txq->axq_q, retry_tx);
2521 -
2522 - /* flush any pending frames if aggregation is enabled */
2523 - if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_HT) && !retry_tx)
2524 - ath_txq_drain_pending_buffers(sc, txq);
2525 + ath_drain_txq_list(sc, txq, &txq->axq_q);
2526
2527 ath_txq_unlock_complete(sc, txq);
2528 }
2529
2530 -bool ath_drain_all_txq(struct ath_softc *sc, bool retry_tx)
2531 +bool ath_drain_all_txq(struct ath_softc *sc)
2532 {
2533 struct ath_hw *ah = sc->sc_ah;
2534 struct ath_common *common = ath9k_hw_common(sc->sc_ah);
2535 @@ -1581,7 +1575,7 @@ bool ath_drain_all_txq(struct ath_softc
2536 */
2537 txq = &sc->tx.txq[i];
2538 txq->stopped = false;
2539 - ath_draintxq(sc, txq, retry_tx);
2540 + ath_draintxq(sc, txq);
2541 }
2542
2543 return !npend;
2544 @@ -2175,28 +2169,6 @@ static void ath_tx_rc_status(struct ath_
2545 tx_info->status.rates[tx_rateindex].count = ts->ts_longretry + 1;
2546 }
2547
2548 -static void ath_tx_process_buffer(struct ath_softc *sc, struct ath_txq *txq,
2549 - struct ath_tx_status *ts, struct ath_buf *bf,
2550 - struct list_head *bf_head)
2551 -{
2552 - int txok;
2553 -
2554 - txq->axq_depth--;
2555 - txok = !(ts->ts_status & ATH9K_TXERR_MASK);
2556 - txq->axq_tx_inprogress = false;
2557 - if (bf_is_ampdu_not_probing(bf))
2558 - txq->axq_ampdu_depth--;
2559 -
2560 - if (!bf_isampdu(bf)) {
2561 - ath_tx_rc_status(sc, bf, ts, 1, txok ? 0 : 1, txok);
2562 - ath_tx_complete_buf(sc, bf, txq, bf_head, ts, txok);
2563 - } else
2564 - ath_tx_complete_aggr(sc, txq, bf, bf_head, ts, txok, true);
2565 -
2566 - if (sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_HT)
2567 - ath_txq_schedule(sc, txq);
2568 -}
2569 -
2570 static void ath_tx_processq(struct ath_softc *sc, struct ath_txq *txq)
2571 {
2572 struct ath_hw *ah = sc->sc_ah;
Staging tree of Mathias Kresin