hopefully fix occasional uClibc/gcc build failures
[openwrt/openwrt.git] / package / madwifi / patches / 127-regaccess.patch
1 Index: madwifi-dfs-r2996/ath_hal/ah_os.h
2 ===================================================================
3 --- madwifi-dfs-r2996.orig/ath_hal/ah_os.h 2007-12-01 19:36:04.943396719 +0100
4 +++ madwifi-dfs-r2996/ath_hal/ah_os.h 2007-12-01 19:37:06.182886560 +0100
5 @@ -33,7 +33,7 @@
6 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
7 * THE POSSIBILITY OF SUCH DAMAGES.
8 *
9 - * $Id: ah_os.h 2727 2007-10-05 17:42:53Z mtaylor $
10 + * $Id: ah_os.h 2933 2007-11-23 09:38:18Z proski $
11 */
12 #ifndef _ATH_AH_OS_H_
13 #define _ATH_AH_OS_H_
14 @@ -42,16 +42,16 @@
15 * Atheros Hardware Access Layer (HAL) OS Dependent Definitions.
16 */
17
18 -/*
19 -MadWifi safe register operations:
20 +/*
21 + MadWifi safe register operations:
22
23 - When hacking on registers directly we need to use the macros
24 - below, to avoid concurrent PCI access and abort mode errors.
25 + When hacking on registers directly, we need to use the macros below to
26 + avoid concurrent PCI access and abort mode errors.
27
28 * ath_reg_read
29 * ATH_REG_WRITE
30
31 -HAL-ONLY register operations:
32 + HAL-ONLY register operations:
33
34 * _OS_REG_READ
35 * _OS_REG_WRITE
36 @@ -60,26 +60,27 @@
37 * ath_hal_reg_read.
38 * ath_hal_reg_write
39
40 - When compiled in HAL:
41 - * We do not require locking overhead and function call unless user is debugging.
42 - * All HAL operations are executed in the context of a MadWifi wrapper call which holds
43 - the HAL lock.
44 - * Normally HAL is build with the non-modified version of this file so it doesnt have our
45 - funny macros anyway.
46 -
47 - When compiled in MadWifi:
48 - * The HAL wrapper API takes the HAL lock before invoking the HAL.
49 - * HAL access is already protected, and MadWifi must NOT access the functions listed above.
50 -
51 + When compiled in HAL:
52 + * We don't require locking overhead and function call except for
53 + debugging.
54 + * All HAL operations are executed in the context of a MadWifi wrapper
55 + call that holds the HAL lock.
56 + * Normally HAL is built with the non-modified version of this file, so
57 + it doesn't have our funny macros anyway.
58 +
59 + When compiled in MadWifi:
60 + * The HAL wrapper API takes the HAL lock before invoking the HAL.
61 + * HAL access is already protected, and MadWifi must NOT access the
62 + functions listed above.
63 */
64
65 /*
66 - * When building the HAL proper we use no GPL-contaminated include
67 - * files and must define these types ourself. Beware of these being
68 - * mismatched against the contents of <linux/types.h>
69 + * When building the HAL proper, we use no GPL-licensed include files and must
70 + * define Linux types ourselves. Please note that the definitions below don't
71 + * exactly match those in <linux/types.h>
72 */
73 #ifndef _LINUX_TYPES_H
74 -/* NB: arm defaults to unsigned so be explicit */
75 +/* NB: ARM defaults to unsigned, so be explicit */
76 typedef signed char int8_t;
77 typedef short int16_t;
78 typedef int int32_t;
79 @@ -93,36 +94,33 @@
80 typedef unsigned int size_t;
81 typedef unsigned int u_int;
82 typedef void* va_list;
83 -#endif
84 +#endif /* !_LINUX_TYPES_H */
85
86 /*
87 * Linux/BSD gcc compatibility shims.
88 */
89 -#define __printflike(_a,_b) \
90 - __attribute__ ((__format__ (__printf__, _a, _b)))
91 -#define __va_list va_list
92 +#define __va_list va_list
93 #define OS_INLINE __inline
94
95 extern int ath_hal_dma_beacon_response_time;
96 extern int ath_hal_sw_beacon_response_time;
97 extern int ath_hal_additional_swba_backoff;
98
99 -void __ahdecl ath_hal_vprintf(struct ath_hal *ah, const char* fmt,
100 - va_list ap);
101 -void __ahdecl ath_hal_printf(struct ath_hal *ah, const char* fmt, ...);
102 -const char* __ahdecl ath_hal_ether_sprintf(const u_int8_t *mac);
103 +void __ahdecl ath_hal_vprintf(struct ath_hal *ah, const char *fmt, va_list ap);
104 +void __ahdecl ath_hal_printf(struct ath_hal *ah, const char *fmt, ...);
105 +const char *__ahdecl ath_hal_ether_sprintf(const u_int8_t *mac);
106 int __ahdecl ath_hal_memcmp(const void *a, const void *b, size_t n);
107 -void * __ahdecl ath_hal_malloc(size_t size);
108 -void __ahdecl ath_hal_free(void* p);
109 +void *__ahdecl ath_hal_malloc(size_t size);
110 +void __ahdecl ath_hal_free(void *p);
111
112 /* Delay n microseconds. */
113 -extern void __ahdecl ath_hal_delay(int);
114 +extern void __ahdecl ath_hal_delay(int);
115 #define OS_DELAY(_n) ath_hal_delay(_n)
116
117 #define OS_MEMZERO(_a, _n) ath_hal_memzero((_a), (_n))
118 extern void __ahdecl ath_hal_memzero(void *, size_t);
119 #define OS_MEMCPY(_d, _s, _n) ath_hal_memcpy(_d,_s,_n)
120 -extern void * __ahdecl ath_hal_memcpy(void *, const void *, size_t);
121 +extern void *__ahdecl ath_hal_memcpy(void *, const void *, size_t);
122
123 #ifndef abs
124 #define abs(_a) __builtin_abs(_a)
125 @@ -133,7 +131,7 @@
126 #endif
127
128 struct ath_hal;
129 -extern u_int32_t __ahdecl ath_hal_getuptime(struct ath_hal *);
130 +extern u_int32_t __ahdecl ath_hal_getuptime(struct ath_hal *);
131 #define OS_GETUPTIME(_ah) ath_hal_getuptime(_ah)
132
133 /* Byte order/swapping support. */
134 @@ -142,9 +140,8 @@
135
136 #ifndef AH_BYTE_ORDER
137 /*
138 - * When the .inc file is not available (e.g. when building
139 - * in a kernel source tree); look for some other way to
140 - * setup the host byte order.
141 + * When the .inc file is not available (e.g. when building in the kernel source
142 + * tree), look for some other way to determine the host byte order.
143 */
144 #ifdef __LITTLE_ENDIAN
145 #define AH_BYTE_ORDER AH_LITTLE_ENDIAN
146 @@ -155,93 +152,98 @@
147 #ifndef AH_BYTE_ORDER
148 #error "Do not know host byte order"
149 #endif
150 -#endif /* AH_BYTE_ORDER */
151 +#endif /* AH_BYTE_ORDER */
152
153 /*
154 - * Note that register accesses are done using target-specific
155 - * functions when debugging is enabled (AH_DEBUG) or we are
156 - * explicitly configured this way.
157 - *
158 - * The hardware registers are native little-endian byte order.
159 - * Big-endian hosts are handled by enabling hardware byte-swap
160 - * of register reads and writes at reset. But the PCI clock
161 - * domain registers are not byte swapped! Thus, on big-endian
162 - * platforms we have to byte-swap thoese registers specifically.
163 - * Most of this code is collapsed at compile time because the
164 - * register values are constants.
165 - *
166 - * Presumably when talking about hardware byte-swapping, the above
167 - * text is referring to the Atheros chipset, as the registers
168 - * referred to are in the PCI memory address space, and these are
169 - * never byte-swapped by PCI chipsets or bridges, but always
170 - * written directly (i.e. the format defined by the manufacturer).
171 + * Some big-endian architectures don't set CONFIG_GENERIC_IOMAP, but fail to
172 + * implement iowrite32be and ioread32be. Provide compatibility macros when
173 + * it's needed.
174 + *
175 + * As of Linux 2.6.24, only MIPS, PARISC and PowerPC implement iowrite32be and
176 + * ioread32be as functions.
177 + *
178 + * The downside or the replacement macros it that we may be byte-swapping data
179 + * for the second time, so the native implementations should be preferred.
180 */
181 +#if (LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,12)) && \
182 + !defined(CONFIG_GENERIC_IOMAP) && (AH_BYTE_ORDER == AH_BIG_ENDIAN) && \
183 + !defined(__mips__) && !defined(__hppa__) && !defined(__powerpc__)
184 +# ifndef iowrite32be
185 +# define iowrite32be(_val, _addr) iowrite32(swab32((_val)), (_addr))
186 +# endif
187 +# ifndef ioread32be
188 +# define ioread32be(_addr) swab32(ioread32((_addr)))
189 +# endif
190 +#endif
191 +
192 +/*
193 + * The register accesses are done using target-specific functions when
194 + * debugging is enabled (AH_DEBUG) or it's explicitly requested for the target.
195 + *
196 + * The hardware registers use little-endian byte order natively. Big-endian
197 + * systems are configured by HAL to enable hardware byte-swap of register reads
198 + * and writes at reset. This avoid the need to byte-swap the data in software.
199 + * However, the registers in a certain area from 0x4000 to 0x4fff (PCI clock
200 + * domain registers) are not byte swapped!
201 + *
202 + * Since Linux I/O primitives default to little-endian operations, we only
203 + * need to suppress byte-swapping on big-endian systems outside the area used
204 + * by the PCI clock domain registers.
205 + */
206 +#if (AH_BYTE_ORDER == AH_BIG_ENDIAN)
207 +#define is_reg_le(__reg) ((0x4000 <= (__reg) && (__reg) < 0x5000))
208 +#else
209 +#define is_reg_le(__reg) 1
210 +#endif
211 +
212 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,12)
213 -# if (AH_BYTE_ORDER == AH_BIG_ENDIAN)
214 #define _OS_REG_WRITE(_ah, _reg, _val) do { \
215 - (0x4000 <= (_reg) && (_reg) < 0x5000) ? \
216 + is_reg_le(_reg) ? \
217 iowrite32((_val), (_ah)->ah_sh + (_reg)) : \
218 iowrite32be((_val), (_ah)->ah_sh + (_reg)); \
219 } while (0)
220 #define _OS_REG_READ(_ah, _reg) \
221 - ((0x4000 <= (_reg) && (_reg) < 0x5000) ? \
222 + (is_reg_le(_reg) ? \
223 ioread32((_ah)->ah_sh + (_reg)) : \
224 - ioread32be((_ah)->ah_sh + (_reg)));
225 -# else /* AH_LITTLE_ENDIAN */
226 -#define _OS_REG_WRITE(_ah, _reg, _val) do { \
227 - iowrite32(_val, (_ah)->ah_sh + (_reg)); \
228 - } while (0)
229 -#define _OS_REG_READ(_ah, _reg) \
230 - ioread32((_ah)->ah_sh + (_reg))
231 -
232 -# endif /* AH_BYTE_ORDER */
233 + ioread32be((_ah)->ah_sh + (_reg)))
234 #else
235 -# if (AH_BYTE_ORDER == AH_BIG_ENDIAN)
236 #define _OS_REG_WRITE(_ah, _reg, _val) do { \
237 - writel((0x4000 <= (_reg) && (_reg) < 0x5000) ? \
238 + writel(is_reg_le(_reg) ? \
239 (_val) : cpu_to_le32(_val), \
240 (_ah)->ah_sh + (_reg)); \
241 } while (0)
242 #define _OS_REG_READ(_ah, _reg) \
243 - ((0x4000 <= (_reg) && (_reg) < 0x5000) ? \
244 + (is_reg_le(_reg) ? \
245 readl((_ah)->ah_sh + (_reg)) : \
246 cpu_to_le32(readl((_ah)->ah_sh + (_reg))))
247 -# else /* AH_LITTLE_ENDIAN */
248 -#define _OS_REG_WRITE(_ah, _reg, _val) do { \
249 - writel(_val, (_ah)->ah_sh + (_reg)); \
250 - } while (0)
251 -#define _OS_REG_READ(_ah, _reg) \
252 - readl((_ah)->ah_sh + (_reg))
253 -# endif /* AH_BYTE_ORDER */
254 -#endif /* KERNEL_VERSON(2,6,12) */
255 -
256 -/*
257 -The functions in this section are not intended to be invoked by MadWifi driver
258 -code, but by the HAL. They are NOT safe for direct invocation when the
259 -sc->sc_hal_lock is not held. Use ath_reg_read and ATH_REG_WRITE instead!
260 +#endif /* KERNEL_VERSION(2,6,12) */
261 +
262 +/*
263 + * The functions in this section are not intended to be invoked by MadWifi
264 + * driver code, but by the HAL. They are NOT safe to call directly when the
265 + * sc->sc_hal_lock is not held. Use ath_reg_read and ATH_REG_WRITE instead!
266 */
267 #if defined(AH_DEBUG) || defined(AH_REGOPS_FUNC) || defined(AH_DEBUG_ALQ)
268 #define OS_REG_WRITE(_ah, _reg, _val) ath_hal_reg_write(_ah, _reg, _val)
269 #define OS_REG_READ(_ah, _reg) ath_hal_reg_read(_ah, _reg)
270 -extern void __ahdecl ath_hal_reg_write(struct ath_hal *ah, u_int reg, u_int32_t val);
271 -extern u_int32_t __ahdecl ath_hal_reg_read(struct ath_hal *ah, u_int reg);
272 +extern void __ahdecl ath_hal_reg_write(struct ath_hal *ah, u_int reg,
273 + u_int32_t val);
274 +extern u_int32_t __ahdecl ath_hal_reg_read(struct ath_hal *ah, u_int reg);
275 #else
276 #define OS_REG_WRITE(_ah, _reg, _val) _OS_REG_WRITE(_ah, _reg, _val)
277 #define OS_REG_READ(_ah, _reg) _OS_REG_READ(_ah, _reg)
278 -#endif /* AH_DEBUG || AH_REGFUNC || AH_DEBUG_ALQ */
279 +#endif /* AH_DEBUG || AH_REGFUNC || AH_DEBUG_ALQ */
280
281 extern char *ath_hal_func;
282 static inline void ath_hal_set_function(const char *name)
283 -#if defined(AH_DEBUG)
284 {
285 +#ifdef AH_DEBUG
286 ath_hal_func = (char *)name;
287 -}
288 -#else
289 -{ }
290 #endif
291 +}
292
293 #ifdef AH_DEBUG_ALQ
294 -extern void __ahdecl OS_MARK(struct ath_hal *, u_int id, u_int32_t value);
295 +extern void __ahdecl OS_MARK(struct ath_hal *, u_int id, u_int32_t value);
296 #else
297 #define OS_MARK(_ah, _id, _v)
298 #endif
299 @@ -253,8 +255,9 @@
300 * compiled with the default calling convention and are not called
301 * from within the HAL.
302 */
303 -extern struct ath_hal *_ath_hal_attach(u_int16_t devid, HAL_SOFTC,
304 - HAL_BUS_TAG, HAL_BUS_HANDLE, HAL_STATUS*);
305 -extern void _ath_hal_detach(struct ath_hal *);
306 +extern struct ath_hal *_ath_hal_attach(u_int16_t devid, HAL_SOFTC,
307 + HAL_BUS_TAG, HAL_BUS_HANDLE,
308 + HAL_STATUS *);
309 +extern void _ath_hal_detach(struct ath_hal *);
310
311 -#endif /* _ATH_AH_OSDEP_H_ */
312 +#endif /* _ATH_AH_OSDEP_H_ */